阅读说明：本技术 同质外延氮化镓晶体管器件结构 (Homoepitaxial gallium nitride transistor device structure ) 是由 王元刚 冯志红 吕元杰 宋旭波 谭鑫 周幸叶 房玉龙 顾国栋 敦少博 于 2019-09-24 设计创作，主要内容包括：本发明适用于半导体技术领域,提供了一种同质外延氮化镓晶体管器件结构,包括：衬底、位于衬底上的沟道层、位于沟道层上的势垒层及位于势垒层上的电极,所述电极包括源电极、漏电极和栅电极；所述源电极和所述漏电极分别位于所述势垒层上表面的两侧,所述栅电极位于所述源电极和所述漏电极之间的所述势垒层上；所述沟道层厚度范围满足1nm≤d<Sub>1</Sub>≤20nm,所述势垒层厚度范围满足d<Sub>2</Sub>>12nm。本申请通过设置薄沟道层,使得副沟道的电子能够进入异质结界面主沟道中,变为可控的主沟道电子,从而降低泄露电流。(The invention is suitable for the technical field of semiconductors, and provides a homoepitaxy gallium nitride transistor device structure, which comprises: the transistor comprises a substrate, a channel layer positioned on the substrate, a barrier layer positioned on the channel layer and an electrode positioned on the barrier layer, wherein the electrode comprises a source electrode, a drain electrode and a gate electrode; the source electrode and the drain electrode are respectively positioned on two sides of the upper surface of the barrier layer, and the gate electrode is positioned on the barrier layer between the source electrode and the drain electrode; the thickness range of the channel layer satisfies d is more than or equal to 1nm 1 Less than or equal to 20nm, and the thickness range of the barrier layer satisfies d 2 >12 nm. According to the heterojunction interface main channel structure, the thin channel layer is arranged, so that electrons of the auxiliary channel can enter the heterojunction interface main channel and become controllable main channel electrons, and leakage current is reduced.)

1. A homoepitaxial gallium nitride transistor device structure, comprising: the transistor comprises a substrate, a channel layer positioned on the substrate, a barrier layer positioned on the channel layer and an electrode positioned on the barrier layer, wherein the electrode comprises a source electrode, a drain electrode and a gate electrode;

the source electrode and the drain electrode are respectively positioned on two sides of the upper surface of the barrier layer, and the gate electrode is positioned on the barrier layer between the source electrode and the drain electrode;

the thickness range of the channel layer satisfies d is more than or equal to 1nm₁Less than or equal to 20nm, and the thickness range of the barrier layer satisfies d₂>12nm, said d₁Denotes the thickness of the channel layer, d₂Indicating the thickness of the barrier layer.

2. The homoepitaxial gallium nitride transistor device structure of claim 1, wherein the substrate is a substrate that is epitaxially layered gallium nitride on sapphire, silicon carbide, silicon, or diamond basis.

3. The homoepitaxial gallium nitride transistor device structure of claim 1, wherein the gallium nitride substrate is a pure gallium nitride substrate.

4. The homoepitaxial gallium nitride transistor device structure of claim 1, wherein the channel layer is In_mAl_nGa_rN; wherein m is more than or equal to 0 and less than or equal to 1, n is more than or equal to 0 and less than or equal to 0.1, r is more than or equal to 0.9 and less than or equal to 1, and m + n + r is equal to 1.

5. The homoepitaxial gallium nitride transistor device structure of claim 4, wherein the channel layer is InGaN.

6. The homoepitaxial gallium nitride transistor device structure of claim 1, wherein the barrier layer is In_xAl_yGa_zN; wherein x is more than or equal to 0 and less than or equal to 0.85, y is more than or equal to 0.15 and less than or equal to 1, z is more than or equal to 0 and less than or equal to 0.85, and x + y + z is equal to 1.

7. The homoepitaxial gallium nitride transistor device structure of claim 1, further comprising a passivation layer on the barrier layer between the source electrode and the gate electrode, and between the gate electrode and the drain electrode.

8. The homoepitaxial gallium nitride transistor device structure of claim 1, wherein the gate electrode is any one of a T-gate, a straight gate, a Y-gate, a TT-gate and a U-gate.

9. The homoepitaxial gallium nitride transistor device structure of claim 8, wherein the gate electrode is a straight gate, the homoepitaxial gallium nitride transistor device structure further comprising a gate dielectric layer on the barrier layer below the straight gate.

10. The homoepitaxial gallium nitride transistor device structure of claim 9, wherein the gate electrode is a schottky gate.