阅读说明：本技术 功率放大器的量子阱热感测 (Quantum well thermal sensing for power amplifiers ) 是由 陶耿名 李夏 杨斌 于 2018-04-11 设计创作，主要内容包括：一种异质结双极性晶体管(HBT)热感测器件,包括作为HBT子集电极和HBT基底之间的层的阱结构。在一个实例中,该HBT子集电极接触HBT热感测器件的发射极、集电极和基极。该HBT热感测器件还包括与量子阱结构电接触的第一侧电极和与量子阱结构电接触的第二侧电极。(A Heterojunction Bipolar Transistor (HBT) thermal sensing device includes a well structure as a layer between an HBT subcollector and an HBT substrate. In one example, the HBT subcollector contacts the emitter, collector and base of the HBT thermal sensing device. The HBT thermal sensing device further comprises a first side electrode in electrical contact with the quantum well structure and a second side electrode in electrical contact with the quantum well structure.)

1. A Heterojunction Bipolar Transistor (HBT) thermal sensing device comprising:

the subcollector is contacted with an emitter, a collector and a base of the HBT active device;

an HBT substrate;

a quantum well structure between the HBT active device and the HBT substrate;

a first side electrode in electrical contact with the quantum well structure; and

a second side electrode in electrical contact with the quantum well structure.

2. The HBT thermal sensing device of claim 1 wherein said first side electrode comprises a backside electrode that passes through said HBT substrate and is in electrical contact with said quantum well structure.

3. The HBT thermal sensing device of claim 1, wherein said quantum well structure comprises a quantum well.

4. The HBT thermal sensing device of claim 1 wherein said quantum well structure comprises a superlattice structure.

5. The HBT thermal sensing device of claim 4 wherein the material of said superlattice structure is matched to the material of said HBT substrate.

6. The HBT thermal sensing device of claim 1, further comprising an isolation layer between said subcollector and said quantum well structure.

7. The HBT thermal sensing device of claim 1, wherein said first side electrode comprises a hot side electrode that is closer to a heat source of said HBT thermal sensing device than said second side electrode.

8. The HBT thermal sensing device of claim 1 wherein said second side electrode comprises a cold side electrode that is further from a heat source of said HBT thermal sensing device relative to said first side electrode.

9. A method of fabricating a Heterojunction Bipolar Transistor (HBT) thermal sensing device, comprising:

forming an HBT active device;

forming a quantum well structure on a substrate of the HBT active device;

forming a first electrode in electrical contact with the quantum well structure; and

forming a second electrode in electrical contact with the quantum well structure.

10. The method of claim 9, wherein forming the quantum well structure comprises:

growing alternating layers of large band gap compound semiconductor material and small band gap compound semiconductor material on the substrate; and

depositing isolation layers on the alternating layers of large bandgap compound semiconductor material and small bandgap compound semiconductor material.

11. The method of claim 9, wherein forming the quantum well structure comprises epitaxially growing the quantum well structure.

12. The method of claim 9, wherein forming the first electrode comprises forming a hot side electrode that is closer to a heat source of the HBT thermal sensing device than the second electrode.

13. The method of claim 9, wherein forming the second electrode comprises forming a cold-side electrode that is further from a heat source of the HBT thermal sensing device relative to the first electrode.

14. A Heterojunction Bipolar Transistor (HBT) thermal sensing device comprising:

the subcollector is contacted with an emitter, a collector and a base of the HBT active device;

an HBT substrate;

a quantum well structure between the HBT active device and the HBT substrate;

a first means for electrically contacting the quantum well structure; and

a second means for electrically contacting the quantum well structure.

15. The HBT thermal sensing device of claim 14 wherein said quantum well structure comprises a quantum well.

16. The HBT thermal sensing device of claim 14 wherein said quantum well structure comprises a superlattice structure.

17. The HBT thermal sensing device of claim 16 wherein the material of said superlattice structure is matched to the material of said HBT substrate.

18. The HBT thermal sensing device of claim 14, further comprising an isolation layer between said subcollector and said quantum well structure.

Technical Field

The present disclosure relates generally to wireless communication systems and, more particularly, to thermal sensing of heterojunction bipolar transistor-based Power Amplifiers (PAs).

Background

A wireless device (e.g., a cellular telephone or smartphone) in a wireless communication system may include a Radio Frequency (RF) transceiver to transmit and receive data for two-way communication. A mobile RF transceiver may include a transmit section for data transmission and a receive section for data reception. For data transmission, the transmit section may modulate an RF carrier signal with data to obtain a modulated RF signal, amplify the modulated RF signal to obtain an amplified RF signal having an appropriate output power level, and transmit the amplified RF signal to a base station through an antenna. For data reception, the receive section may obtain a received RF signal via an antenna, and may amplify and process the received RF signal to recover data transmitted by the base station.

The transmit section of the mobile RF transceiver may amplify and transmit communication signals. The transmit section may include one or more circuits for amplifying and transmitting communication signals. The amplification circuit may comprise one or more amplification stages, which may have one or more driver stages and one or more power amplification stages. Each amplification stage includes one or more transistors configured in various ways to amplify the communication signal. To support communication enhancements such as carrier aggregation, transistors configured to amplify communication signals are typically selected to operate at substantially increased frequencies.

The implementation of carrier aggregation in mobile RF transceivers enables wireless carriers to increase the available bandwidth by using multiple frequencies simultaneously for a single communication stream. Successful implementation of carrier aggregation complicates the thermal power specification of power amplifiers in mobile RF transceivers while more and more data is being provided to end users. These thermal power specifications are further complicated by the fact that RF power amplifiers are typically not manufactured using CMOS (complementary metal-oxide-semiconductor) processes. Since compound semiconductor materials, such as columns III and V (III-V) or columns II and IV (II-VI), generally exhibit poor thermal conductivity, it is difficult to meet thermal power specifications in compound semiconductor devices, such as Heterojunction Bipolar Transistor (HBT) based power amplifiers, such as III-V or II-VI.

Disclosure of Invention

A Heterojunction Bipolar Transistor (HBT) thermal sensing device includes an HBT substrate and an HBT active device including subcollectors contacting an emitter, a collector, and a base. The HBT thermal sensing device may also include a quantum well structure between the HBT active device and the HBT substrate. The HBT thermal sensing device may further comprise a first side electrode in electrical contact with the quantum well structure and a second side electrode in electrical contact with the quantum well structure.

A method of fabricating a Heterojunction Bipolar Transistor (HBT) thermal sensing device includes forming an HBT active device. The method also includes forming a quantum well structure on the substrate of the HBT active device. The method may further include forming a first electrode in electrical contact with the quantum well structure and forming a second electrode in electrical contact with the quantum well structure.

A Heterojunction Bipolar Transistor (HBT) thermal sensing device includes an HBT substrate and an HBT active device including subcollectors contacting an emitter, a collector, and a base. The HBT thermal sensing device may further comprise a quantum well structure between the HBT active device and the HBT substrate. The HBT thermal sensing device may further comprise first means for electrically contacting the quantum well structure and second means for electrically contacting the quantum well structure.

This has outlined rather broadly the features and technical advantages of the present disclosure in order that the detailed description of the next section may be better understood. Additional features and advantages of the disclosure will be described hereinafter. Those skilled in the art should appreciate that the present disclosure may be readily utilized as a basis for modifying or designing other structures for carrying out the same purposes of the present disclosure. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the teachings of the disclosure as set forth in the appended claims. The novel features which are believed to be characteristic of the disclosure, both as to its organization and method of operation, together with additional objects and advantages will be better understood from the following description when considered in connection with the accompanying figures. It is to be expressly understood, however, that each of the figures is provided for the purpose of illustration and description only and is not intended as a definition of the limits of the present disclosure.

Drawings

Fig. 1 illustrates a wireless device in communication with a wireless system in accordance with an aspect of the disclosure.

Fig. 2A-2D illustrate four examples of Carrier Aggregation (CA) in accordance with aspects of the present disclosure.

Fig. 3 illustrates a block diagram of the wireless device of fig. 1 in accordance with an aspect of the disclosure.

Fig. 4 is an example of a schematic diagram of the seebeck effect of a semiconductor thermocouple.

Fig. 5 illustrates an example of a p-type quantum well structure for heat dissipation.

Figure 6 illustrates an example of a Heterojunction Bipolar Transistor (HBT) device.

Figure 7 illustrates a Heterojunction Bipolar Transistor (HBT) power amplifier for reducing power or heat dissipation.

Figure 8 illustrates an example thermal image of the temperature profile of the HBT power amplifier of figure 7.

Figure 9A illustrates a Heterojunction Bipolar Transistor (HBT) thermal sensing device for power consumption in accordance with aspects of the present disclosure.

FIG. 9B illustrates another Heterojunction Bipolar Transistor (HBT) thermal sensing device for power consumption in accordance with aspects of the present disclosure.

Fig. 10 illustrates a Heterojunction Bipolar Transistor (HBT) power amplifier for reducing power or heat dissipation in accordance with aspects of the present disclosure.

Figure 11 is a flow chart illustrating a method of fabricating a Heterojunction Bipolar Transistor (HBT) thermal sensing device according to aspects of the present disclosure.

Fig. 12 is a block diagram illustrating an example wireless communication system in which an aspect of the present disclosure may be advantageously employed.

Detailed Description

The detailed description set forth below in connection with the appended drawings is intended as a description of various configurations and is not intended to represent the only configurations in which the concepts described herein may be practiced. The detailed description includes specific details for the purpose of providing a thorough understanding of the various concepts. It will be apparent, however, to one skilled in the art that these concepts may be practiced without these specific details. In some instances, well-known structures and components are shown in block diagram form in order to avoid obscuring such concepts.

As used herein, the use of the term "and/or" is intended to mean "including or" and the use of the term "or" is intended to mean "excluding or". As used herein, the term "exemplary" used throughout this specification means "serving as an example, instance, or illustration," and is not necessarily to be construed as preferred or advantageous over other exemplary configurations. The term "coupled" as used throughout this specification refers to a connection, whether directly or indirectly through intervening connections (e.g., switches), electrical, mechanical, or other means, and is not necessarily limited to a physical connection. Further, the connection may be such that the objects are permanently connected or releasably connected. The connection may be made through a switch.

The fabrication of mobile Radio Frequency (RF) chip designs, such as mobile RF transceivers, becomes complex at deep sub-micron process nodes due to cost and power consumption considerations. Other design challenges for mobile RF transceivers include analog/RF performance considerations, including mismatch, noise, and other performance considerations. The design complexity of these mobile RF transceivers is further complicated by the increased circuit functionality to support communication enhancements such as carrier aggregation. The implementation of carrier aggregation in mobile RF transceivers enables wireless carriers to increase available bandwidth by using multiple frequencies simultaneously for a single communication stream.

Successful implementation of carrier aggregation complicates the thermal specification of the power amplifier in a mobile RF transceiver while more data is being provided to the end user. For example, in a mobile RF transceiver, a communication signal is amplified and transmitted by a transmitting section. The transmit section may include one or more circuits that amplify and transmit the communication signal. The amplification circuit may comprise one or more amplification stages, which may have one or more driver stages and one or more power amplification stages. Each amplification stage includes one or more transistors configured in various ways to amplify the communication signal. However, transistors configured to amplify communication signals are typically selected to operate at substantially increased frequencies, which further complicates thermal power specifications.

These thermal power specifications are further complicated by the fact that RF power amplifiers are typically not manufactured using CMOS (complementary metal-oxide-semiconductor) processes. Since column III and V (III-V) or column II and IV (II-VI) compound semiconductor materials typically exhibit poor thermal conductivity, it is difficult to meet thermal power specifications in III-V or II-VI compound semiconductor devices, such as Heterojunction Bipolar Transistor (HBT) based power amplifiers.

A bipolar transistor, also known as a Bipolar Junction Transistor (BJT), is a transistor that uses charge carriers including hole charges and electron carriers. Bipolar transistors are fabricated in integrated circuits and can also be used as stand-alone components. Bipolar transistors are designed to amplify current. This basic function of the bipolar transistor makes it a reasonable choice for implementing the amplifier and the switch. Bipolar transistors are therefore widely used in electronic devices such as mobile phones, audio amplifiers and radio transmitters.

A Heterojunction Bipolar Transistor (HBT) is a bipolar transistor that uses different semiconductor materials for the emitter and base regions of the device, creating a heterojunction. Heterojunction bipolar transistors may use III-V compound semiconductor materials, II-VI compound semiconductor materials, or other similar compound semiconductor materials. III-V (and II-VI) compound semiconductor materials typically exhibit high carrier mobility and direct energy gap. Heterojunction bipolar transistors have improved on bipolar transistors by supporting greatly increased frequencies, e.g., up to several hundred gigahertz (GHz). Therefore, heterojunction bipolar transistors are often used in high speed circuits, such as RF chip designs that specify high power efficiency, including RF power amplifiers in mobile RF transceivers.

A Heterojunction Bipolar Transistor (HBT) integrated circuit (HBT chip) may include an HBT to provide a power amplifier. Unfortunately, power amplifiers in mobile phones (e.g., 3G/4G HBT power amplifiers) may experience heat dissipation problems. In particular, a significant challenge in designing HBT-based power amplifiers is thermal stability, which may reduce the size of the safe operating area. Therefore, heat dissipation becomes increasingly problematic for HBT-based power amplifiers. In practice, the compound semiconductor materials used by HBT-based power amplifiers may cause local hot spots. Since localized hot spots are embedded in the device, this may reduce the ability to cool the hot spots and achieve low junction temperatures. Conventional cooling solutions for achieving low junction temperatures include heat sinks, and/or modified printed circuit boards. Conventional techniques that simply increase the size of the heat sink and/or heat spreader are impractical in small devices (e.g., smartphones).

This thermal instability may be due to the large amount of heat generated inside the HBT collector, e.g., below the emitter/base region of the HBT-based power amplifier. Furthermore, the compound semiconductor materials used to fabricate HBT-based power amplifiers, such as gallium arsenide (GaAs), are thermally poor conductors (e.g., four times worse than silicon (Si)) relative to non-compound semiconductor materials because heat cannot readily diffuse from the substrate. Furthermore, HBT emitter/base materials, such as indium gallium arsenide (InGaAs)/indium gallium phosphide (InGaP), exhibit poor thermal conductivity (e.g., eight times worse) relative to GaAs.

HBT-based power amplifiers incorporating compound semiconductor materials, such as GaAs substrates supporting InGaAs/InGaP emitter/base materials, result in further reductions in thermal conductivity (e.g., by a factor of 30). These compound semiconductor materials collectively result in increased heat that does not readily diffuse to the top of the HBT emitter. These thermal problems are further exacerbated by future 5G and 5G + power amplifiers due to the higher operating frequencies, which translate into higher dynamic power that generates heat. There is no efficient heat sink in current HBT structures to address the heat dissipation problem of 5G HBTs.

Furthermore, HBT power stages may exhibit non-uniform temperature profiles. This temperature profile may be difficult to detect if the sensing device is decoupled from the power stage. The sensing of HBT junction temperature may be inaccurate. These thermal problems can negatively impact the performance of HBT-based power amplifiers.

The present disclosure may address this problem by having a well structure (such as a quantum well, superlattice structure, etc.) as a layer between the HBT subcollector and the HBT substrate. In one configuration, an isolation layer is provided between the HBT subcollector and the well structure. In this aspect of the disclosure, the hot side electrode is in electrical contact with the well structure and aligned with the HBT emitter. The hot electrode can be used to monitor junction temperature to control HBT bias to improve performance of HBT-based power amplifiers. The hot electrode may be a back electrode from the substrate to the well structure. A cold side electrode may also be provided as a back electrode from the substrate to the well structure.

Fig. 1 shows a wireless device 110 in communication with a wireless communication system 120. The wireless communication system 120 may be a 5G system, a Long Term Evolution (LTE) system, a Code Division Multiple Access (CDMA) system, a global system for mobile communications (GSM) system, a Wireless Local Area Network (WLAN) system, or some other wireless system. CDMA systems may implement wideband CDMA (wcdma), time division synchronous CDMA (TD-SCDMA), CDMA2000, or other versions of CDMA. For simplicity, fig. 1 shows a wireless communication system 120 that includes two base stations 130 and 132 and a system controller 140. A wireless system may generally include any number of base stations and any number of network entities.

Wireless device 110 may also be referred to as a User Equipment (UE), a mobile station, a terminal, an access terminal, a subscriber unit, a station, etc. The wireless device 110 may be a mobile phone, a smart phone, a tablet, a wireless modem, a Personal Digital Assistant (PDA), a handheld device, a laptop, a smart book, a netbook, a cordless phone, a Wireless Local Loop (WLL) station, a bluetooth device, etc. Wireless device 110 may be capable of communicating with wireless communication system 120. Wireless device 110 may also be capable of receiving signals from broadcast stations, such as broadcast station 134, signals from satellites in one or more Global Navigation Satellite Systems (GNSS), such as satellite 150. Wireless device 110 may support one or more radio technologies for wireless communication, such as LTE, CDMA2000, WCDMA, TD-SCDMA, GSM, 802.11, and so on.

Wireless device 110 may support carrier aggregation, which is the operation of multiple carriers. Carrier aggregation may also be referred to as multi-carrier operation. According to an aspect of the disclosure, wireless device 110 may be capable of operating in Long Term Evolution (LTE) in low frequency bands from 698 to 960 megahertz (MHz), medium frequency bands from 1475 to 2170MHz, and/or high frequency bands from 2300 to 2690, ultra high frequency bands from 3400 to 3800MHz, and LTE unlicensed bands from 5150MHz to 5950MHz (LTE-U/LAA). Low frequency band, medium frequency band, high frequency band, ultra high frequency band, and LTE-U refer to five groups of frequency bands (or frequency band groups), and each frequency band group includes a plurality of frequency bands (or simply "bands"). For example, in some systems, each frequency band may cover up to 200MHz and may include one or more carriers. Each carrier may cover up to 40MHz, for example in LTE. Of course, the range of each frequency band is merely exemplary and not limiting, and other frequency ranges may be used. LTE release 11 supports 35 bands, which are referred to as LTE/UMTS bands and are listed in 3GPP TS 36.101. In LTE release 11, wireless device 110 may be configured with up to 5 carriers in one or both frequency bands.

Generally, Carrier Aggregation (CA) can be classified into two types: intrablock CA and intrablock CA. Intra-segment CA refers to operation on multiple carriers within the same frequency band and inter-segment CA refers to operation on multiple carriers in different frequency bands.

Fig. 2A shows an example of CA within a continuous segment. In the example shown in fig. 2A, a wireless device (e.g., wireless device 110) is configured with four consecutive carriers in the same frequency band. The same frequency band is a medium frequency band. The wireless device may transmit and/or receive transmissions on multiple contiguous carriers within the same frequency band.

Fig. 2B shows an example of CA within a non-contiguous segment. In the example shown in fig. 2B, a wireless device (e.g., wireless device 110) is configured with four non-contiguous carriers in the same frequency band. The same frequency band is a medium frequency band. The carriers may be separated by 5MHz, 10MHz, or some other amount. The wireless device may transmit and/or receive transmissions on multiple non-contiguous carriers within the same frequency band.

Fig. 2C shows an example of inter-segment CA in the same band group. In the example shown in fig. 2C, a wireless device (e.g., wireless device 110) is configured with four carriers in two bands of the same band group. The same frequency band is a medium frequency band. The wireless device may transmit and/or receive transmissions on multiple carriers in different frequency bands in the same band group, such as mid-band 1(MB1) and mid-band 2(MB2) in fig. 2C.

Fig. 2D shows an example of inter-segment CA in different band groups. In the example shown in fig. 2D, a wireless device (e.g., wireless device 110) is configured with four carriers in two bands in different band groups, including two carriers in one band in a low band and two additional carriers in another band in a mid band. The wireless device may transmit and/or receive transmissions on multiple carriers in different frequency bands in different frequency band groups (e.g., low and mid frequency bands in fig. 2D). Fig. 2A to 2D show four examples of carrier aggregation. Carrier aggregation may also be supported for other combinations of frequency bands and frequency band groups. For example, carrier aggregation may be supported for low and high band, mid and high band, high and high band, and other band combinations with ultra high band and long term evolution (LTE-U) in unlicensed spectrum.

Fig. 3 shows a block diagram of an exemplary design of a wireless device 300, such as wireless device 110 shown in fig. 1. Fig. 3 shows an example of a transceiver 320, which may be a Wireless Transceiver (WTR). In general, the conditioning of the signals in the transmitter 330 and the receiver 350 may be performed by one or more amplification stages, filtering stages, up-conversion stages, down-conversion stages, and so on. These circuit blocks may be arranged differently from the configuration shown in fig. 3. In addition, other circuit blocks not shown in fig. 3 may also be used to condition the signals in the transmitter 330 and the receiver 350. Unless otherwise specified, any of the signals in fig. 3 or any other pattern in the drawings may be single ended or differential. Some circuit blocks in fig. 3 may also be omitted.

In the example shown in fig. 3, the wireless device 300 generally includes a transceiver 320 and a data processor 310. The data processor 310 may include a memory (not shown) for storing data and program code, and may typically include analog and digital processing elements. The transceiver 320 may include a transmitter 330 and a receiver 350 that support bi-directional communication. In general, wireless device 300 may include any number of transmitters and/or receivers for any number of communication systems and frequency bands. All or a portion of transceiver 320 may be implemented on one or more analog Integrated Circuits (ICs), Radio Frequency (RF) integrated circuits (RFICs), mixed signal ICs, and so forth.

The transmitter or receiver may be implemented with a super-heterodyne architecture or a direct-conversion architecture. In a super-heterodyne architecture, a signal is frequency converted between radio frequency and baseband in multiple stages, e.g., for a receiver, from radio frequency to Intermediate Frequency (IF) in one stage, and then from intermediate frequency to baseband in another stage. In the direct conversion architecture, the signal is frequency converted between radio frequency and baseband in one stage. The super-heterodyne and direct-conversion architectures may use different circuit blocks and/or have different requirements. In the example shown in fig. 3, the transmitter 330 and the receiver 350 are implemented with a direct conversion architecture.

In the transmit path, data processor 310 processes data to be transmitted. The data processor 310 also provides in-phase (I) and quadrature (Q) analog output signals to a transmitter 330 in the transmit path. In an exemplary aspect, the data processor 310 includes digital-to-analog converters (DACs) 314a and 314b for converting digital signals generated by the data processor 310 into in-phase (I) and quadrature (Q) analog output signals (e.g., I and Q output currents) for further processing.

In the transmitter 330, low pass filters 332a and 332b filter the in-phase (I) and quadrature (Q) analog transmit signals, respectively, to remove undesired images caused by previous digital-to-analog conversion. Amplifiers (Amp)334a and 334b amplify the signals from lowpass filters 332a and 332b, respectively, and provide in-phase (I) and quadrature (Q) baseband signals. Upconverter 340 upconverts the in-phase (I) and quadrature (Q) baseband signals with in-phase (I) and quadrature (Q) Transmit (TX) Local Oscillator (LO) signals from TX LO signal generator 390 to provide an upconverted signal. The filter 342 filters the upconverted signal to remove an undesired image caused by the frequency increase and noise in a reception frequency band. A Power Amplifier (PA)344 amplifies the signal from filter 342 to obtain a desired output power level and provides a transmit radio frequency signal. The transmit radio frequency signal is routed through duplexer/switch 346 and transmitted via antenna 348.

In the receive path, antenna 348 receives communication signals and provides a received Radio Frequency (RF) signal, which is routed through duplexer/switch 346 and provided to a Low Noise Amplifier (LNA) 352. Duplexer/switch 346 is designed to work with a particular Receive (RX) to Transmit (TX) (RX-to-TX) duplexer frequency separation to isolate the RX signal from the TX signal. The received RF signal is amplified by LNA 352 and filtered by filter 354 to obtain the desired RF input signal. Down-mixers 361a and 361b mix the output of filter 354 with in-phase (I) and quadrature (Q) Receive (RX) LO signals (i.e., LO _ I and LO _ Q) from an RX LO signal generator 380 to generate in-phase (I) and quadrature (Q) baseband signals. The in-phase (I) and quadrature (Q) baseband signals are amplified by amplifiers 362a and 362b and further filtered by lowpass filters 364a and 364b to obtain in-phase (I) and quadrature (Q) analog input signals, which are provided to data processor 310. In the exemplary configuration shown, data processor 310 includes analog-to-digital converters (ADCs) 316a and 316b for converting analog input signals to digital signals for further processing by data processor 310.

In fig. 3, a transmit local oscillator (TX LO) signal generator 390 generates in-phase (I) and quadrature (Q) TX LO signals for frequency upconversion, while a receive local oscillator (RX LO) signal generator 380 generates in-phase (I) and quadrature (Q) RX LO signals for frequency downconversion. Each LO signal is a periodic signal with a particular fundamental frequency. A phase-locked loop (PLL)392 receives timing information from data processor 310 and generates a control signal that is used to adjust the frequency and/or phase of the TX LO signals from TX LO signal generator 390. Similarly, PLL382 receives timing information from data processor 310 and generates a control signal that is used to adjust the frequency and/or phase of the RX LO signals from RX LO signal generator 380.

The wireless device 300 may support carrier aggregation and may (i) receive multiple downlink signals transmitted by one or more cells on multiple downlink carriers at different frequencies and/or (ii) transmit multiple uplink signals to one or more cells on multiple uplink carriers. For intra-segment carrier aggregation, transmissions are sent on different carriers of the same frequency band. For inter-segment carrier aggregation, transmissions are sent on multiple carriers of different frequency bands. However, those skilled in the art will appreciate that the aspects described herein may be implemented in systems, devices, and/or architectures that do not support carrier aggregation.

The power amplifier 344 may include one or more stages having, for example, driver stages, power amplification stages, or other components, which may be configured to amplify communication signals at one or more frequencies, in one or more frequency bands, and at one or more power levels. However, transistors configured to amplify communication signals are typically selected to operate at substantially increased frequencies, which further complicates thermal power specifications. Heterojunction bipolar transistors improve bipolar transistors by supporting greatly increased frequencies, e.g., up to several hundred gigahertz (GHz). Therefore, heterojunction bipolar transistors are often used in high speed circuits, such as RF chip designs that specify high power efficiency, including RF power amplifiers in mobile RF transceivers.

Fig. 4 is an example of a schematic diagram of the seebeck effect of a semiconductor thermocouple. The seebeck effect is the direct conversion of heat to electrical energy at the junction of different thermoelectric materials. Thermoelectric materials are a class of materials that convert a temperature difference into electrical energy and vice versa. This material utilizes the seebeck effect to generate electricity. A temperature gradient across the thermoelectric material can cause diffusion of charged carriers across the gradient, creating a voltage differential between the hot and cold sides of the material. Thus, the thermoelectric material may function as a generator in the presence of a temperature difference.

Fig. 4 shows a structure 400 of a seebeck element. The structure includes a first conductive member (e.g., n-type semiconductor) 402 and a second conductive member (e.g., p-type semiconductor) 404. The second conductive member 404 has a seebeck coefficient that is different from the seebeck coefficient of the first conductive member 402.

The first surface 408 of the first conductive member 402 and the first surface 410 of the second conductive member 404 are bonded to the first bonding member 406 (e.g., by ohmic contact). The first bonding member 406 is heated to a temperature T1 via a heated surface 422 (e.g., a thermally conductive material) and constitutes a high temperature portion. The second surface 412 of the first conductive member 402 is bonded to a second bonding member 416 (e.g., by ohmic contact), and the second surface 414 of the second conductive member 404 is bonded to a third bonding member 418 (e.g., by ohmic contact). The second engaging member 416 and the third engaging member 418 are set to a temperature T2, and constitute a low-temperature portion such that T1 > T2. A cooling surface (e.g., a heat sink) 420 may be coupled to the second and third bonding members 416, 418.

When the two surfaces of the first conductive member 402 and the second conductive member 404 have different temperatures (T1 and T2), an electric potential is obtained. For example, when first coupling member 406 is maintained at an elevated temperature (T1) and second coupling member 416 and third coupling member 418 are maintained at a lower temperature (e.g., room temperature T2), a voltage (e.g., a thermal electromotive force) is generated according to the seebeck effect that is proportional to the temperature difference between first coupling member 406, second coupling member 416, and third coupling member 418.

The seebeck effect efficiency of a thermoelectric material is characterized as a figure of merit (ZT) according to the following equation:

wherein S is a Seebeck coefficient or thermal power;

σ is the conductivity;

k is the thermal conductivity; and is

T is the absolute temperature.

As can be seen from equation 1, an increased (or large) seebeck coefficient and electrical conductivity and a corresponding decreased (or small) thermal conductivity results in an increased (or large) figure of merit (ZT).

The thermoelectric efficiency (e.g., seebeck effect efficiency) of some semiconductor structures (e.g., quantum wells) exhibits favorable thermal and electrical characteristics relative to other semiconductor structures (e.g., most semiconductor structures). One example of a semiconductor structure is shown in fig. 5.

Fig. 5 illustrates an example of a p-type quantum well structure 500 for heat dissipation. The quantum well structure 500 may include a silicon germanium/silicon (SiGe/Si) quantum lattice. The SiGe/Si quantum lattice may include a p-type Si barrier and undoped SiGe wells that are alternately stacked throughout the quantum well structure 500. For example, one layer of the quantum lattice comprises a p-type Si barrier, followed by another layer comprising undoped SiGe, and so on. In some embodiments, the number of layers may be twelve to twenty.

The thermoelectric efficiency of the SiGe/Si quantum well structure 500 is superior to most semiconductor structures. This advantage may be due to the confinement of carriers in the SiGe/Si quantum well structure 500, which increases the local density of states per unit volume near the fermi energy. Fermi energy is a concept in quantum mechanics and generally refers to the energy difference between the highest and lowest occupied single particle states in a quantum system of non-interacting fermi particles at absolute zero temperature. Confinement of carriers (e.g., electrons and holes) increases carrier density and mobility and reduces thermal conductivity. This advantage may also be due to reduced thermal conductivity due to phonon confinement and phonon scattering at the quantum well interface. However, the SiGe/Si quantum well structure is subject to strain that reduces power consumption.

Some devices, such as power amplifiers, have complex thermal power specifications that are difficult to meet. The thermal power specification may be based on the semiconductor structure implementation of the device. Some power amplifiers may be implemented with bipolar transistors, such as Heterojunction Bipolar Transistors (HBTs), as shown in fig. 6.

Figure 6 illustrates an example of a Heterojunction Bipolar Transistor (HBT) device 600. HBT device 600 may include an emitter 610, a base 602 contacting emitter 610, a collector 614 contacting base 602, and a subcollector 616 contacting collector 614. Emitter 610 includes emitter contact 624, the base includes base contact 604, and the collector includes collector contact 620. The subcollector 616 may be supported by a compound semiconductor substrate 618. In some implementations, emitter 610 is two hundred (200) nanometers (nm) thick, while substrate 602 is less than one hundred nanometers (100nm) thick. Further, the thickness of collector 614 is one thousand five hundred nanometers (1500nm) and the thickness of subcollector 616 is six hundred nanometers (600 nm). The emitter 610 is two microns wide and the substrate is two hundred microns thick. These values are exemplary only, and other values are possible.

Emitter 610 may be comprised of indium gallium arsenide (InGaAs), and/or indium gallium phosphide (GaInP). Base 602, collector 614, and subcollector 616 may each be comprised of gallium arsenide (GaAs). These materials are merely exemplary, and other materials may be used.

According to an aspect of the present disclosure, the subcollector 616 may be composed of a III-V compound semiconductor material or a II-VI compound semiconductor material. These compound semiconductor materials may include, but are not limited to, gallium arsenide (GaAs), indium phosphide (InP), gallium nitride (GaN), gallium antimony (GaSb), gallium phosphide (GaP), indium gallium arsenide (InGaAs), aluminum gallium arsenide (AlGaAs), indium gallium phosphide (InGaP), aluminum gallium antimony (algassb), indium gallium antimony (InGaSb), indium gallium nitride (InGaN), aluminum gallium nitride (AlGaN), indium gallium arsenide phosphide (InGaAsP), indium gallium indium arsenide (InGaAsSb), or indium gallium arsenide: nitride (InGaAs: N). These are merely exemplary, and other materials are possible.

As noted, the thermal conductivity of HBT device 600 is very poor because HBT device 600 incorporates compound semiconductor materials (e.g., GaAs collector supporting InGaAs/InGaP emitter/base materials). Heat from heat source 630 is stored in collector 614 and base 602 of HBT device 600. HBT device 600 may be damaged and may eventually fail without some way of dissipating heat from heat source 630. To mitigate heat dissipation, some implementations use a thermal sensing device integrated in the power amplifier, as shown in fig. 7.

Figure 7 shows HBT power amplifier 700 for mitigating power consumption. HBT power amplifier 700 may include a first row 702 of HBT devices 710, a second row 704 of HBT devices 710, a third row 706 of HBT devices 710, a fourth row 708 of HBT devices 710, and a thermal sensing device 714. Thermal sensing device 714 may comprise an HBT device. Each row of HBT power amplifier 700 includes eight HBT devices 710. The thermal sensing device may be placed close to the row of HBT devices that may become hottest. Thermal sensing (e.g., with thermal sensing device 714) may be based on a relationship between device performance and temperature, where device performance decreases with increasing temperature. For example, the electrical performance of thermal sensing device 714 may be monitored as thermal sensing device 714 is subjected to heat from HBT device 710. Some parameters of HBT power amplifier 700 may be adjusted based on monitoring of thermal sensing device 714 to mitigate power consumption.

In normal operation, the junction temperature of each HBT device 710 inside HBT power amplifier 700 may be as high as 200 ℃. Of course, this higher junction temperature is not preferred as it may lead to device burn-out or reduce device reliability. Thermal sensing device 714 may be included in HBT power amplifier 700 to mitigate power consumption. Due to space constraints, a single or limited number of thermal sensing devices 714 are used in HBT power amplifier 700. The limited number of thermal sensing devices 714 placed in HBT power amplifier 700 is not sufficient to accurately capture the heat dissipation within HBT power amplifier 700. For example, the limited number of thermal sensing devices 714 may not be sufficient to capture the location of multiple hot spots, which may result in inaccurate measurements.

Furthermore, conventional thermal sensing device 714 is on the same chip level as HBT device 710 and cannot accurately sense the junction temperature directly below HBT device 710. For example, although the conventional thermal sensing device 714 may sense heat (e.g., 630) on the same chip level, the conventional thermal sensing device 714 may not be able to accurately capture heat well below that chip level. Furthermore, thermal sensing device 714 may be located more than twenty or thirty microns from HBT device 710, and thus thermal sensing device 714 may not be able to detect each HBT device 710. Some HBT devices are located further away (e.g., more than two or three hundred microns) from thermal sensing device 714.

Although HBT power amplifier 700 includes other circuitry and controls, the hottest region of HBT power amplifier 700 is the power output stage that includes HBT device 710. Another problem with the power consumption of HBT power amplifier 700 is that HBT devices 710 of each row operate differently. Multiple hot spot locations for HBT power amplifier 700 are illustrated in figure 8.

Figure 8 illustrates an example thermal image 800 of the temperature profile of HBT power amplifier 700 of figure 7. Mitigating power consumption during operation of HBT power amplifier 700 depends on transfer and moving hot spot 802. A thermal image (e.g., an infrared image) of four rows of HBT devices 710 is taken, the first row 702 being the hottest, followed by the second row 704. This non-uniformity presents power consumption problems, including problems associated with the placement of the thermal sensing device 714. Although most of the hotspots in thermal image 800 are located in area 802A, these hotspots are mobile (in terms of location in HBT power amplifier 700) and spread throughout HBT power amplifier 700. Placing the thermal sensing device 714 over each possible hot spot may be challenging or impossible.

Unfortunately, one significant challenge in designing HBT-based power amplifiers is thermal stability, which may reduce the size of the safe operating area. In HBT-based power amplifiers, heat dissipation becomes more and more problematic. In particular, the compound semiconductor materials used for HBT-based power amplifiers may cause local thermal hot spots. Since hot spots of localized heat are embedded in the device, this may reduce the ability to cool the hot spots and achieve low junction temperatures.

As shown in figures 9A and 9B, aspects of the present disclosure may address this problem by incorporating a well structure (e.g., quantum well, superlattice, etc.) as a layer between the HBT subcollector and the HBT substrate.

FIG. 9A illustrates a Heterojunction Bipolar Transistor (HBT) thermal sensing device 900A for power consumption according to the present disclosure. For purposes of illustration, some of the labels and numbering of the devices and features of fig. 9A are similar to those of fig. 6 and 7. For example, similar to HBT device 600, HBT thermal sensing device 900A may comprise an HBT active device comprising an emitter 610, a base 602 contacting emitter 610, and a collector 614 contacting base 602. The HBT thermal sensing device 900A may also include a subcollector 616 that contacts the collector 614. The subcollector 616 supports the emitter 610, collector 614, and base 602.

Fig. 9A further includes a well structure 934 (e.g., a quantum well or superlattice) supported by the compound semiconductor substrate 618. For example, the substrate may be a GaAs substrate with a thickness of seventy-five microns. Well structures 934 may be lattice matched to substrate 618, i.e., have the same dielectric constant. Well structure 934 may be formed as one or more layers between the HBT active device and subcollector 616 or substrate 618. For example, quantum well 934 may be formed on an entire wafer on compound semiconductor substrate 618, and active devices are fabricated on quantum well 934. Well structure 934 may be a p-type well structure or an n-type well structure. The distance of well structure 934 from subcollector 616 may be based on a specified device performance.

In one aspect, quantum well 934 may be comprised of a material compatible or matched with the material of HBT device 600. For example, subcollector 616 may be composed of a III-V compound semiconductor material, and quantum well 934 may also be composed of a III-V compound semiconductor material. Further, well structure 934 (e.g., AlGaAs/GaAs or InGaP/GaAs) and compound semiconductor substrate 618 may be composed of substantially the same material (e.g., GaAs). Well structure 934 comprises two materials, a large bandgap compound semiconductor material and a small bandgap compound semiconductor material. For example, AlGaAs and InGaP are large bandgap compound semiconductor materials, and GaAs is a small bandgap compound semiconductor material.

Matching the material of the quantum well structure to the material of HBT device 600 reduces strain and thus improves power consumption. The III-V material of the quantum well structure may be grown on the substrate of the wafer before the active devices (e.g., emitter 610, base 602, and collector 614) are fabricated. Thus, quantum wells 934 are distributed across all active devices fabricated on the wafer. The thermal sensing features of HBT thermal sensing device 900A may be fabricated within quantum well 934 under the active devices to enable thermal sensing under each active device.

Thus, aspects of the present disclosure enable thermal sensing directly below a heat source. For example, monitoring of the thermal sensing device may benefit more than the heat dissipation associated with the heat source 630, which is at the same chip level as the active device. Heat source 630 may correspond to one or more junctions of HBT device 710. For example, thermal sensing features implemented in quantum well 934 also monitor heat dissipation, which is illustrated by thermal portion 930 below the active device. Thus, fabricating the sensing features of HBT thermal sensing device 900A below heat source 630 (e.g., below subcollector 616 or near substrate 618) achieves a thermal ranging heat source 630 of only one to two microns.

HBT thermal sensing device 900A can also include a hot side electrode 928, a first cold side electrode 926, and a second cold side electrode 932. A hot side electrode 928, a first cold side electrode 926, and a second cold side electrode 932 are each in electrical contact with the well structure 934. Hot-side electrode 928 may be located closer to a heat source (e.g., 630) of HBT thermal sensing device 900A relative to first cold-side electrode 926 and/or second cold-side electrode 932. Hot side electrode 928 can be used to monitor junction temperature to control HBT device bias to improve performance of the HBT-based power amplifier. In one aspect of the present disclosure, the hot-side electrode 928 may be a back electrode that passes through the substrate 618 to the well structure 934. Similarly, a first cold-side electrode 926 and a second cold-side electrode 932 may be provided through the substrate 618 to a back electrode of the well structure 934. In one aspect of the present disclosure, the hot side electrode 928 electrically contacts the well structure 934 and is aligned with the emitter 610.

The hot side electrode 928 may be used as a terminal for a hot spot (e.g., near the heat source 630 and/or hot portion 930) while the first cold side electrode 926 (near the cold portion 922) and/or the second cold side electrode 932 (near the cold portion 924) may be used as a terminal for a cold spot. For example, an electrical potential may be detected between the hot-side electrode 928 and the first cold-side electrode 926 or the second cold-side electrode 932. The hot side electrode 928 corresponds to the positive terminal (+) and the first or second cold side electrode 926, 932 corresponds to the negative terminal (-). Because the thermal sensing features of HBT thermal sensing device 900A may be implemented below or near each HBT device 710, the present disclosure enables selective monitoring of each HBT device 710.

FIG. 9B illustrates another Heterojunction Bipolar Transistor (HBT) thermal sensing device 900B for power consumption in accordance with aspects of the present disclosure. For purposes of illustration, some of the labels and numbering of the devices and features of fig. 9B are similar to those of fig. 6, 7 and 9A. For example, similar to HBT device 600, HBT thermal sensing device 900B may comprise an HBT active device comprising an emitter 610, a base 602 contacting emitter 610, and a collector 614 contacting base 602. Like HBT thermal sensing device 900A, HBT thermal sensing device 900B also includes subcollector 616 that contacts collector 614.

In addition to the well structure 934, fig. 9B includes an isolation layer 936. In one aspect, isolation layer 936 is disposed between HBT subcollector 616 and well structure 934. Because HBT device 710 is a radio frequency device that is subject to high frequency operation, isolation layers are included to avoid cross-talk and interference between the active HBT device and well structure 934.

Figure 10 illustrates an HBT power amplifier 1000 for mitigating power or heat dissipation in accordance with aspects of the present disclosure. For purposes of illustration, some of the labels and numbering of the devices and features of fig. 10 are similar to those of fig. 7, 9A and 9B. For example, similar to HBT power amplifier 700, HBT power amplifier 1000 may include a first row 702 of HBT devices, a second row 704 of HBT devices, a third row 706 of HBT devices, and a fourth row 708 of HBT devices.

However, rather than HBT device 710 having thermal sensing features based on well structure 934, HBT power amplifier 1000 includes HBT thermal sensing device 1010 (e.g., HBT thermal sensing device 900A or HBT thermal sensing device 900B). HBT power amplifier 1000 includes positive (+) and negative (-) terminals extending from the detector circuit (e.g., thermal sensor) of a designated HBT thermal sensing device 1010. The positive and negative terminals of HBT thermal sensing device 1010 may be coupled to control signal circuitry or bias circuitry to facilitate power or heat dissipation of HBT power amplifier 1000.

Fabrication of HBT thermal sensing device 1010 may include fabrication of an active HBT device and fabrication of thermal sensing features (e.g., thermal sensors) in well structure 934. Wherein the fabrication of the thermal sensing features includes the fabrication of electrodes (e.g., the hot-side electrode 928, the first cold-side electrode 926, and the second cold-side electrode 932). Fabrication of the thermal sensing features of HBT thermal sensing device 900A or HBT thermal sensing device 900B may be accomplished according to a frontside process in which emitter metal down to collector metal is fabricated on well structure 934, followed by etching of the well structure to form the electrodes. Alternatively, fabrication of the thermal sensing features of HBT thermal sensing device 900A or HBT thermal sensing device 900B may be performed according to a backside process performed after fabrication of the active HBT device on the front side. This process is followed by the fabrication of thermal sensing features using a backside process. Fabricating the thermal sensing feature may include fabricating a via to couple the thermal sensing feature to the active HBT device.

All of the layers of HBT thermal sensing device 900A and HBT thermal sensing device 900B may be formed by growth (e.g., epitaxial growth). For example, a buffer layer may be grown on a substrate (e.g., a GaAs buffer) to form a buffered substrate (e.g., a GaAs substrate). Some implementations may not specify a buffer layer. Well structures 934 may be grown on substrate 618 or over the entire wafer. For example, one hundred angstroms of AlGaAs is grown, followed by twenty angstroms of GaAs. This process is repeated until a sufficient AlGaAs/GaAs layer is obtained. Thermal sensing features are formed in the well structure 934.

The thermal sensing feature may be implemented as a detection circuit that monitors heat dissipation in HBT thermal sensing device 1010. In some aspects of the disclosure, an isolation layer 936 is grown on the well structure 934. The spacer layer may not be doped. For example, the spacer layer may be composed of undoped GaAs or undoped AlGaAs. When isolation layer 936 is not included, an active HBT device including subcollector 616 (e.g., a highly doped layer) may be grown on isolation layer 936 or well structure 934. For example, the subcollector layer may be n-doped. After the subcollector 616, the collector 614, base 602, and emitter 610 are grown.

Figure 11 is a flow chart 1100 illustrating a method of fabricating a Heterojunction Bipolar Transistor (HBT) thermal sensing device according to aspects of the present disclosure. The blocks in flowchart 1100 may or may not be performed in the order shown, and in some aspects may be performed at least partially in parallel.

At block 1102, a Heterojunction Bipolar Transistor (HBT) active device is formed. For example, the HBT active device may be a component of an HBT-based power amplifier, such as HBT power amplifier 1000 shown in figure 10. As shown in fig. 9A and 9B, the HBT active device may include an emitter 610, a base 602 contacting the emitter 610, a collector 614 contacting the base 602, and a subcollector 616 contacting the collector 614. Emitter 610 includes emitter contact 624, the base includes base contact 604, and the collector includes collector contact 620. The subcollector 616 may be supported by a compound semiconductor substrate 618. According to aspects, HBT active devices may be formed according to a front-end-of-the-line (FEOL) process.

At block 1104, a quantum well structure is formed on a substrate of the HBT active device. For example, as shown in figures 9A and 9B, well structure 934 may be formed as one or more layers between HBT active device and/or subcollector 616 and substrate 618.

At block 1106, a first electrode (e.g., a hot side electrode) in electrical contact with the quantum well structure is formed. For example, as shown in figures 9A and 9B, HBT thermal sensing device 900A or 900B includes a hot side electrode 928. A hot side electrode 928 is in electrical contact with the well structure 934.

At block 1108, a second electrode (e.g., a cold-side electrode) in electrical contact with the quantum well structure is formed. For example, as shown in figures 9A and 9B, HBT thermal sensing device 900A or 900B includes a first cold-side electrode 926 and a second cold-side electrode 932. The first and second cold-side electrodes 926, 932 are each in electrical contact with the well structure 934.

In accordance with another aspect of the present disclosure, a Heterojunction Bipolar Transistor (HBT) thermal sensing device is described. The HBT thermal sensing device may include first means for electrically contacting the quantum well structure. As shown in fig. 9A and 9B, the first means may, for example, include a hot-side electrode 928. The HBT thermal sensing device may further comprise second means for electrically contacting the quantum well structure. As shown in fig. 9A and 9B, the second device may include, for example, a cold-side electrode 926 and/or a cold-side electrode 932. In another aspect, the aforementioned means may be any electrode configured to perform the functions recited by the aforementioned means.

Fig. 12 is a block diagram illustrating an example wireless communication system 1200 in which an aspect of the present disclosure may be advantageously employed. For purposes of illustration, figure 12 shows three remote units 1220, 1230, and 1250 and two base stations 1240. It will be appreciated that a wireless communication system may have many more remote units and base stations. Remote units 1220, 1230, and 1250 include IC devices 1225A, 1225C, and 1225B that include the disclosed HBT thermal sensing devices. It will be appreciated that other devices may also include the disclosed HBT thermal sensing devices, such as base stations, user equipment, and network devices. Figure 12 shows forward link signals 1280 from the base stations 1240 and the remote units 1220, 1230, and 1250 and reverse link signals 1290 from the remote units 1220, 1230, and 1250 to base stations 1240.

In fig. 12, remote unit 1220 is illustrated as a mobile telephone, remote unit 1230 is illustrated as a portable computer, and remote unit 1250 is illustrated as a fixed location remote unit in a wireless local loop system. For example, the remote units may be mobile phones, hand-held Personal Communication Systems (PCS) units, portable data units such as Personal Digital Assistants (PDAs), GPS enabled devices, navigation devices, set top box boxes, music players, video players, entertainment units, fixed location data units such as meter reading equipment, or other communication devices that store or retrieve data or computer instructions, or a combination thereof. Although fig. 12 illustrates remote units according to aspects of the disclosure, the disclosure is not limited to these exemplary illustrated units. Aspects of the present disclosure may be suitably employed in a number of devices including the disclosed HBT thermal sensing devices.

The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit. For example, the example apparatus, methods, and systems disclosed herein may be applied to multi-SIM wireless devices that subscribe to multiple communication networks and/or communication technologies. The apparatus, methods, and systems disclosed herein may be implemented digitally and differentially, among other ways. The various components illustrated in the figures may be implemented as software and/or firmware on, for example, but not limited to, a processor, an ASIC/FPGA/DSP, or dedicated hardware. The features and attributes of the specific example aspects disclosed above may also be combined in different ways to form additional aspects, all of which fall within the scope of the present disclosure.

The foregoing method descriptions and process flow diagrams are provided merely as illustrative examples and are not intended to require or imply that the operations of the method must be performed in the order presented. Certain operations may be performed in various orders. The terms "thereafter," "then," "next," and the like are not intended to limit the order of the operations. These words are used only to guide the reader through the description of the method.

The various illustrative logical blocks, modules, circuits, and operations described in connection with the aspects disclosed herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and operations have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure.

The hardware used to implement the various illustrative logics, logical blocks, modules, and circuits described in connection with the aspects disclosed herein may be implemented or performed with a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of receiver devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration. Alternatively, some operations or methods may be performed by circuitry that is specific to a given function.

In one or more exemplary aspects, the functions described herein may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored as one or more instructions or code on a non-transitory computer-readable storage medium or a non-transitory processor-readable storage medium. The operations of the methods or algorithms disclosed herein may be embodied in processor-executable instructions, which may be present on a non-transitory computer-readable or processor-readable storage medium. A non-transitory computer-readable or processor-readable storage medium may be any storage medium that is accessible by a computer or a processor. By way of example, and not limitation, such non-transitory computer-readable or processor-readable storage media can include Random Access Memory (RAM), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), FLASH memory, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store desired program code in the form of instructions or data structures and that can be accessed by a computer. Disk and disc, as used herein, includes Compact Disc (CD), laser disc, optical disc, Digital Versatile Disc (DVD), floppy disk and blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above are also included within the scope of non-transitory computer-readable and processor-readable media. Further, the operations of a method or algorithm may reside as one or any combination or set of codes and/or instructions on a non-transitory processor-readable storage medium and/or computer-readable storage medium, which may be incorporated into a computer program product.

While the present disclosure provides certain exemplary aspects and applications, other aspects that will be apparent to those of ordinary skill in the art, including aspects that do not provide all of the features and advantages set forth herein, are also within the scope of the present disclosure. For example, the apparatus, methods, and systems described herein may be performed digitally and differentially, among other ways. Accordingly, the scope of the present disclosure is intended to be defined only by reference to the appended claims.