阅读说明：本技术 Iii/v族材料的高生长速率沉积 (High growth rate deposition of III/V materials ) 是由 洛里·D·华盛顿 大卫·P·布尔 格雷格·海格什 何甘 于 2018-09-07 设计创作，主要内容包括：本公开的各方面涉及以高速率外延生长III/V族材料的工艺,如约30μm/小时或更高,例如,约40μm/小时、约50μm/小时、约55μm/小时、约60μm/小时、约70μm/小时、约80μm/小时和约90～120μm/小时的沉积速率。III/V族材料或膜可用于太阳能、半导体或其他电子器件应用中。可以在气相沉积工艺期间在设置于支撑衬底上或上方的牺牲层上形成或生长III/V族材料。随后,在外延剥离(ELO)工艺期间,可以从支撑衬底移除III/V族材料。III/V族材料是包含砷化镓、砷化铝镓、砷化镓铟、砷化镓铟氮化物、磷化镓铝铟、其磷化物、其氮化物、其衍生物、其合金或其组合的外延生长层的薄膜。(Aspects of the present disclosure relate to processes for epitaxially growing group III/V materials at high rates, such as about 30 μm/hr or higher, e.g., about 40 μm/hr, about 50 μm/hr, about 55 μm/hr, about 60 μm/hr, about 70 μm/hr, about 80 μm/hr, and deposition rates of about 90-120 μm/hr. The III/V materials or films can be used in solar, semiconductor, or other electronic device applications. The group III/V material may be formed or grown on a sacrificial layer disposed on or over a support substrate during a vapor deposition process. Subsequently, during an Epitaxial Lift Off (ELO) process, the III/V material may be removed from the support substrate. The III/V material is a thin film comprising an epitaxially grown layer of gallium arsenide, aluminum gallium arsenide, indium gallium arsenide nitride, gallium aluminum indium phosphide, phosphide thereof, nitride thereof, derivatives thereof, alloys thereof, or combinations thereof.)

1. A method for forming a semiconductor material on a wafer, comprising:

Heating the wafer within the processing system to a deposition temperature in a range between 550 ℃ and 900 ℃;

Exposing the wafer to a deposition gas comprising a gallium precursor gas and arsine, a total pressure in a range between 20 torr and 1000 torr; and

Depositing one or more layers having gallium arsenide on the wafer at a deposition rate selected from the group consisting of 30 μm/hr, 40 μm/hr, 50 μm/hr, 55 μm/hr, 60 μm/hr, 70 μm/hr, 80 μm/hr, and 90-120 μm/hr,

Wherein the multiple layers including the one or more layers form a gallium arsenide cell.

2. The method of claim 1, wherein the deposition temperature ranges between 680 ℃ and 850 ℃ for a deposition rate of 90-120 μm/hr.

3. The method of claim 1, wherein the deposition gas further comprises an aluminum precursor gas and the gallium arsenide layer further comprises aluminum.

4. The method of claim 3, wherein the aluminum precursor gas comprises an alkyl aluminum compound.

5. The process of claim 4, wherein the alkyl aluminum compound is trimethylaluminum or triethylaluminum.

6. The method of claim 1, wherein the deposition gas further comprises a carrier gas comprising a mixture of hydrogen and argon.

7. The method of claim 1, wherein the n-type portion of the gallium arsenide cell is deposited over a sacrificial layer having a thickness between 1nm and 20nm, the sacrificial layer is disposed over a buffer layer, and the buffer layer is disposed over the wafer.

8. The method of claim 1, wherein:

The multiple layers form an n-type gallium arsenide stack and a p-type gallium arsenide stack,

the n-type gallium arsenide stack has an emitter layer disposed on or over a first passivation layer disposed on or over a first contact layer, and

The p-type gallium arsenide stack has a second contact layer disposed on or over a second passivation layer disposed on or over an absorption layer.

9. The method of claim 1, wherein the deposition temperature ranges between 600 ℃ and 800 ℃.

10. The method of claim 1, wherein the total pressure ranges from the group consisting of:

Between 20 torr and 760 torr,

Between 50 torr and 450 torr, and

Between 100 torr and 250 torr.

11. a method for forming a semiconductor material on a wafer, comprising:

Heating the wafer within the processing system to a deposition temperature in a range between 550 ℃ and 900 ℃;

Exposing the wafer to a deposition gas comprising a gallium precursor gas, an aluminum precursor gas, and arsine, at a total pressure in a range between 20 torr and 1000 torr; and

Depositing one or more layers on the wafer at a deposition rate selected from the group consisting of deposition rates of 30 μm/hr, 40 μm/hr, 50 μm/hr, 55 μm/hr, 60 μm/hr, 70 μm/hr, 80 μm/hr, and 90-120 μm/hr,

Wherein the one or more layers comprise aluminum gallium arsenide, and the multiple layers comprising the one or more layers form a gallium arsenide cell.

12. The method of claim 11, wherein the deposition temperature ranges between 680 ℃ and 850 ℃ for the deposition rate of 90-120 μm/hr.

13. the method of claim 11, wherein the n-type portion of the gallium arsenide cell is deposited over a sacrificial layer having a thickness between 1nm and 20nm, the sacrificial layer is disposed over a buffer layer, and the buffer layer is disposed over the wafer.

14. The method of claim 11, wherein:

The multiple layers form an n-type gallium arsenide stack and a p-type gallium arsenide stack,

The n-type gallium arsenide stack has an emitter layer disposed on or over a first passivation layer disposed on or over a first contact layer, and

The p-type gallium arsenide stack has a second contact layer disposed on or over a second passivation layer disposed on or over an absorption layer.

15. The method of claim 11, wherein the deposition temperature ranges between 600 ℃ and 800 ℃.

16. The method of claim 11, wherein the range of total pressures is selected from the group consisting of:

Between 20 torr and 760 torr,

Between 50 torr and 450 torr, and

Between 100 torr and 250 torr.

17. A method for forming a semiconductor material on a wafer, comprising:

heating the wafer within the processing system to a deposition temperature in a range between 550 ℃ and 900 ℃;

Exposing the wafer to a deposition gas comprising a gallium precursor gas, an indium precursor gas, a nitrogen precursor gas, and arsine, at a total pressure in a range between 20 torr and 1000 torr; and

Depositing one or more layers on the wafer at a deposition rate selected from the group consisting of deposition rates of 30 μm/hr, 40 μm/hr, 50 μm/hr, 55 μm/hr, 60 μm/hr, 70 μm/hr, 80 μm/hr, and 90-120 μm/hr,

Wherein the one or more layers comprise gallium, arsenic, nitrogen, and indium, and the multilayer comprising the one or more layers forms a gallium arsenide cell.

18. The method of claim 17, wherein the deposition temperature ranges between 680 ℃ and 850 ℃ for the deposition rate of 90-120 μm/hr.

19. The method of claim 17, wherein the nitrogen precursor gas comprises a compound selected from the group consisting of hydrazine, methylhydrazine, dimethylhydrazine, derivatives thereof, and combinations thereof.

20. The method of claim 17, wherein the n-type portion of the gallium arsenide cell is deposited over a sacrificial layer having a thickness between 1nm and 20nm, the sacrificial layer is disposed over a buffer layer, and the buffer layer is disposed over the wafer.

21. The method of claim 17, wherein:

The multiple layers form an n-type gallium arsenide stack and a p-type gallium arsenide stack,

the n-type gallium arsenide stack has an emitter layer disposed on or over a first passivation layer disposed on or over a first contact layer, and

the p-type gallium arsenide stack has a second contact layer disposed on or over a second passivation layer disposed on or over an absorption layer.

22. The method of claim 17, wherein the deposition temperature is between 400 ℃ and 500 ℃.

23. The method of claim 17, wherein the total pressure ranges selected from the group consisting of:

Between 20 torr and 760 torr,

Between 50 torr and 450 torr, and

Between 100 torr and 250 torr.

24. A method of forming a cell, comprising:

heating a substrate comprising gallium and arsenic to a temperature in a range between 550 ℃ and 900 ℃ within a processing system;

exposing the substrate to a deposition gas comprising a gallium precursor gas and arsine;

Depositing an n-type contact layer comprising gallium and arsenic over the substrate, the n-type contact layer having a thickness of 100nm or less;

Depositing an n-type passivation layer comprising gallium, aluminum, and arsenic over the substrate, the n-type passivation layer having a thickness of 100nm or less;

Depositing an n-type absorber layer comprising gallium and arsenic over the substrate, the n-type emitter layer having a thickness of 3000nm or less;

Depositing a p-type passivation layer comprising gallium, aluminum, and arsenic over the substrate, the p-type passivation layer having a thickness of 300nm or less; and

Depositing a p-type contact layer comprising gallium and arsenic over the substrate, the p-type contact layer having a thickness of 100nm or less,

Wherein each of the n-type contact layer, the n-type passivation layer, the n-type absorption layer, the p-type passivation layer, and the p-type contact layer is deposited at a deposition rate selected from the group consisting of a deposition rate of 30 μm/hr, 40 μm/hr, 50 μm/hr, 55 μm/hr, 60 μm/hr, 70 μm/hr, 80 μm/hr, and 90-120 μm/hr.

25. the method of claim 24, wherein the deposition temperature ranges between 680 ℃ and 850 ℃ for said deposition rate of 90-120 μm/hr.

26. The method of claim 24, further comprising:

Depositing a sacrificial layer comprising aluminum and arsenic over the substrate at a deposition rate selected from the group consisting of 30 μm/hr, 40 μm/hr, 50 μm/hr, 55 μm/hr, 60 μm/hr, 70 μm/hr, 80 μm/hr, and 90-120 μm/hr, the sacrificial layer having a thickness of 20nm or less;

Depositing the n-type contact layer over the sacrificial layer;

Depositing the n-type passivation layer over the n-type contact layer;

depositing the n-type absorption layer over the n-type passivation layer;

Depositing the p-type passivation layer over the p-type absorption layer; and

Depositing the p-type contact layer over the p-type passivation layer.

27. The method of claim 26, further comprising:

Depositing a buffer layer comprising gallium and arsenic on the substrate at a deposition rate selected from the group consisting of a deposition rate of 30 μm/hr, a deposition rate of 40 μm/hr, a deposition rate of 50 μm/hr, a deposition rate of 55 μm/hr, and a deposition rate of 60 μm/hr or higher, the buffer layer having a thickness of less than 300 nm; and

Depositing the sacrificial layer over the buffer layer.

28. The method of claim 24, further comprising:

Depositing a sacrificial layer comprising aluminum and arsenic over the substrate at a deposition rate selected from the group consisting of a deposition rate of 30 μm/hr, 40 μm/hr, 50 μm/hr, 55 μm/hr, 60 μm/hr, 70 μm/hr, 80 μm/hr, and 90-120 μm/hr, the sacrificial layer having a thickness of 20nm or less.

29. The method of claim 28, further comprising:

Depositing a buffer layer comprising gallium and arsenic on the substrate at a deposition rate selected from the group consisting of a deposition rate of 30 μm/hr, 40 μm/hr, 50 μm/hr, 55 μm/hr, 60 μm/hr, 70 μm/hr, 80 μm/hr, and 90-120 μm/hr, the buffer layer having a thickness of less than 300 nm; and

Depositing the sacrificial layer over the buffer layer.

30. The method of claim 24, wherein exposing the substrate to a deposition gas further comprises:

exposing the substrate to a total pressure of 450 torr or less, or

Exposing the substrate to a total pressure of at least 780 torr.

Technical Field

Embodiments of the present disclosure generally relate to processes for depositing materials for solar, semiconductor, or other electronic device applications, and more particularly to epitaxial growth of III/V materials.

background

Group III/V materials, such as gallium arsenide or gallium aluminum arsine, may be deposited or formed by epitaxial growth during a Chemical Vapor Deposition (CVD) process. However, epitaxial growth of high quality group III/V materials is typically very slow. A typical CVD process can epitaxially grow group III/V materials at a deposition rate in the range of about 1 μm/hr to about 3 μm/hr. The quality of the epitaxial material is typically greatly reduced by slightly increasing the deposition rate. Typically, group III/V materials grown at a deposition rate of about 5 μm/hr are of low quality and typically have structural defects within the crystal lattice and/or comprise amorphous materials.

Accordingly, there is a need for a deposition process for depositing high quality epitaxial group III/V materials at high growth rates (e.g., at least greater than 5 μm/hr).

disclosure of Invention

Embodiments of the present disclosure generally relate to processes for epitaxially growing group III/V materials at high growth or deposition rates, such as about 30 μm/hr or higher, for example, about 40 μm/hr, about 50 μm/hr, about 55 μm/hr, about 60 μm/hr, about 70 μm/hr, about 80 μm/hr, or about 90-120 μm/hr. As used herein, the term "higher" in relation to growth or deposition rate may refer to higher deposition rates, including those described in the context of the present disclosure. As used herein, the term "about" may represent an approximation that may be within ± 1%, ± 2%, ± 3%, ± 5%, ± 10%, ± 15% or ± 20% of the nominal value. Further, as used herein, a range of 90 to 120 μm/hr may represent one or more different growth or deposition rates, including about 90 μm/hr, about 95 μm/hr, about 100 μm/hr, about 105 μm/hr, about 110 μm/hr, about 115 μm/hr, or about 120 μm/hr. The deposited III/V materials or films can be used in solar, semiconductor, or other electronic device applications. In some embodiments, the group III/V material may be formed or grown on a sacrificial layer disposed on or over a support substrate during a vapor deposition process. Subsequently, during an Epitaxial Lift Off (ELO) process, the III/V material may be removed from the support substrate. The III/V material is a thin film of an epitaxially grown layer comprising gallium arsenide, aluminum gallium arsenide, indium gallium arsenide, gallium indium arsenide nitride, gallium indium aluminum phosphide, phosphides thereof, nitrides thereof, derivatives thereof, alloys thereof, or combinations thereof. The III/V materials may also be referred to as III/V semiconductors or III/V semiconductor materials.

In one embodiment, a method for forming a group III/V material containing gallium arsenide on a wafer is provided, the method comprising: heating the wafer to a deposition temperature of about 600 ℃ or greater within a processing system; exposing the wafer to a deposition gas comprising a gallium precursor gas and arsine; and depositing a gallium arsenide layer on the wafer at a deposition rate of about 30 μm/hour or greater. As used herein, the term "30 μm/hr or higher" can refer to a growth or deposition rate of, for example, about 40 μm/hr, about 50 μm/hr, about 55 μm/hr, about 60 μm/hr, about 70 μm/hr, about 80 μm/hr, or about 90-120 μm/hr. Further, as used herein, the term "higher" in relation to the deposition temperature may refer to higher temperatures, including those described in the context of the present disclosure. In another embodiment, the wafer is heated to a deposition temperature of about 650 ℃ or greater within a processing system and exposed to a deposition gas containing a gallium precursor gas, an aluminum precursor gas, and arsine. The group III/V material containing the aluminum gallium arsenide layer is grown at a deposition rate of about 30 μm/hr or higher. The deposition temperature may range between about 680 ℃ and about 850 ℃ for deposition rates of 90-120 μm/hr.

in another embodiment, a method comprises: heating the wafer to a deposition temperature of about 600 ℃ or greater within the processing system; exposing the wafer to a deposition gas containing a gallium precursor gas, an indium precursor gas, and arsine; and depositing a group III/V layer or material on the wafer at a deposition rate of about 30 μm/hr or greater (e.g., a deposition rate of 90-120 μm/hr). The III/V layer or material contains gallium, arsenic, and indium. In one embodiment, the deposition temperature is in a range from about 650 ℃ to about 800 ℃. In some embodiments, the gallium precursor gas contains trimethyl gallium and the indium precursor gas contains trimethyl indium. The deposition temperature may range between about 680 ℃ and about 850 ℃ for deposition rates of 90-120 μm/hr.

in some embodiments, the deposition rate or growth rate can be about 40 μm/hr or higher, such as about 50 μm/hr or higher, preferably about 55 μm/hr or higher, more preferably about 60 μm/hr or higher (e.g., deposition rates of 90-120 μm/hr). In other embodiments, the deposition temperature may be about 600 ℃ or higher, or may be about 700 ℃ or higher, or may be about 800 ℃ or higher, or may be about 850 ℃. In some embodiments, the deposition temperature may be in the range of about 550 ℃ to about 900 ℃. In other embodiments, the deposition temperature may be in the range of about 600 ℃ to about 800 ℃. In other embodiments, the deposition temperature may be in the range of about 650 ℃ to about 750 ℃. In other embodiments, the deposition temperature may be in the range of about 650 ℃ to about 720 ℃. The deposition temperature may range between about 680 ℃ and about 850 ℃ for deposition rates of 90-120 μm/hr.

In another embodiment, a method comprises: heating the wafer to a deposition temperature of about 600 ℃ or greater within the processing system; exposing the wafer to a deposition gas containing a gallium precursor gas, an indium precursor gas, a nitrogen precursor gas, and arsine; depositing a group III/V layer or material on the wafer at a deposition rate of about 30 μm/hr or more (e.g., a deposition rate of 90-120 μm/hr), wherein the group III/V layer or material comprises gallium, arsenic, indium, and nitrogen. The nitrogen precursor gas may contain hydrazine, methylhydrazine, dimethylhydrazine, derivatives thereof, or combinations thereof. In one embodiment, the nitrogen precursor gas contains dimethylhydrazine. In another embodiment, the nitrogen precursor gas contains hydrazine. In some embodiments, the gallium precursor gas contains trimethyl gallium and the indium precursor gas contains trimethyl indium. The deposition temperature may range between about 680 ℃ and about 850 ℃ for deposition rates of 90-120 μm/hr.

In another embodiment, a method comprises: heating the wafer to a deposition temperature of about 600 ℃ or greater within the processing system; exposing the wafer to a deposition gas containing a gallium precursor gas, an indium precursor gas, an aluminum precursor, and a phosphorus precursor; depositing a group III/V layer or material on the wafer at a deposition rate of about 30 μm/hr or more (e.g., a 90-120 μm/hr deposition rate), wherein the group III/V layer or material comprises gallium, indium, aluminum, and phosphorus. In one embodiment, the gallium precursor contains trimethyl gallium, the aluminum precursor contains trimethyl aluminum, the indium precursor contains trimethyl indium, and the phosphorus precursor contains phosphine. The deposition temperature may range between about 680 ℃ and about 850 ℃ for deposition rates of 90-120 μm/hr.

Drawings

so that the manner in which the above recited features of the present disclosure can be understood in detail, a more particular description of the disclosure, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this disclosure and are therefore not to be considered limiting of its scope, for the disclosure may admit to other equally effective embodiments.

Figure 1 illustrates an example of a gallium arsenide stack containing various group III/V layers as described in some embodiments herein.

Fig. 2 illustrates an example of a method for forming a semiconductor material on a wafer as described in some embodiments herein.

Fig. 3 illustrates an example of another method for forming a semiconductor material on a wafer as described in some embodiments herein.

Fig. 4 illustrates an example of yet another method for forming a semiconductor material on a wafer as described in some embodiments herein.

Fig. 5 illustrates an example of a method for forming a cell as described in some embodiments herein.

Detailed Description

The following description is presented to enable one of ordinary skill in the art to make and use the disclosure and is provided in the context of a patent application and its requirements. Various modifications to the preferred embodiment and the generic principles and features described herein will be readily apparent to those skilled in the art. Thus, the present disclosure is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features described herein.

embodiments of the present disclosure generally relate to processes for epitaxially growing group III/V materials at high growth rates, such as about 30 μm/hr or higher, for example, about 40 μm/hr, about 50 μm/hr, about 55 μm/hr, about 60 μm/hr, about 70 μm/hr, about 80 μm/hr, or about 90-120 μm/hr. The deposited III/V materials or films can be used in solar, semiconductor, or other electronic device applications. These electronic device applications may include applications involving optoelectronic devices, components, or modules. In some embodiments, the group III/V material may be formed or grown on a sacrificial layer disposed on or over a support substrate during a vapor deposition process. Subsequently, the III/V material may be removed from the support substrate, for example, during an Epitaxial Lift Off (ELO) process. The III/V material is a thin film of an epitaxially grown layer comprising gallium arsenide, aluminum gallium arsenide, indium gallium arsenide, gallium indium arsenide nitride, gallium aluminum indium phosphide, phosphides thereof, nitrides thereof, derivatives thereof, alloys thereof, or combinations thereof.

In one embodiment, a method for forming a group III/V material containing gallium arsenide on a wafer is provided, the method comprising: heating the wafer to a deposition temperature of about 550 ℃ or greater within the processing system; exposing the wafer to a deposition gas comprising a gallium precursor gas and arsine; and depositing a gallium arsenide layer on the wafer at a deposition rate of about 30 μm/hour or greater.

In another embodiment, a method for forming a group III/V material comprising aluminum gallium arsenide is provided, the method comprising: heating the wafer to a deposition temperature of about 650 ℃ or greater within the processing system; exposing the wafer to a deposition gas comprising a gallium precursor gas, an aluminum precursor gas, and arsine; and depositing an aluminum gallium arsenide layer at a deposition rate of about 30 μm/hr or greater. In one example, the group III/V material comprises Al having the formula_0.3Ga_0.7an n-type aluminum gallium arsenide layer of As.

In another embodiment, a method for forming a group III/V material on a wafer or substrate is provided, the method comprising: heating the wafer to a deposition temperature of about 600 ℃ or greater within the processing system; exposing the wafer to a deposition gas comprising a gallium precursor gas, an indium precursor gas, and arsine; and depositing a group III/V layer on the wafer at a deposition rate of about 30 μm/hour or greater. The III/V layer contains gallium, arsenic and indium. In one example, the deposition temperature is in a range from about 650 ℃ to about 800 ℃. In some examples, the gallium precursor gas contains trimethyl gallium and the indium precursor gas contains trimethyl indium.

In another embodiment, a method for forming a group III/V material on a wafer or substrate is provided, the method comprising: heating the wafer to a deposition temperature of about 600 ℃ or greater within the processing system; exposing the wafer to a deposition gas containing a gallium precursor gas, an indium precursor gas, a nitrogen precursor gas, and arsine; depositing a group III/V layer on the wafer at a deposition rate of about 30 μm/hr or greater, wherein the group III/V layer contains gallium, arsenic, indium, and nitrogen. The nitrogen precursor gas may contain hydrazine, methylhydrazine, dimethylhydrazine, derivatives thereof, or combinations thereof. In one example, the nitrogen precursor gas contains dimethylhydrazine. In another example, the nitrogen precursor gas contains hydrazine. In some examples, the gallium precursor gas contains trimethyl gallium and the indium precursor gas contains trimethyl indium.

in another embodiment, a method for forming a group III/V material on a wafer or substrate is provided, the method comprising: heating the wafer to a deposition temperature of about 600 ℃ or greater within the processing system; exposing the wafer to a deposition gas containing a gallium precursor gas, an indium precursor gas, an aluminum precursor, and a phosphorous precursor; depositing a group III/V layer on the wafer at a deposition rate of about 30 μm/hr or greater, wherein the group III/V layer contains gallium, indium, aluminum, and phosphorus. In one example, the gallium precursor contains trimethyl gallium, the aluminum precursor contains trimethyl aluminum, the indium precursor contains trimethyl indium, and the phosphorus precursor contains phosphine.

in some embodiments, the deposition rate or growth rate can be about 40 μm/hr or more, such as about 50 μm/hr or more, preferably about 55 μm/hr or more, more preferably about 60 μm/hr or more (e.g., about 70 μm/hr, about 80 μm/hr, or about 90-120 μm/hr). In other embodiments, the deposition temperature may be about 600 ℃ or higher, or may be about 700 ℃ or higher, or may be about 800 ℃ or higher, or may be about 850 ℃. In some examples, the deposition temperature may be in a range of about 550 ℃ to about 900 ℃. In other examples, the deposition temperature may be in a range of about 600 ℃ to about 800 ℃. In other examples, the deposition temperature may be in a range of about 650 ℃ to about 750 ℃. In other examples, the temperature may be in a range of about 650 ℃ to about 720 ℃. In other examples, such as for deposition rates of about 90-120 μm/hr, the deposition temperature may be in the range of about 680 ℃ to about 850 ℃.

The gallium precursor gas may contain an alkyl gallium compound. In one example, the alkyl gallium compound may be trimethyl gallium or triethyl gallium. In some embodiments, the deposition gas may further comprise an aluminum precursor gas, and the gallium arsenide layer further comprises aluminum. The aluminum precursor gas may contain an alkyl aluminum compound, such as trimethylaluminum or triethylaluminum. In other embodiments, the deposition gas comprises an arsine and gallium precursor gas, wherein the arsine/gallium precursor ratio is about 3 or greater, or may be about 4 or greater, or may be about 5 or greater, or may be about 6 or greater, or may be about 7 or greater. In some examples, the arsine/gallium precursor ratio may be in a range from about 5 to about 10. In other embodiments, the group III/V material may be formed or grown from a deposition gas comprising a ratio of group V precursors to group III precursors of about 30:1, or 40:1, or 50:1, or 60:1, or higher. In some examples, the deposition gas has about 50:1 phosphine/group III precursor.

the processing system may have an internal pressure in a range of about 20 torr to about 1000 torr. In some embodiments, the internal pressure may be ambient pressure or greater than ambient pressure, such as in a range of about 760 torr to about 1000 torr. In some examples, the internal pressure may be in a range of about 800 torr to about 1000 torr. In other examples, the internal pressure is in a range of about 780 torr to about 900 torr, such as about 800 torr to about 850 torr. In other embodiments, the internal pressure may be ambient or less than ambient, such as in the range of about 20 torr to about 760 torr, preferably in the range of about 50 torr to about 450 torr, and more preferably in the range of about 100 torr to about 250 torr.

In some embodiments, the deposition gas further contains a carrier gas. The carrier gas may comprise hydrogen (H)₂) Nitrogen (N)₂) Hydrogen and nitrogen mixtures, argon, helium or combinations thereof. In many examples, the carrier gas comprises hydrogen, nitrogen, or a mixture of hydrogen and nitrogen.

In general, the flow rates of the various gases used in a deposition process may depend on the chemical vapor deposition (e.g., metal-organic chemical vapor deposition or MOCVD) tool used for the process.

Fig. 1 illustrates a gallium arsenide stack 100 comprising multiple III/V materials or layers, which may be formed by a high growth rate deposition process according to embodiments described herein. For example, one or more of the III/V materials or layers may be grown or deposited at any of the following deposition rates: about 30 μm/hr, about 40 μm/hr, about 50 μm/hr, about 55 μm/hr, about 60 μm/hr, about 70 μm/hr, about 80 μm/hr, about 90 μm/hr, about 95 μm/hr, about 100 μm/hr, about 105 μm/hr, about 110 μm/hr, about 115 μm/hr, and about 120 μm/hr. Some of the multiple layers of III/V materials form a gallium arsenide cell 110 within the gallium arsenide stack 100. Fig. 1 shows that gallium arsenide stack 100 includes gallium arsenide cell 110 disposed on or over sacrificial layer 116, sacrificial layer 116 disposed on or over buffer layer 114, and buffer layer 114 disposed on or over wafer 112.

wafer 112 may be a support substrate comprising a III/V material and may be doped with various elements. Typically, wafer 112 comprises gallium arsenide, alloys thereof, derivatives thereof, and may be an n-doped substrate or a p-doped substrate. In many examples, wafer 112 is a gallium arsenide substrate or a gallium arsenide alloy substrate. The gallium arsenide substrate or wafer may have about 5.73 x 10^-6℃^-1the coefficient of thermal expansion of (a).

Buffer layer 114 may be a gallium arsenide buffer layer comprising gallium arsenide, alloys thereof, dopants thereof, or derivatives thereof. The thickness of the buffer layer 114 may be in the range of about 100nm to about 1000nm, such as about 200nm or about 300 nm.

The sacrificial layer 116, also referred to as an ELO release layer, may comprise aluminum arsenide, alloys thereof, derivatives thereof, or combinations thereof. The sacrificial layer 116 may have a thickness of about 20nm or less. In some examples, the thickness of the sacrificial layer 116 may be in the range of about 1nm to about 20nm, such as about 5nm to about 20nm, or in other examples, in the range of about 1nm to about 10nm, such as about 4nm to about 6 nm.

the gallium arsenide cell 110 also includes an n-type gallium arsenide stack 120 disposed on or over a p-type gallium arsenide stack 130. The n-type gallium arsenide stack 120 typically comprises multiple layers of various n-type doped materials. In one embodiment, the n-type gallium arsenide stack 120 includes an emitter layer 126 disposed on or over a passivation layer 124, the passivation layer 124 disposed on or over the contact layer 122. In some embodiments, the thickness of the n-type gallium arsenide stack 120 may be in a range from about 200nm to about 1300 nm.

The contact layer 122 may be a gallium arsenide contact layer comprising gallium arsenide, alloys thereof, dopants thereof, or derivatives thereof. In some examples, the contact layer 122 includes an n-type gallium arsenide material. The thickness of the contact layer 122 may be in the range of about 5nm to about 100nm, such as about 10nm or about 50 nm.

The passivation layer 124, also referred to as a front window, typically comprises aluminum gallium arsenide, alloys thereof, derivatives thereof, or combinations thereof. In many examples, the passivation layer 124 includes an n-type aluminum gallium arsenide material. In one example, the passivation layer 124 includes Al having a chemical formula_0.3Ga_0.7an n-type aluminum gallium arsenide material of As. The thickness of the passivation layer 124 may be in the range of about 5nm to about 100nm, such as about 10nm or about 50 nm.

the emitter layer 126 may comprise gallium arsenide, alloys thereof, derivatives thereof, or combinations thereof. In many examples, the emitter layer 126 comprises an n-type gallium arsenide material. The thickness of the emitter layer 126 may be in the range of about 100nm to about 3000 nm. In some examples, the thickness of the emitter layer 126 may be in the range of about 100nm to about 600nm, such as about 200nm to about 400nm, or in other examples, in the range of about 600nm to about 1200nm, such as about 800nm to about 1000 nm.

The p-type gallium arsenide layer or stack 130 typically comprises multiple layers of various p-type doped materials. In one embodiment, the p-type gallium arsenide stack 130 includes a contact layer 136 disposed on or over a passivation layer 134, the passivation layer 134 being disposed on or over the absorber layer 132. In an alternative embodiment, the absorption layer 132 is not present in the p-type gallium arsenide stack 130. Thus, the p-type gallium arsenide stack 130 includes a contact layer 136 disposed on or over the passivation layer 134, and the passivation layer 134 may be disposed on or over the n-type gallium arsenide stack 120, the emitter layer 126, or another layer. In some embodiments, the thickness of the p-type gallium arsenide stack 130 may be in a range from about 100nm to about 3000 nm.

The absorption layer 132 may comprise gallium arsenide, alloys thereof, derivatives thereof, or combinations thereof. In many examples, the absorber layer 132 comprises a p-type gallium arsenide material. In one embodiment, the thickness of the absorption layer 132 may be in a range from about 1nm to about 3000 nm. In some examples, the thickness of the absorption layer 132 may be in the range of about 1nm to about 1000nm, such as about 10nm to about 100nm, or in other examples, in the range of about 1000nm to about 3000nm, such as about 1100nm to about 2000 nm. In some examples, the thickness of the absorption layer 132 may be in the range of about 100nm to about 600nm, such as about 200nm to about 400nm, or in other examples, in the range of about 600nm to about 1200nm, such as about 800nm to about 1000 nm.

the passivation layer 134, also referred to as a back window, typically comprises aluminum gallium arsenide, alloys thereof, derivatives thereof, or combinations thereof. In many examples, the passivation layer 134 comprises a p-type aluminum gallium arsenide material. In one example, the passivation layer 134 comprises Al having a chemical formula_0.3Ga_0.7p-type aluminum gallium arsenide material As. The thickness of the passivation layer 134 may be in the range of about 25nm to about 100nm, such as about 50nm or about 300 nm.

The contact layer 136 may be a p-type gallium arsenide contact layer comprising gallium arsenide, alloys thereof, dopants thereof, or derivatives thereof. In some examples, contact layer 136 comprises a p-type gallium arsenide material. The thickness of contact layer 136 may be in the range of about 5nm to about 100nm, such as about 10nm or about 50 nm.

Aspects of a deposition process for depositing or forming a group III/V material as described herein may be performed in a processing system, for example, a single wafer deposition chamber, a multi-wafer deposition chamber, a fixed deposition chamber, or a continuous feed deposition chamber. One continuous feed Deposition chamber that may be used to deposit or form group III/V materials is described in commonly assigned U.S. patent application No.12/475,131 (entitled "Methods and Apparatus for a Chemical Vapor Deposition Reactor") filed on 29.5.2009 and U.S. patent application No.12/475,169 (entitled "Methods and Apparatus for a Chemical Vapor Deposition Reactor") filed on 29.2009 and published on 29.5.2009, and issued as U.S. patent No. 8,602,707, each of which is incorporated herein by reference.