阅读说明：本技术 半导体装置的制造方法及半导体装置 (Method for manufacturing semiconductor device and semiconductor device ) 是由 西口浩平 于 2019-03-25 设计创作，主要内容包括：半导体装置(10)的制造方法依次具备如下工序：在半导体基板(12)之上形成第1绝缘膜(14)；在第1绝缘膜(14)之上形成至少最上层由Au制成的布线(16)；在布线(16)的上表面和第1绝缘膜(14)的上表面中的未被布线(16)覆盖的区域,注入即使被注入至绝缘膜(14)也不损害绝缘性的离子；以及形成覆盖布线(16)的第2绝缘膜(18)。由于在布线(16)的上表面注入即使被注入至第1绝缘膜(14)也不损害绝缘性的离子,因此能够兼得提高布线(16)与第2绝缘膜(18)的紧贴性和抑制制造工序数的增加。(A method for manufacturing a semiconductor device (10) sequentially comprises the steps of: forming a 1 st insulating film (14) over a semiconductor substrate (12); forming a wiring (16) made of Au at least as the uppermost layer over the 1 st insulating film (14); implanting ions that do not impair the insulating properties even if implanted into the insulating film (14) in a region not covered with the wiring (16) of the upper surface of the wiring (16) and the upper surface of the 1 st insulating film (14); and forming a 2 nd insulating film 18 covering the wiring 16. Since ions which do not impair the insulating property even when injected into the 1 st insulating film (14) are injected into the upper surface of the wiring (16), the adhesion between the wiring (16) and the 2 nd insulating film (18) can be improved and the increase in the number of manufacturing steps can be suppressed.)

1. A method for manufacturing a semiconductor device, characterized in that,

the method sequentially comprises the following steps:

forming a 1 st insulating film over the semiconductor substrate;

forming a wiring made of Au at least as the uppermost layer over the 1 st insulating film;

implanting ions which do not impair insulation properties even if implanted into the insulating film, into a region not covered with the wiring, of the upper surface of the wiring and the upper surface of the 1 st insulating film; and

forming a 2 nd insulating film covering the wiring.

2. A method for manufacturing a semiconductor device, characterized in that,

forming a 1 st insulating film over the semiconductor substrate;

forming a wiring made of Au at least as the uppermost layer over the 1 st insulating film;

forming a 2 nd insulating film covering the wiring; and

implanting ions which do not impair insulation even if implanted into the insulating film, into a region not covered with the wiring, of the upper surface of the wiring and the upper surface of the 1 st insulating film,

peaks of the distribution of the ions implanted into the wiring and the 2 nd insulating film are located in the vicinity of an interface between an upper surface of the wiring and the 2 nd insulating film, respectively.

3. The method for manufacturing a semiconductor device according to claim 1 or 2,

the ion is Ar or N.

4. The method for manufacturing a semiconductor device according to any one of claims 1 to 3,

at least an upper portion of a side surface of the wiring is made of Au,

as a method of implanting the ions, an oblique ion implantation method is employed to implant the ions also into the side surfaces of the wirings.

5. A method for manufacturing a semiconductor device, comprising the steps of:

forming a 1 st insulating film over the semiconductor substrate;

forming a wiring made of Au at least in an uppermost layer and at least in an upper part of a side surface over the 1 st insulating film;

forming a protective layer in a region not covered with the wiring in an upper surface of the 1 st insulating film;

deforming the protective layer by heat treatment to expose at least a part of a region in contact with the protective layer in a side surface of the wiring;

implanting ions into the upper surface of the wiring, at least an upper portion of a side surface of the wiring, and the upper surface of the protective layer by an oblique ion implantation method;

removing the protective layer; and

forming a 2 nd insulating film covering the wiring.

6. The method for manufacturing a semiconductor device according to claim 5,

the ion is any one of B, Si, Pd, Ti, Ta, Al, Co, Ar and N.

7. A semiconductor device is characterized in that a semiconductor element,

the disclosed device is provided with:

a semiconductor substrate;

a 1 st insulating film over the semiconductor substrate;

a wiring over the 1 st insulating film, at least an uppermost layer of the wiring being made of Au; and

a 2 nd insulating film covering the wiring,

in the vicinity of the upper surface of the wiring and in the vicinity of a region not covered with the wiring in the upper surface of the 1 st insulating film, the thickness of the insulating film is 1 × 10¹⁷cm^-3Above and 1 × 10²¹cm^-3The insulating nondestructive element is present at the following concentration.

8. The semiconductor device according to claim 7,

the insulating nondestructive element is also present in the vicinity of the lower surface of the 2 nd insulating film,

peaks of the distribution of the insulating nondestructive element in the upper surface of the wiring and the lower surface of the 2 nd insulating film in contact with the upper surface of the wiring are located in the vicinity of an interface between the upper surface of the wiring and the 2 nd insulating film, respectively.

9. The semiconductor device according to claim 7 or 8,

the insulating nondestructive element is Ar or N.

10. The semiconductor device according to any one of claims 7 to 9,

at least an upper portion of a side surface of the wiring is made of Au,

also in the vicinity of the side face of the wiring, 1 × 10¹⁷cm^-3Above and 1 × 10²¹cm^-3The insulating nondestructive element is present at a concentration of below.

11. A semiconductor device is characterized in that a semiconductor element,

the disclosed device is provided with:

a semiconductor substrate;

a 1 st insulating film over the semiconductor substrate;

a wiring over the 1 st insulating film, at least an uppermost layer and at least an upper portion of a side surface of the wiring being made of Au; and

a 2 nd insulating film covering the wiring,

near the upper surface and the side surface of the wiring at 1 × 10¹⁷cm^-3Above and 1 × 10²¹cm^-3Impurity elements are present at the following concentrations.

12. The semiconductor device according to claim 11,

the impurity element is any one of B, Si, Pd, Ti, Ta, Al, Co, Ar and N.

Technical Field

The present invention relates to a method for manufacturing a semiconductor device in which a wiring made of Au is covered with an insulating film, and a semiconductor device.

Background

In a high-frequency device using a compound semiconductor such as GaAs or GaN, Au having excellent reliability is used as a wiring material of a transistor. In addition, the wiring is covered with an insulating film (e.g., SiO, SiN) for the purpose of protecting the device. However, since Au is chemically stable, when an insulating film is formed over Au, the adhesion between Au and the insulating film is weak, and the insulating film on the wiring is likely to peel off.

In order to solve this problem, Ti is implanted into Au by an ion implantation method and annealed to form an Au — Ti alloy layer on the wiring surface layer, thereby improving the adhesion of the insulating film (see, for example, patent document 1).

As another measure, a method of implanting Si on Au by an ion implantation method and annealing the implanted Si to provide a region containing Si on the surface of the wiring to similarly improve adhesion to an insulating film containing Si has been proposed (for example, see patent document 2).

Patent document 1: japanese laid-open patent publication No. H06-061225

Patent document 2: japanese laid-open patent publication No. H07-273107

However, when Ti ions or Si ions are implanted into a wiring made of Au, if ions are implanted into an insulating film located below the wiring, the insulating property of the insulating film below the wiring is impaired. Therefore, it is necessary to form a protective layer over the insulating film under the wiring so that ions are not implanted into the insulating film under the wiring during ion implantation, which leads to a problem that the number of manufacturing steps increases.

Disclosure of Invention

The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a method for manufacturing a semiconductor device and a semiconductor device, which can improve adhesion between a wiring made of Au and an insulating film on the wiring and can suppress an increase in the number of manufacturing steps.

The method for manufacturing a semiconductor device according to the present invention includes the following steps in order: forming a 1 st insulating film over the semiconductor substrate; forming a wiring made of Au at least as the uppermost layer over the 1 st insulating film; implanting ions which do not impair insulation even if implanted into the insulating film, in a region not covered with the wiring, of the upper surface of the wiring and the upper surface of the 1 st insulating film; and forming a 2 nd insulating film covering the wiring.

Further, a semiconductor device according to the present invention includes: a semiconductor substrate; a 2 nd insulating film over the semiconductor substrate; a wiring over the 1 st insulating film, at least an uppermost layer of the wiring being made of Au; and a 2 nd insulating film covering the wiring and having a thickness of 1 × 10 in the vicinity of the upper surface of the wiring and in the vicinity of a region not covered with the wiring in the upper surface of the 1 st insulating film¹⁷cm^-3Above and 1 × 10²¹cm^-3The insulating nondestructive element is present at the following concentration.

According to the method for manufacturing a semiconductor device and the semiconductor device of the present invention, since ions that do not impair the insulating property even if injected into the insulating film under the wiring are injected into the upper surface of the wiring made of Au, it is possible to achieve both improvement of the adhesion between the wiring made of Au and the insulating film on the wiring and suppression of an increase in the number of manufacturing steps.

Drawings

Fig. 1 is a cross-sectional view of a semiconductor device according to embodiment 1.

Fig. 2 is a diagram illustrating a method for manufacturing a semiconductor device according to embodiment 1.

Fig. 3 is a cross-sectional view of the semiconductor device according to embodiment 2.

Fig. 4 is a diagram illustrating a method for manufacturing a semiconductor device according to embodiment 2.

Fig. 5 is a cross-sectional view of the semiconductor device according to embodiment 3.

Fig. 6 is a diagram illustrating a method for manufacturing a semiconductor device according to embodiment 3.

Fig. 7 is a diagram showing a peak position of ion distribution on the upper surface of the wiring of the semiconductor device according to embodiment 3.

Fig. 8 is a cross-sectional view of the semiconductor device according to embodiment 4.

Fig. 9 is a diagram illustrating a method for manufacturing a semiconductor device according to embodiment 4.

Fig. 10 is a diagram illustrating a method for manufacturing a semiconductor device according to embodiment 4.

Fig. 11 is a cross-sectional view of the semiconductor device without an insulating film between the semiconductor substrate and the wiring.

Detailed Description

Embodiment mode 1

Fig. 1 is a diagram of a semiconductor device 10 according to embodiment 1. The semiconductor device 10 includes a semiconductor substrate 12. The semiconductor substrate 12 is made of GaAs, GaN, SiC, Si, or the like.

An insulating film 14 is formed over the semiconductor substrate 12. The insulating film 14 is formed of polyimide, BCB (benzocyclobutene), cvd (chemical Vapor deposition), or the like. The CVD film here refers to an insulating film of SiO, SiN, or the like formed by CVD.

A wiring 16 is formed over the insulating film 14. The wiring 16 is formed of Au on a substrate of Ti, Ta, Cr, Ti/Pt, TiW or the like. Here, Ti/Pt means a structure in which Pt is formed on Ti, and TiW is an alloy of Ti and W. Since the wiring 16 is formed of Au over the substrate, at least the uppermost layer of the wiring 16 is made of Au. In addition, since the portion of the side surface of the wiring 16 above the substrate is made of Au, at least the upper portion of the side surface of the wiring 16 is made of Au. The substrate is thinner than Au, and therefore, is omitted in the drawings.

An ion-implanted layer 16a into which ions are implanted is formed on the upper surface of the wiring 16. The ion species is an element that does not impair the insulating property even when implanted into the insulating film 14, and is referred to herein as an insulating nondestructive element. Specifically, the insulating nondestructive element is Ar, N, or the like. Further, an ion-implanted layer 14a is also formed in a region not covered with the wiring 16 on the upper surface of the insulating film 14. The concentration of the insulating nondestructive element in the ion-implanted layer 16a and the ion-implanted layer 14a was 1 × 10¹⁷cm^-3Above and 1 × 10²¹cm^-3The following.

An insulating film 18 is formed so as to cover the wiring 16. The insulating film 18 is SiO, SiN, SiON, AlO, TaO, or the like.

A method for manufacturing the semiconductor device 10 according to embodiment 1 will be described below. First, as shown in fig. 2 (a), the insulating film 14 is formed on the semiconductor substrate 12.

Next, a base is formed over the insulating film 14, and a wiring 16 made of Au is formed over the base by evaporation, sputtering, plating, or the like as shown in fig. 2 (b).

Next, as shown in fig. 2 (c), ions are implanted from a direction perpendicular to the semiconductor substrate 12 by an ion implantation method. The implantation conditions include an acceleration energy of 5 to 50keV and a dose of 1X 10¹²ions/cm²The above. An ion-implanted layer 16a and an ion-implanted layer 14a are formed on the upper surface of the wiring 16 and the upper surface of the insulating film 14, respectively, by ion implantation. The ion-implanted layer 16a formed on the upper surface of the wiring 16 is chemically unstable due to ion implantation.

Next, as shown in fig. 2 (d), the insulating film 18 is formed by CVD (chemical vapor deposition), ald (atomic Layer deposition), or the like so as to cover the wiring 16.

As described above, according to embodiment 1, since the ion-implanted layer 16a on the upper surface of the wiring 16 is chemically unstable, the adhesion between the wiring 16 and the insulating film 18 is improved, and since the ion species are implanted into the insulating film 14 without impairing the insulating property, it is not necessary to form a protective layer on the insulating film 14 before ion implantation.

Embodiment mode 2

Fig. 3 is a diagram of a semiconductor device 30 according to embodiment 2. The semiconductor device 30 is the same as the semiconductor device 10 according to embodiment 1, but differs in that an ion-implanted layer 36a is also formed on the side surface of the wiring 36.

Fig. 4 is a diagram illustrating a method for manufacturing the semiconductor device 30 according to embodiment 2. In this manufacturing method, (a) to (d) of fig. 4 are performed in this order. A method of manufacturing the semiconductor device 30 according to embodiment 2 is the same as that of embodiment 1, but differs in that the ion implantation is performed by a tilt ion implantation method (fig. 4 (c)). The oblique ion implantation is to implant ions obliquely to a direction perpendicular to the semiconductor substrate 12. Thereby, the ion-implanted layer 36a is also formed on the side surface of the wiring 36. As the oblique ion implantation method, either a method of implanting while rotating the wafer about the vertical direction as an axis or a method of performing split implantation while changing the rotation angle of the wafer can be used.

As described above, according to embodiment 2, since the ion-implanted layer 36a is also formed on the side surface of the wiring 36, the adhesion between the wiring 36 and the insulating film 18 is further improved.

Embodiment 3

Fig. 5 is a diagram of a semiconductor device 50 according to embodiment 3. The semiconductor device 50 is the same as the semiconductor device 10 according to embodiment 1, but has a different distribution of ions injected into the wiring 56 and the insulating film 54 in the vertical direction.

Fig. 6 is a diagram illustrating a method for manufacturing the semiconductor device 50 according to embodiment 3. In this manufacturing method, (a) to (d) of fig. 6 are performed in this order. In embodiment 1, ion implantation is performed before the insulating film 58 is formed, but in embodiment 3, ion implantation is performed after the insulating film 58 is formed ((c) and (d) of fig. 6). Ion implantation is performed not only in the wiring 56 and the insulating film 54 but also in the insulating film 58.

The ion implantation conditions are set such that the peak of the distribution in the vertical direction of the ions implanted into the wiring 56 is located in the vicinity of the interface between the upper surface of the wiring 56 and the insulating film 58. Fig. 7 is an enlarged view of the vicinity of the upper right of the wiring 56 in fig. 5, showing the peak position of the distribution of ions. The implantation conditions vary depending on the thickness of the insulating film 58, and for example, in the case where the insulating film is SiN having a thickness of 100nm and the ion species is Ar, the acceleration energy is 150keV and the dose is 1 × 10¹²ions/cm²The above.

As described above, according to embodiment 3, the peak of the distribution of ions implanted into the wiring 56 in the vertical direction is located in the vicinity of the interface between the upper surface of the wiring 56 and the insulating film 58, and therefore the adhesion between the wiring 56 and the insulating film 58 is further improved. On the other hand, when ion implantation is performed directly from above the wiring 16 as in embodiment 1, the peak of the distribution in the vertical direction is located inside the upper surface of the wiring 16. Therefore, the adhesion between the wiring 56 and the insulating film 58 of the semiconductor device 50 according to embodiment 3 is higher than that of embodiment 1.

The ion implantation may be performed by the same oblique ion implantation method as that of embodiment 2. In this case, the adhesion between the wiring 56 and the insulating film 58 is further improved.

Embodiment 4

Fig. 8 is a diagram of a semiconductor device 70 according to embodiment 4. The semiconductor device 70 is the same as the semiconductor device 30 according to embodiment 2, but is different from the limitation of the ion species to be ion-implanted in that there is no ion-implanted layer on the upper surface of the insulating film 74. As the ion species, in addition to Ar, N, or the like which does not impair the insulating property even when implanted into the insulating film 14, ions such as B, Si, Pd, Ti, Ta, Al, or Co, which increase the conductivity of the insulating film when ion implanted, may be used. Since these ion species are implanted into the wiring made of Au as described later and act as impurities with respect to Au, the elements that become these ion sources are referred to as impurity elements here. The concentration of the impurity element in the ion-implanted layer 76a was 1 × 10¹⁷cm^-3Above and 1 × 10²¹cm^-3The following.

A method for manufacturing the semiconductor device 70 according to embodiment 4 will be described below. As shown in fig. 9 (a), the steps up to the formation of the wiring 76 are the same as those in embodiment 2.

After fig. 9 (a), a protective layer 82 is formed on the upper surface of the insulating film 74 in a region not covered with the wiring 76 as shown in fig. 9 (b).

Next, as shown in fig. 9 (c), the protective layer 82 is thermally deformed by applying a heat treatment of 90 ℃ or higher, and at least a part of the region of the side surface of the wiring 76 which is in contact with the protective layer 82 is exposed.

Next, as shown in fig. 10 (a), ions are implanted into the upper surface of the wiring 76, at least a part of the side surface of the wiring 76, and the upper surface of the protective layer 82 by an oblique ion implantation method. An ion-implanted layer 76a is formed on the upper surface of the wiring 76 and at least the upper portion of the side surface of the wiring 76 by ion implantation, and an ion-implanted layer 82a is formed on the upper surface of the protective layer 82. The ion-implanted layer 76a formed on the upper surface of the wiring 16 becomes chemically unstable due to implantation of ions as impurities. When the ion species is B, Si, Pd, Ti, Ta, Al, Co, or the like, the ion-implanted layer 76a becomes an alloy with Au when annealing is performed after ion implantation.

Next, as shown in fig. 10 (b), the protective layer 82 is removed.

Next, as shown in fig. 10 (c), an insulating film 78 is formed so as to cover the wiring 76.

As described above, according to embodiment 4, since the protective layer 82 is provided on the insulating film 74 at the time of ion implantation, ions are not directly implanted on the insulating film 74, and thus the insulating film 74 is not damaged. Even if the ion species is an ion that impairs the insulating property of the insulating film 74 when the ion species is implanted into the insulating film 74, the insulating property of the insulating film 74 is not impaired.

In the case where the ion species is B, Si, Pd, Ti, Ta, Al, Co, or the like, the ion-implanted layer 76a becomes an alloy with Au when annealing is performed after ion implantation, and thus the adhesion between the wiring 76 and the insulating film 78 is further improved.

In all the embodiments, an insulating film is provided between the semiconductor substrate and the wiring, but the insulating film may be omitted. In this case, for example, as shown in fig. 11, the wiring 116 is formed on the semiconductor substrate 112.

Description of the reference numerals

10. 30, 50, 70, 110. 12. A semiconductor substrate; 14. 54, 74.. insulating film; 14a, 54a, 82a, 112a.. ion-implanted layer; 16. 36, 56, 76, 116.. wiring; 16a, 36a, 56a, 76a, 116a.. ion-implanted layer; 18. 18, 58, 78, 118.. insulating film; 82..