阅读说明：本技术 一种桥臂开关管的驱动电路、驱动电路及功率变换器 (Driving circuit, driving circuit and power converter of bridge arm switching tube ) 是由 彭兴强 董少青 文静 于 2021-07-02 设计创作，主要内容包括：本申请公开了一种桥臂开关管的驱动电路、驱动电路及功率变换器,桥臂开关管包括第一开关管和第二开关管；第一开关管的第一端连接电源,第一开关管的第二端连接第二开关管的第一端,第二开关管的第二端接地；驱动电路包括：低压区域、至少两个隔离环隔离出的至少两个高压区域,至少两个高压区域包括第一高压区域和第二高压区域；第一高压区域对应第一电压域,第二高压区域对应第二电压域,第一电压域的电压和第二电压域的电压不同；低压区域设置用于驱动第二开关管的半导体器件；第一高压区域和第二高压区域分别设置P型半导体器件,P型半导体器件用于驱动第一开关管。该方案实现高压区域中不同电压域的P型半导体器件的隔离,避免干扰。(The application discloses a driving circuit, a driving circuit and a power converter of a bridge arm switching tube, wherein the bridge arm switching tube comprises a first switching tube and a second switching tube; the first end of the first switch tube is connected with the power supply, the second end of the first switch tube is connected with the first end of the second switch tube, and the second end of the second switch tube is grounded; the drive circuit includes: the high-voltage isolation ring comprises a low-voltage area and at least two high-voltage areas isolated by at least two isolation rings, wherein the at least two high-voltage areas comprise a first high-voltage area and a second high-voltage area; the first high-voltage area corresponds to a first voltage domain, the second high-voltage area corresponds to a second voltage domain, and the voltage of the first voltage domain is different from that of the second voltage domain; the low-voltage area is provided with a semiconductor device for driving the second switching tube; the first high-voltage area and the second high-voltage area are respectively provided with a P-type semiconductor device, and the P-type semiconductor devices are used for driving the first switching tube. The scheme realizes the isolation of the P-type semiconductor devices in different voltage domains in a high-voltage domain, and avoids interference.)

1. A driving circuit of a bridge arm switching tube is characterized in that the bridge arm switching tube comprises a first switching tube and a second switching tube; the first end of the first switch tube is connected with a power supply, the second end of the first switch tube is connected with the first end of the second switch tube, and the second end of the second switch tube is grounded;

the drive circuit includes: the high-voltage isolation device comprises a low-voltage area and at least two high-voltage areas isolated by at least two isolation rings, wherein the at least two high-voltage areas comprise a first high-voltage area and a second high-voltage area; the first high-voltage area corresponds to a first voltage domain, the second high-voltage area corresponds to a second voltage domain, and the voltage of the first voltage domain is different from that of the second voltage domain;

the low-voltage area is provided with a semiconductor device for driving the second switching tube;

the first high-voltage area and the second high-voltage area are respectively used for arranging a P-type semiconductor device, and the P-type semiconductor device is used for driving the first switch tube.

2. The driver circuit of claim 1, wherein the at least two isolation rings comprise a first isolation ring and a second isolation ring;

the first isolation ring surrounds the first high pressure region and the second isolation ring surrounds the second high pressure region;

the low pressure region is a region other than the first and second isolation rings.

3. The drive circuit according to claim 1 or 2, characterized by further comprising: a bonding wire;

the bonding wire is used for transmitting the first high-voltage area electric energy to the second high-voltage area and transmitting the driving signal from the first high-voltage area to the second high-voltage area.

4. The drive circuit according to claim 3, further comprising: a voltage conversion circuit;

the voltage conversion circuit is located in the first high-voltage area and is used for converting the voltage of the first voltage domain into the voltage of the second voltage domain;

the bonding wire is used for connecting the output voltage of the voltage conversion circuit to the second high-voltage area.

5. The driver circuit according to claim 3 or 4, wherein the bonding wire is directly wired between the pad of the first high voltage region and the pad of the second high voltage region.

6. The driving circuit according to claim 3 or 4, wherein the pad of the first high voltage region is connected to a package pin of the driving circuit through the bonding wire, and the pad of the second high voltage region is connected to a package pin of the driving circuit through the bonding wire, so that the electric energy transmission and the driving signal transmission are realized between the first high voltage region and the second high voltage region.

7. The drive circuit according to any one of claims 1 to 4, wherein all the P-type semiconductor devices in the first high-voltage region have the same body potential, and all the P-type semiconductor devices in the second high-voltage region have the same body potential; the N-type semiconductor device in the first high-voltage region and the N-type semiconductor device in the second high-voltage region are provided with independent P wells.

8. The driver circuit according to any of claims 2-5, wherein the first isolation ring and the second isolation ring are both silicon substrates.

9. The driver circuit according to any of claims 1-8, wherein the first high voltage region comprises: the first NMOS tube and the second NMOS tube;

the first NMOS tube and the second NMOS tube are symmetrically arranged;

the first NMOS tube and the second NMOS tube are respectively connected with the mirrored common mode rejection circuit in the second high-voltage area;

the first NMOS tube and the second NMOS tube are conducted alternately, so that one of two branches of the common mode rejection circuit of the mirror image in the second high-voltage area is conducted.

10. The driver circuit of claim 9, wherein the second high voltage region comprises: a first branch and a second branch;

the first branch circuit comprises a third NMOS transistor, a fifth NMOS transistor and a first PMOS transistor; the second branch circuit includes: a fourth NMOS transistor, a sixth NMOS transistor and a second PMOS transistor;

the first end of the first NMOS tube and the first end of the second NMOS tube are both connected with the reference ground of the first high-voltage area, the second end of the first NMOS tube is connected with the second end of the third NMOS tube through a bonding wire, and the second end of the third NMOS tube and the second end of the fourth NMOS tube are both connected with the reference ground of the second high-voltage area; the first end of the third NMOS tube and the first end of the fourth NMOS tube are both connected with the voltage of the second voltage area; the second end of the second NMOS tube is connected with the second end of the fourth NMOS tube through a bonding wire;

the first end of the first PMOS tube and the first end of the second PMOS tube are both connected with the voltage of the second voltage area; the second end of the first PMOS tube is connected with the control end of the fifth NMOS tube, and the second end of the second PMOS tube is connected with the control end of the sixth NMOS tube; the first end of the fifth NMOS tube and the first end of the sixth NMOS tube are both connected with the voltage of the second voltage region; the second end of the fifth NMOS tube and the second end of the sixth NMOS tube are respectively connected with the reference ground of the second high-voltage area through a capacitor.

11. The driving circuit of claim 10, wherein the size of the third NMOS transistor is larger than the size of the fifth NMOS transistor; the size of the fourth NMOS tube is larger than that of the sixth NMOS tube.

12. A driving circuit of a switching tube is characterized in that,

the driving circuit comprises at least two high-voltage areas separated by at least two isolating rings: a first high voltage region and a second high voltage region; the first high-voltage area corresponds to a first voltage domain, the second high-voltage area corresponds to a second voltage domain, and the voltage of the first voltage domain is different from that of the second voltage domain;

the first high-voltage area and the second high-voltage area are respectively used for arranging a P-type semiconductor device, and the P-type semiconductor device is used for driving the first switch tube.

13. The driving circuit according to claim 12, further comprising: a bonding wire;

the bonding wire is used for transmitting the first high-voltage area electric energy to the second high-voltage area and transmitting the driving signal from the first high-voltage area to the second high-voltage area.

14. The driving circuit according to claim 13, further comprising: a voltage conversion circuit;

the voltage conversion circuit is located in the first high-voltage area and is used for converting the voltage of the first voltage domain into the voltage of the second voltage domain;

the bonding wire is used for connecting the output voltage of the voltage conversion circuit to the second high-voltage area.

15. The driver circuit according to claim 13 or 14, wherein the bonding wire is directly wired between the pad of the first high voltage region and the pad of the second high voltage region.

16. The driving circuit according to claim 13 or 14, wherein the pad of the first high voltage region is connected to a package pin of the driving circuit through the bonding wire, and the pad of the second high voltage region is connected to a package pin of the driving circuit through the bonding wire, so that the electric energy transmission and the driving signal transmission are realized between the first high voltage region and the second high voltage region.

17. A power converter, comprising: at least one half bridge leg and at least one drive circuit of any one of claims 1-11 or at least one drive circuit of any one of claims 12-16;

the half-bridge arm comprises a first switching tube and a second switching tube;

the first end of the first switch tube is connected with a power supply, the second end of the first switch tube is connected with the first end of the second switch tube, and the second end of the second switch tube is grounded;

the driving circuit is used for driving the switching states of the first switching tube and the second switching tube;

the power converter is used for outputting the power after transforming the voltage of the power supply.

Technical Field

The application relates to the technical field of power electronics, in particular to a driving circuit, a driving circuit and a power converter of a bridge arm switching tube.

Background

At present, bridge circuits are needed in many scenes, for example, a rectification circuit and an inverter circuit can be realized by the bridge circuits, and can be half-bridge circuits or full-bridge circuits, but no matter the bridge circuits are half-bridge circuits or full-bridge circuits, each bridge arm includes an upper switching tube and a lower switching tube, namely, the upper switching tube and the lower switching tube, a first end of the upper switching tube is connected with a positive electrode of a power supply, a second end of the upper switching tube is connected with a first end of the lower switching tube, and a second end of the lower switching tube is grounded. During general work, the upper switch tube and the lower switch tube are conducted alternately and cannot be conducted simultaneously. In different application scenarios, the voltage of the power supply differs, for example, the voltage of the power supply may vary from tens of volts to hundreds of volts, and may even be up to kilovolts in a scenario with a higher voltage.

Because the upper switch tube is directly connected with the power supply, when the upper switch tube is closed and the lower switch tube is disconnected, the voltage of the second end of the upper switch tube is the voltage of the power supply; conversely, when the upper switch tube is disconnected and the lower switch tube is closed, the voltage of the second end of the upper switch tube is the ground. Therefore, when the upper switch tube is in different states, the voltage of the second end of the upper switch tube is switched back and forth between the voltage of the power supply and the ground, and the range of the voltage change may reach hundreds of volts or even thousands of volts, that is, the higher the voltage level of the bridge circuit application scene is, the larger the fluctuation of the voltage change is.

At present, a switching tube driving circuit of a high voltage bridge circuit generally includes a high voltage region, a low voltage region and a high voltage isolation ring surrounding the high voltage region, where the high voltage isolation ring is used to isolate a floating voltage at a second end of an upper switching tube, that is, the driving circuit of the upper switching tube is integrated in the high voltage region by using a semiconductor process; the low-voltage area integrates the drive of the lower switching tube by using a semiconductor process. However, two different voltage domains exist in the high-voltage region, and the P-type semiconductor devices of different voltage domains have different body potential requirements, but the current manufacturing process cannot manufacture independent P-wells for the P-type semiconductor devices to realize the isolation of the N-wells of the P-type semiconductor devices of different voltage domains.

Disclosure of Invention

In order to solve the technical problems, the application provides a driving circuit, a driving circuit and a power converter of a bridge arm switching tube, which can realize the isolation of the body potential of P-type semiconductor devices in different voltage domains in a high-voltage domain and avoid the interference between the P-type semiconductor devices in different voltage domains without changing the flow of the existing semiconductor manufacturing process.

The embodiment of the application provides a driving circuit of a bridge arm switching tube, wherein the bridge arm switching tube comprises a first switching tube and a second switching tube; the first end of the first switch tube is connected with the power supply, the second end of the first switch tube is connected with the first end of the second switch tube, and the second end of the second switch tube is grounded; the drive circuit includes: the high-voltage isolation ring comprises a low-voltage area and at least two high-voltage areas isolated by at least two isolation rings, wherein the at least two high-voltage areas comprise a first high-voltage area and a second high-voltage area; the first high-voltage area corresponds to a first voltage domain, the second high-voltage area corresponds to a second voltage domain, and the voltage of the first voltage domain is different from that of the second voltage domain; the low-voltage area is provided with a semiconductor device for driving the second switching tube; the first high-voltage area and the second high-voltage area are respectively provided with a P-type semiconductor device, and the P-type semiconductor devices are used for driving the first switching tube. Because the first high-voltage area and the second high-voltage area are isolated from each other by the isolation ring, the P-type semiconductor devices arranged in the two high-voltage areas have N wells isolated from each other, and therefore the P-type semiconductor devices in the two high-voltage areas cannot interfere with each other.

The driving circuit provided by the embodiment of the present application includes at least two isolation rings, for example, may include two isolation rings, or a greater number of isolation rings, for example, three or four isolation rings, and the number of isolation rings may be determined according to the number of different voltage domains included in the high voltage region, that is, the number of isolation rings is the same as the number of voltage domains in the high voltage region. The isolation rings can be manufactured at the same time, and the high-voltage areas can be formed at the same time without adding extra semiconductor process flows.

The driving circuit provided by the embodiment of the application is characterized in that at least two different isolation rings are arranged in a high-voltage area to form at least two high-voltage areas, each high-voltage area corresponds to one voltage domain, namely a plurality of voltage domains isolated from each other are formed, the voltage domains isolated from each other have different voltages, so that the P-type semiconductor devices in different voltage domains are isolated from each other, the P-type semiconductor devices in different voltage domains have different body potentials, and the P-type semiconductor devices in different voltage domains are prevented from interfering with each other. Due to the adoption of the driving circuit provided by the embodiment of the application, the requirements that the P-type semiconductor devices in different voltage domains have different body potentials can be met without changing the flow of the conventional semiconductor process, so that the P-type semiconductor devices in different voltage domains have mutually isolated N wells, and the requirements that the P-type semiconductor devices in different voltage domains have different body potentials can be quickly solved by the mode. Moreover, the isolation rings can be manufactured at the same time, and the high-voltage areas can be formed at the same time without adding extra semiconductor process flows.

In one possible implementation, the at least two isolation rings include a first isolation ring and a second isolation ring; the first isolation ring surrounds the first high-voltage area, and the second isolation ring surrounds the second high-voltage area; the low pressure region is a region other than the first and second isolator rings. The first spacer ring and the second spacer ring are two independent spacer rings, and one possible way is that a low pressure area exists between the first spacer ring and the second spacer ring.

In one possible implementation, since the first high voltage region and the second high voltage region require power transfer, signal transfer is also required, and the signals include driving signals and control signals. Therefore, the drive circuit further includes: and the bonding wire is used for transmitting the first high-voltage area electric energy to the second high-voltage area and transmitting the driving signal from the first high-voltage area to the second high-voltage area.

In one possible implementation manner, the driving circuit further includes a voltage conversion circuit located in the first high voltage region, the voltage conversion circuit is configured to convert a voltage of the first voltage domain into a voltage of the second voltage domain; the bonding wire is used for connecting the output voltage of the voltage conversion circuit to the second high-voltage area. The voltage converting circuit may be a step-down converting circuit, that is, a voltage of the first voltage domain is stepped down and then transmitted to the second voltage domain through the bonding wire, that is, a voltage of the second voltage domain is lower than a voltage of the first voltage domain.

In one possible implementation, there are two implementations of the bond wire between the first voltage region and the second voltage region.

The first method comprises the following steps: the bonding wire directly wires between the bonding pad of the first high-voltage area and the bonding pad of the second high-voltage area, which is simple, and the bonding wire can be wire-bonded between the inner parts.

And the second method comprises the following steps: the bonding pad of the first high-voltage area is connected with the packaging pin of the driving circuit through a bonding wire, and the bonding pad of the second high-voltage area is connected with the packaging pin of the driving circuit through the bonding wire, so that electric energy transmission and driving signal transmission are realized between the first high-voltage area and the second high-voltage area, and the connection can be indirectly realized through packaging.

In a possible implementation manner, all the P-type semiconductor devices in the first high-voltage region have the same body potential, that is, the N-wells of all the P-type semiconductor devices in the first high-voltage region are the same, that is, the N-wells are shared, so that the process can be saved, and the manufacturing is simple; all the P-type semiconductor devices in the second high voltage region have the same body potential, i.e., the N-wells of all the P-type semiconductor devices in the second high voltage region are the same, i.e., share the N-well. But the two high-voltage regions do not share the N well, so that the P-type semiconductor device in the high-voltage regions can avoid signal interference caused by the same body potential. The N-type semiconductor device in the first high-voltage region and the N-type semiconductor device in the second high-voltage region are provided with independent P wells, namely the N-type semiconductor devices in the two high-voltage regions and the N-type semiconductor device in the low-voltage region are provided with independent P wells.

In one possible implementation, the first isolation ring and the second isolation ring are both silicon substrates.

Since the driving circuit provided by the embodiment of the application includes at least two isolation rings to isolate at least two high voltage areas, signal transmission exists between different high voltage areas, for example, the first high voltage area and the second high voltage area are interconnected through bonding wires, the bonding wires may generate parasitic inductance, so as to generate interference, and avoid the interference. In one possible implementation, the first high voltage region includes a first NMOS transistor and a second NMOS transistor; the first NMOS tube and the second NMOS tube are symmetrically arranged; the first NMOS tube and the second NMOS tube are respectively connected with the mirrored common mode rejection circuit in the second high-voltage area; and the first NMOS tube and the second NMOS tube are alternately conducted, so that one of the two branches of the common mode rejection circuit of the mirror image in the second high-voltage area is conducted.

In one possible implementation, the second high voltage region includes: a first branch and a second branch; the first branch circuit comprises a third NMOS transistor, a fifth NMOS transistor and a first PMOS transistor; the second branch includes: a fourth NMOS transistor, a sixth NMOS transistor and a second PMOS transistor; the first end of the first NMOS tube and the first end of the second NMOS tube are both connected with the reference ground of the first high-voltage area, the second end of the first NMOS tube is connected with the second end of the third NMOS tube through a bonding wire, and the second end of the third NMOS tube and the second end of the fourth NMOS tube are both connected with the reference ground of the second high-voltage area; the first end of the third NMOS tube and the first end of the fourth NMOS tube are both connected with the voltage of the second voltage area; the second end of the second NMOS tube is connected with the second end of the fourth NMOS tube through a bonding wire; the first end of the first PMOS tube and the first end of the second PMOS tube are both connected with the voltage of the second voltage area; the second end of the first PMOS tube is connected with the control end of the fifth NMOS tube, and the second end of the second PMOS tube is connected with the control end of the sixth NMOS tube; the first end of the fifth NMOS tube and the first end of the sixth NMOS tube are both connected with the voltage of the second voltage area; the second end of the fifth NMOS tube and the second end of the sixth NMOS tube are respectively connected with the reference ground of the second high-voltage area through a capacitor.

Because the two high-voltage basins are internally provided with the differential circuits of mirror images, the differential circuits are arranged for inhibiting the common-mode signal interference generated by the two high-voltage basins. When the potential conversion of the two high-voltage basins is inconsistent, a larger common-mode signal is generated, and when the parasitic capacitance is not matched with the parasitic inductance of the bonding wire, the common-mode signal is converted into a differential-mode signal, so that the circuit can be out of work. Therefore, the common mode rejection circuit provided by the embodiment of the application can solve the above technical problems and suppress the situation that the common mode signal is converted into the differential mode signal.

In a possible implementation manner, in order to ensure that more current flows into the load resistor side and reduce signal transmission delay, the size of the third NMOS transistor is larger than that of the fifth NMOS transistor; the size of the fourth NMOS tube is larger than that of the sixth NMOS tube.

The embodiment of the application further provides a driving circuit of the switching tube, and the driving circuit comprises at least two following high-voltage areas isolated by at least two isolating rings: a first high voltage region and a second high voltage region; the first high-voltage area corresponds to a first voltage domain, the second high-voltage area corresponds to a second voltage domain, and the voltage of the first voltage domain is different from that of the second voltage domain; the first high-voltage area and the second high-voltage area are respectively used for arranging a P-type semiconductor device, and the P-type semiconductor device is used for driving the first switching tube. Because the first high-voltage area and the second high-voltage area are isolated from each other by the isolation ring, the P-type semiconductor devices arranged in the two high-voltage areas have N wells isolated from each other, and therefore the P-type semiconductor devices in the two high-voltage areas cannot interfere with each other.

In one possible implementation manner, the method further includes: a bonding wire; the bonding wires are used for transmitting the first high-voltage area electric energy to the second high-voltage area and are also used for transmitting the driving signal from the first high-voltage area to the second high-voltage area.

In one possible implementation manner, the method further includes: a voltage conversion circuit; the voltage conversion circuit is positioned in the first high-voltage area and used for converting the voltage of the first voltage domain into the voltage of the second voltage domain; the bonding wire is used for connecting the output voltage of the voltage conversion circuit to the second high-voltage area.

In one possible implementation, the bond wire is routed directly between the pad of the first high voltage region and the pad of the second high voltage region.

In a possible implementation manner, the pad of the first high-voltage area is connected with the package pin of the driving circuit through a bonding wire, and the pad of the second high-voltage area is connected with the package pin of the driving circuit through a bonding wire, so that electric energy transmission and driving signal transmission are realized between the first high-voltage area and the second high-voltage area.

An embodiment of the present application further provides a power converter, including: at least one half-bridge leg and at least one drive circuit as described in the above embodiments; the half-bridge arm comprises a first switching tube and a second switching tube; the first end of the first switch tube is connected with the power supply, the second end of the first switch tube is connected with the first end of the second switch tube, and the second end of the second switch tube is grounded; the driving circuit is used for driving the switching states of the first switching tube and the second switching tube; the power converter is used for outputting the power after transforming the voltage of the power supply.

The application has at least the following advantages:

in the driving circuit provided in the embodiment of the application, at least two different isolation rings are disposed in a high-voltage region to form at least two high-voltage regions, each high-voltage region corresponds to one voltage domain, that is, a plurality of voltage domains isolated from each other are formed, the voltage domains isolated from each other have different voltages, for example, the first voltage domain corresponds to a first voltage, and the second voltage domain corresponds to a second voltage. The P-type semiconductor devices corresponding to each voltage domain are arranged, so that mutual isolation among the P-type semiconductor devices of different voltage domains can be realized, for example, the P-type semiconductor device arranged in the first voltage domain has an N well of a first voltage, the P-type semiconductor device arranged in the second voltage domain has an N well of a second voltage, and the N-type potentials of the P-type semiconductors corresponding to the two voltage domains are different, so that the P-type semiconductor devices of different voltage domains have different body potentials, and mutual interference among the P-type semiconductor devices of different voltage domains is avoided. Due to the adoption of the driving circuit provided by the embodiment of the application, the requirements that the P-type semiconductor devices in different voltage domains have different body potentials can be met without changing the flow of the conventional semiconductor process, so that the P-type semiconductor devices in different voltage domains have mutually isolated N wells, and the requirements that the P-type semiconductor devices in different voltage domains have different body potentials can be quickly solved by the mode. Moreover, the isolation rings can be manufactured at the same time, and the high-voltage areas can be formed at the same time without adding extra semiconductor process flows.

Drawings

Fig. 1 is a schematic diagram of a driving circuit of a high-voltage bridge circuit according to an embodiment of the present disclosure;

FIG. 2 is an integrated schematic diagram of a driving circuit corresponding to FIG. 1;

FIG. 3 is a cross-sectional schematic diagram of an integrated circuit corresponding to FIG. 2;

fig. 4 is a schematic diagram of a driving circuit of a bridge arm switching tube according to an embodiment of the present disclosure;

fig. 5 is a schematic diagram of two high voltage regions interconnected according to an embodiment of the present disclosure;

fig. 6 is a schematic diagram of two high voltage regions interconnected according to an embodiment of the present disclosure;

FIG. 7 is a cross-sectional view of a driver circuit including a plurality of isolation rings provided in an embodiment of the present application;

FIG. 8 is a schematic diagram of another driving circuit according to an embodiment of the present disclosure;

FIG. 9 is a schematic diagram of an equivalent circuit corresponding to FIG. 8;

fig. 10 is a schematic diagram of a driving circuit of a bridge arm switching tube according to an embodiment of the present disclosure;

fig. 11 is a schematic diagram of another driving circuit provided in the embodiment of the present application;

fig. 12 is a schematic diagram of another driving circuit provided in the embodiment of the present application;

fig. 13 is a schematic diagram of a power converter according to an embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.

The terms "first," "second," and the like in the following description are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any number of technical features indicated. Thus, a feature defined as "first," "second," etc. may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless otherwise specified.

In the present application, unless expressly stated or limited otherwise, the term "coupled" is to be construed broadly, e.g., "coupled" may be a fixed connection, a removable connection, or an integral part; may be directly connected or indirectly connected through an intermediate. Furthermore, the term "coupled" may be a manner of making electrical connections that communicate signals. "coupled" may be a direct electrical connection or an indirect electrical connection through intervening media.

In order to make those skilled in the art better understand the technical solution provided by the embodiments of the present application, an application scenario of the technical solution is described below with reference to the accompanying drawings.

The embodiment of the application relates to a driving circuit of a switching tube, in particular to a driving circuit of a switching tube in a bridge circuit, namely the driving circuit is used for driving the switching tube connected with a power supply in the bridge circuit.

Referring to fig. 1, a driving circuit of a high voltage bridge circuit is shown.

The high voltage mentioned in the embodiment of the application is generally more than several hundred volts, and is applied to the fields of electric automobiles, photovoltaic power generation, secondary power supplies and the like. Taking a photovoltaic system as an example, since the photovoltaic module outputs direct current, an inverter is required to convert the direct current into alternating current, a general inverter includes a bridge circuit, and the input voltage of the inverter is generally hundreds of volts or even kilovolts, so the voltage connected by the bridge circuit is hundreds of volts or even kilovolts.

In fig. 1, an example of a half-bridge circuit is shown, the half-bridge circuit includes two switching tubes, i.e., a first switching tube Q1 and a second switching tube Q2, connected in series, where a first end of the first switching tube Q1 is connected to a power source VIN, a second end SW of the first switching tube Q1 is connected to a first end of the second switching tube Q2, and a second end of the second switching tube Q2 is grounded PGND. The voltage level of VIN is not limited in the embodiments of the present application, and may be, for example, hundreds of volts to kilovolts.

As can be seen from fig. 1, when the first switch Q1 is closed and the second switch Q2 is opened, the voltage at the point SW becomes the voltage of VIN, and when the first switch Q1 is opened and the second switch Q2 is closed, the voltage at the point SW becomes the voltage of PGND. Therefore, when the on states of the two switching tubes are switched, the voltage at the point SW fluctuates between VIN and PGND. In order to isolate the influence of the voltage fluctuation at the point SW on the semiconductor device in the low voltage region 20, the high voltage region and the low voltage region are isolated by an isolation ring.

The driving circuit corresponding to the two switching tubes of the half-bridge circuit includes a high voltage region 10 and a low voltage region 20, and since the voltage connected to the first switching tube Q1 is higher and the voltage connected to the second switching tube Q2 is lower, the high voltage region 10 corresponds to the first switching tube Q1 and the low voltage region 20 corresponds to the second switching tube Q2, wherein the high voltage region 10 includes two different voltage domains (voltage domains), namely, a first voltage domain 11 and a second voltage domain 12, wherein the first voltage domain 11 corresponds to a voltage VB and the second voltage domain 12 corresponds to a voltage VDDH.

Referring to fig. 2, an integrated schematic diagram of a driving circuit corresponding to fig. 1 is shown.

As can be seen from fig. 2, the driving circuit can be realized in an actual product by forming an integrated circuit using a semiconductor process, and the integrated circuit includes the high voltage region 10, the low voltage region 20, and the isolation ring 30.

In order to reduce the influence of voltage floating at the SW point in fig. 1 on the low voltage region 20, an isolation ring 30 may be provided, and the high voltage region 10 and the low voltage region 20 are isolated by the isolation ring 30.

Referring to fig. 3, a cross-sectional schematic of an integrated circuit corresponding to fig. 2 is shown.

The left side of the isolation ring 30 is a low pressure region, and the right side of the isolation ring 30 is a high pressure region. The high voltage region is connected to the P-type substrate 101 through an N-type buried layer (NBL)102, and a voltage difference between the P-type substrate 101 and the high voltage region is isolated by an inverted PN junction. Wherein NBL is a first N-type buried layer,

as shown in fig. 3, in the high voltage region, the N-type semiconductor devices, for example, the NMOS, each of which may be respectively integrated in a separate P-well 104, that is, each of the NMOS has a separate P-well, and only one NMOS is illustrated in fig. 3. Thus by making multiple P-wells, NMOS with different body potentials can be made.

The P-type semiconductor device, taking PMOS as an example, is integrated in the N-well 103 shared by the high voltage regions, for example, two PMOS transistors are PMOS1 and PMOS2, respectively, and PMOS1 and PMOS2 share the same N-well 103. The N-well 103 of the PMOS is implemented using N-which is a second buried N-type layer, and NBL differs from N-in that the doping concentration of N-is higher than that of NBL. Therefore, under current semiconductor processing conditions, all P-type semiconductor devices in the high-voltage region will have the same body potential.

With continued reference to fig. 1, the high voltage domain in the half bridge arm includes two different voltage domains, each of which includes a PMOS, and if different PMOS have the same N-well 103 using the structure shown in fig. 3, there is interference between the PMOS in the two different voltage domains.

Therefore, the current semiconductor manufacturing process cannot meet the requirement that P-type semiconductor devices of different voltage domains have different body potentials. If the semiconductor manufacturing process is improved, the process steps need to be changed in the previous manufacturing line, and a great deal of development time needs to be invested, so that the requirement that different P-type semiconductor devices have different body potentials cannot be quickly solved.

Driving circuit embodiment of bridge arm switching tube

In order to meet the requirement that different P-type semiconductor devices in a high-voltage driving circuit have different body potentials, when the driving circuit of a bridge arm switching tube is manufactured, a plurality of isolation rings are manufactured according to the number of different voltage domains in a high-voltage domain, namely the number of the voltage domains is the same as that of the isolation rings and the isolation rings correspond to each other one by one. The P-type semiconductor devices in the same voltage domain can be located in the region isolated by the same isolation ring, and the P-type semiconductor devices in different voltage domains are located in different isolation rings, so that mutual interference among the P-type semiconductor devices in different voltage domains is avoided.

As shown in fig. 1, the high voltage region in the driving circuit shown in fig. 1 includes two voltage domains, i.e., a first voltage VB and a second voltage VDDH, respectively, wherein the second voltage VDDH is obtained by down-converting the first voltage VB. Therefore, the second voltage VDDH is smaller than the first voltage VB. Therefore, the embodiment of the application can isolate the P-type semiconductor device connected with the first voltage VB and the P-type semiconductor device connected with the second voltage VDDH, and can be realized by arranging two isolation rings.

The following describes in detail an implementation manner of a driving circuit of a bridge arm switching tube provided in an embodiment of the present application with reference to the accompanying drawings. The embodiment of the present application does not limit the bridge arm half-bridge circuit or the full-bridge circuit, for example, the half-bridge circuit includes one bridge arm, and the full-bridge circuit includes two bridge arms. The embodiment of the application also does not specifically limit the upper tube and the lower tube in the bridge arm to be respectively realized by one switch tube, and the upper tube can also be realized by at least two switch tubes, so long as the function of one switch tube can be realized, and the lower tube is also similar in principle.

Referring to fig. 4, the figure is a schematic diagram of a driving circuit of a bridge arm switching tube according to an embodiment of the present application.

The driving circuit of the bridge arm switching tube provided by the embodiment of the application is used for outputting a driving signal to a grid electrode of the bridge arm switching tube so as to control the switching state of the bridge arm switching tube; the bridge arm switching tube comprises a first switching tube and a second switching tube; the first end of the first switch tube is connected with the power supply, the second end of the first switch tube is connected with the first end of the second switch tube, and the second end of the second switch tube is grounded; the first switching tube and the second switching tube can be seen in fig. 1, and are not described herein again.

The drive circuit includes: the low-pressure area 20 and the at least two high-pressure areas isolated by the at least two isolating rings, for example, the two isolating rings are respectively a first isolating ring 31 and a second isolating ring 32, the first isolating ring 31 isolates the first high-pressure area 11, and the second isolating ring 32 isolates the second high-pressure area 12. The first high voltage region 11 corresponds to a first voltage domain and the second high voltage region 12 corresponds to a second voltage domain. The voltage of the first voltage domain and the voltage of the second voltage domain are different;

the low voltage region 20 is used for arranging a semiconductor device in the driving circuit for driving the second switching tube; i.e. the semiconductor device driving the second switching tube, is arranged in the low voltage region 20.

The low-voltage area is provided for a semiconductor device in the driving circuit for driving the second switching tube;

the first high voltage region 11 is used for arranging a driving circuit for driving the P-type semiconductor device of the first voltage domain of the first switch tube, and the second high voltage region 12 is used for arranging a driving circuit for driving the P-type semiconductor device of the second voltage domain of the first switch tube, namely, the first high voltage region 11 is arranged with the P-type semiconductor device of the first voltage domain, and the second high voltage region 12 is arranged with the P-type semiconductor device of the second voltage domain. The P-type semiconductor devices of the first voltage domain and the P-type semiconductor devices of the second voltage domain have different body potentials. That is, the voltage of the first switch tube connection is higher than that of the second switch tube connection, and therefore, the first high voltage region 11 and the second high voltage region 12 are both semiconductor devices for providing a driving circuit corresponding to the first switch tube.

In addition, since the high-voltage region includes at least two different voltage domains, in order to make the P-type semiconductor device in each voltage domain have different body potentials, the embodiment of the present application provides a plurality of isolation rings to isolate each voltage domain. It should be understood that the more voltage domains, the more number of isolation rings can be provided, for example, three different voltage domains of 19V, 6V and 3.3V, and three different isolation rings can be isolated to obtain three different voltage domains.

In the embodiment of the present application, two isolation rings are not limited to be provided, and for convenience of description, a high voltage region including two different voltage domains is taken as an example for description, and two isolation rings, namely the first isolation ring 31 and the second isolation ring 32, are correspondingly provided.

In a specific implementation, as shown in fig. 4, a first isolation ring 31 surrounds the first high-pressure region 11, and a second isolation ring 32 surrounds the second high-pressure region 12; the low pressure region 20 is a region other than the first and second isolating rings 31, 32, and one implementation is that the low pressure region 20 surrounds the first and second isolating rings 31, 32. Specifically, two independent high-voltage basins (high-voltage regions may also be referred to as high-voltage basins) may be fabricated in the same substrate 100, so as to achieve isolation between two different voltage domains, for example, the first high-voltage region 11 isolated by the first isolation ring 31 is VB-SW corresponding to the first voltage domain in fig. 1, and the second high-voltage region 12 isolated by the second isolation ring 32 is VDDH-SW corresponding to the second voltage domain in fig. 1.

As can also be seen from fig. 1, power transmission and signal transmission are required between the first high voltage region and the second high voltage region, and therefore, power transmission and signal transmission can be achieved between the two high voltage regions through bonding wires (bondwires). I.e. the bond wires are used for transferring the first high voltage area electrical energy to said second high voltage area and for transferring the drive signal from the first high voltage area to the second high voltage area. For example, the power transmission means that VDDH is transmitted from the first high voltage region to the second high voltage region, VDDH is actually VB converted by the voltage conversion circuit in the first high voltage region, and the signal transmission means that the driving signal of the switch tube is transmitted from the first high voltage region to the second high voltage region. That is, the drive circuit provided by the embodiment of the present application further includes: a voltage conversion circuit; the voltage conversion circuit is positioned in the first high-voltage area and used for converting the voltage of the first voltage domain into the voltage of the second voltage domain; the bonding wire is used for connecting the output voltage of the voltage conversion circuit to the second high-voltage area.

One possible implementation is that the voltage conversion circuit can be implemented by a linear voltage regulator circuit, which can implement both voltage reduction and voltage regulation.

Two implementations of the electric energy transfer and the signal transfer between the first high voltage region and the second high voltage region are exemplified below.

The first method comprises the following steps:

referring to fig. 5, a schematic diagram of two high voltage regions interconnected according to an embodiment of the present disclosure is shown.

As shown in fig. 5, the bonding wires are directly wired between the PAD of the first high voltage area 11 and the PAD of the second high voltage area 12. I.e. the voltage VDDH of the first high voltage domain 11 is directly connected to VDDH of the second high voltage domain 12 by bonding wires 501, which are all through landings on pads. Similarly, the signal transmission between the first high voltage region 11 and the second high voltage region 12 is also realized by directly bonding the bonding wire 502 on the pad.

The transfer of power and signals between the first high voltage region 11 and the second high voltage region 12 can be achieved by means of package PINs PIN, in addition to being achieved directly on the pads by means of bond wires, as will be described in more detail below with reference to the drawings.

And the second method comprises the following steps:

referring to fig. 6, the figure is a schematic diagram of two high voltage regions interconnected according to an embodiment of the present application.

As can be seen from fig. 6, the pins VB and VDDH are provided at the package pins of the driving circuit. The pad of the first high voltage domain 11 is connected to the package pin VDDH of the driving circuit through a bonding wire 501, and the pad of the second high voltage domain 12 is also connected to the package pin VDDH of the driving circuit through a bonding wire 501, thereby electrically connecting VDDH of the first high voltage domain 11 and VDDH of the second high voltage domain 12. Similarly, the driving signals between the first high voltage region 11 and the second high voltage region 12 may also be interconnected through the package pins, that is, in this embodiment, the electric energy transmission and the driving signal transmission between the first high voltage region and the second high voltage region are realized through the package pins.

It should be understood that the above is only an example, the power transmission and the driving signal transmission between the first high voltage area and the second high voltage area may adopt different interconnection modes, for example, the power transmission is realized by using a package pin, and the driving signal interconnection is realized by directly bonding wires.

In order to make those skilled in the art better understand the driving circuit of the bridge arm switching tube provided in the embodiments of the present application, the following description is made with reference to the cross-sectional view.

Referring to fig. 7, a cross-sectional view of a driving circuit including a plurality of isolation rings is provided according to an embodiment of the present application.

Fig. 7 continues to describe the example in which the driving circuit includes two isolation rings, i.e., a first isolation ring 31 and a second isolation ring 32.

The first isolation ring 31 corresponds to the first voltage domain VB, and the second isolation ring 32 corresponds to the second voltage domain VDDH. The first isolation ring 31 isolates a first high-voltage region, the second isolation ring 32 isolates a second high-voltage region, all the P-type semiconductor devices in the first high-voltage region have the same body potential, and all the P-type semiconductor devices in the second high-voltage region have the same body potential; the N-type semiconductor device in the first high voltage region and the N-type semiconductor device in the second high voltage region each have independent P-wells.

Since the first isolation ring 31 and the second isolation ring 32 are isolated from each other, the PMOS transistors in the first high-voltage region isolated by the first isolation ring 31 and the PMOS transistors in the second high-voltage region isolated by the second isolation ring 32 are isolated from each other, and therefore, the PMOS transistors in the two high-voltage regions have different body potentials, that is, the PMOS transistors in different voltage regions have different body potentials, so as to avoid interference caused by the same body potential.

The drive circuit that this application embodiment provided, through setting up two at least different isolating rings for the high-voltage region, isolate two different voltage domains, every voltage domain sets up corresponding PMOS, can realize the mutual isolation between the PMOS in different voltage domains like this, makes the PMOS in different voltage domains have different body potential to avoid interfering mutually. Due to the adoption of the driving circuit provided by the embodiment of the application, the requirements that the PMOS in different voltage domains have different body potentials can be met without changing the flow of the conventional semiconductor process, so that the PMOS in different voltage domains have mutually isolated N wells, and the requirements that the PMOS in different voltage domains have different body potentials can be quickly solved by the mode. Moreover, the isolation rings can be manufactured at the same time, and the high-voltage areas can be formed at the same time without adding extra semiconductor process flows.

The material of the isolation ring is not limited in the embodiments of the present application, for example, the first isolation ring and the second isolation ring may be both silicon substrates.

Since the driving circuit provided by the embodiment of the present application includes at least two isolation rings to isolate at least two high voltage regions, and there is signal transmission between different high voltage regions, for example, the first high voltage region and the second high voltage region are interconnected through bonding wires, the bonding wires may generate parasitic inductance, thereby generating interference, and in order to avoid the interference, the embodiment of the present application further provides a solution for solving the interference, which is described in detail below with reference to the accompanying drawings.

Referring to fig. 8, the figure is a schematic diagram of another driving circuit provided in the embodiment of the present application.

The first high voltage region 31 provided in the embodiment of the present application includes: a first NMOS transistor N1 and a second NMOS transistor N2; as can be seen from fig. 8, the first NMOS transistor N1 and the second NMOS transistor N2 are symmetrically disposed; the first NMOS transistor N1 and the second NMOS transistor N2 are respectively connected to the mirrored common mode rejection circuit in the second high voltage region 32. Wherein the second high voltage region 32 corresponds to the voltage VDDH, the ground reference of the first high voltage region 31 is SW1, and the ground reference of the second high voltage region is SW 2.

In actual operation, the pulse driving signals corresponding to the first NMOS transistor N1 and the second NMOS transistor N2 are complementary, and the first NMOS transistor N1 and the second NMOS transistor N2 are complementarily turned on, so that the driving signal of the bridge arm switching transistor is transmitted to the first switching transistor of the bridge arm, i.e., Q1 in fig. 1, through the common mode suppression circuit in the second high voltage region 32.

The first NMOS transistor N1 and the second NMOS transistor N2 are alternately turned on to turn on one of the two branches of the common mode rejection circuit mirrored in the second high voltage region 32. The common mode rejection circuit in the second high voltage region 32 is also a mirror-symmetric circuit, and the common mode rejection circuit included in the second high voltage region 32 is described below.

The second high voltage region includes: a first branch and a second branch.

The first branch circuit comprises a third NMOS transistor N3, a fifth NMOS transistor N5 and a first PMOS transistor P1; the second branch includes: a fourth NMOS transistor N4, a sixth NMOS transistor N6 and a second PMOS transistor P2;

a first end of a first NMOS transistor N1 and a first end of a second NMOS transistor N2 are both connected with a reference ground SW2 of the first high-voltage region, a second end of the first NMOS transistor N1 is connected with a second end of a third NMOS transistor N3 through a bonding wire L1, and a second end of a third NMOS transistor N3 and a second end of a fourth NMOS transistor N4 are both connected with a reference ground SW1 of the second high-voltage region 32; the first end of the third NMOS transistor N3 and the first end of the fourth NMOS transistor N4 are both connected to the voltage VDDH of the second voltage region 32; the second end of the second NMOS transistor N2 is connected to the second end of the fourth NMOS transistor N4 through a bonding wire L2;

the first end of the first PMOS pipe P1 and the first end of the second PMOS pipe P2 are both connected with the voltage VDDH of the second voltage region; the second end of the first PMOS tube P1 is connected with the control end of a fifth NMOS tube N5, and the second end of the second PMOS tube P2 is connected with the control end of a sixth NMOS tube N6; the first end of the fifth NMOS transistor N5 and the first end of the sixth NMOS transistor N6 are both connected to the voltage VDDH of the second voltage region; the second terminal of the fifth NMOS transistor N5 and the second terminal of the sixth NMOS transistor N6 are respectively connected to the ground SW2 of the second high voltage region 32 through a capacitor. It should be understood that for both NMOS and PMOS, the control terminal refers to the gate of the MOS transistor.

The bonding wires in fig. 8 are illustrated by L1 and L2, but in an actual product, the number of bonding wires is not particularly limited. The bond wires need to be connected to pads, there is a parasitic capacitance, both of which are shown in fig. 8 and 9. The wire mismatch condition creates parasitic inductance, as shown in fig. 9, where L1 and L2 are equivalent parasitic inductances. In order to reduce the influence caused by the mismatch of the bonding wires, since the driving circuit provided by the embodiment of the application comprises at least two high-voltage basins, when the potential conversion of the two high-voltage basins is inconsistent, a common-mode signal can occur.

Because the two high-voltage basins are internally provided with the differential circuits of mirror images, the differential circuits are arranged for inhibiting the common-mode signal interference generated by the two high-voltage basins. When the potential conversion of the two high-voltage basins is inconsistent, a larger common-mode signal is generated, and when the parasitic capacitance is not matched with the parasitic inductance of the bonding wire, the common-mode signal is converted into a differential-mode signal, so that the circuit can be out of work. Therefore, the common mode rejection circuit provided by the embodiment of the application can solve the above technical problems and suppress the situation that the common mode signal is converted into the differential mode signal.

In actual operation, a driving signal of the first switching tube is transmitted to the second high-voltage region from the first high-voltage region, the second high-voltage region is transmitted to the first switching tube, and in order to ensure that the driving signal transmitted to the first switching tube is accurate, the common mode rejection circuit is required to reject the common mode signal. The following description is made in conjunction with specific working principles.

In actual work, the controller alternately sends driving signals to the first NMOS transistor N1 and the second NMOS transistor N2 to alternately turn on the first NMOS transistor N1 and the second NMOS transistor N2, that is, the first NMOS transistor N1 and the second NMOS transistor N2 are not turned on at the same time, the second NMOS transistor N2 is turned off when the first NMOS transistor N1 is turned on, and the first NMOS transistor N1 is turned off when the second NMOS transistor N2 is turned on otherwise. If the first NMOS transistor N1 and the second NMOS transistor N2 are turned on simultaneously, the left and right sides of the mirror circuit in the second high voltage region are pulled low simultaneously, which may cause an error in the driving signal transmitted to the first switch transistor in the bridge arm. In the application, in order to avoid the situation that the first NMOS transistor N1 and the second NMOS transistor N2 are turned on simultaneously and signal failure occurs, a third NMOS transistor N3 and a fourth NMOS transistor N4 are designed, that is, when the first NMOS transistor N1 and the second NMOS transistor N2 are turned on simultaneously, the third NMOS transistor N3 and the fourth NMOS transistor N4 are turned off simultaneously, that is, turned off, and signals on two sides are prevented from being pulled down simultaneously.

When the circuit works normally, only one of N1 and N2 is conducted, when N1 is conducted, N3 is conducted, a path is formed on the left side, and signals are transmitted to the second high-voltage area from the first high-voltage area.

In addition, in order to reset the parasitic capacitance, the fifth NMOS transistor N5 and the sixth NMOS transistor N6 are designed, and since the parasitic capacitance exists at the interface between L1 and L2, which affects the potential recovery speed of the sources of the third NMOS transistor N3 and the fourth NMOS transistor N4, the potential reset of the fifth NMOS transistor N5 and the sixth NMOS transistor N6 can be accelerated.

Since both fig. 8 and fig. 9 are mirror circuits, the operation timing of each MOS transistor will be described by taking the left circuit in fig. 9 as an example.

When N1 is turned on and N3 is turned on, the resistor on the left side is pulled low, the signal is effectively established, and when the resistor is pulled down, P1 is turned on. Since the driving pulse of N1 is a relatively narrow pulse, N1 turns off from on, and N3 continues to be on but not turned off, P1 continues to be on, which causes N5 to be on, N5 turns on, which causes the source of N3 to reset, and N3 turns off from on.

In addition, in order to avoid the signal transmission delay problem possibly caused by the added MOS transistor, the size of the third NMOS transistor N3 may be made larger than that of the fifth NMOS transistor N5; the size of the fourth NMOS transistor N4 is larger than the size of the sixth NMOS transistor N6. The reason why the sizes of N3 and N4 are larger than those of N5 and N6 is to ensure that more current flows into the load resistance side and to reduce the signal transmission delay.

Drive circuit embodiment

Based on the driving circuit of the bridge arm switching tube provided by the above embodiment, the driving circuit is used for driving the switching tube of the bridge arm, and in addition, the embodiment of the application also provides a driving circuit of the switching tube, which can drive any switching tube needing to be driven, and is described in detail below with reference to the attached drawings.

Referring to fig. 10, the figure is a schematic diagram of a driving circuit of a switching tube according to an embodiment of the present application.

It should be understood that one driving circuit may drive a plurality of switching tubes, and may also drive one switching tube, and the embodiment of the present application is not particularly limited, and the application of the driven switching tube is not particularly limited, and may be any switching tube that needs to be driven, but the voltage of the switching tube connection is higher, and therefore, a plurality of different voltage domains exist in the driving circuit.

The following description will take the driving circuit to drive the upper switch tube, i.e. the first switch tube, of the bridge arm circuit as an example. Because the voltage of the upper switch tube connection of the bridge arm circuit is high, and the switch state of the switch tube can influence the voltage fluctuation of the midpoint of the bridge arm, in order to suppress the influence of the voltage fluctuation and in order to enable the P-type semiconductor devices of different voltage domains in the driving circuit to have different body potentials, namely different bodies, and N wells isolated from each other, the driving circuit provided by the embodiment of the application comprises a plurality of isolation rings to isolate a plurality of voltage areas, and the different voltage areas can be used for placing the P-type semiconductor devices corresponding to the body potentials.

The driving circuit of the bridge arm switching tube provided by the embodiment of the application is used for outputting a driving signal to the grid electrode of the switching tube so as to control the switching state of the switching tube.

The driving circuit comprises at least two high-voltage areas separated by at least two isolating rings: a first high voltage region 11 and a second high voltage region 12; as shown in fig. 10, taking two isolation rings as an example, the first isolation ring 31 isolates the first high-voltage region 11, and the second isolation ring 32 isolates the second high-voltage region 12. The first high-voltage area corresponds to a first voltage domain, the second high-voltage area corresponds to a second voltage domain, and the voltage of the first voltage domain is different from that of the second voltage domain;

the first high voltage region 11 is used for arranging a P-type semiconductor device of a first voltage domain in the driving circuit, the second high voltage region 12 is used for arranging a P-type semiconductor device of a second voltage domain in the driving circuit, namely the first high voltage region 11 is used for arranging the P-type semiconductor device of the first voltage domain, and the second high voltage region 12 is used for arranging the P-type semiconductor device of the second voltage domain.

The drive circuit that this application embodiment provided sets up two at least different isolating rings in high-voltage area, forms two at least high-voltage areas, and every high-voltage area corresponds a voltage domain, forms a plurality of voltage domains of keeping apart mutually promptly, and every voltage domain sets up corresponding PMOS, can realize keeping apart mutually between the PMOS of different voltage domains like this, makes the PMOS of different voltage domains have different body potentials to avoid the PMOS of different voltage domains to interfere with each other. Due to the adoption of the driving circuit provided by the embodiment of the application, the requirements that the PMOS in different voltage domains have different body potentials can be met without changing the flow of the conventional semiconductor process, so that the PMOS in different voltage domains have mutually isolated N wells, and the requirements that the PMOS in different voltage domains have different body potentials can be quickly solved by the mode. Moreover, the isolation rings can be manufactured at the same time, and the high-voltage areas can be formed at the same time without adding extra semiconductor process flows.

In addition, since the driving circuit provided by the embodiment of the application includes two high-voltage areas which are isolated from each other, and electric energy transmission and driving signal transmission need to be performed between the high-voltage areas, bonding wires are needed to connect different high-voltage areas. Referring to fig. 11, a schematic diagram of another driving circuit provided in the embodiment of the present application is shown.

The drive circuit that this application embodiment provided still includes: a bonding wire 501; bond wire 501 is routed directly between the pad of the first high voltage region and the pad of the second high voltage region.

The bonding wire 501 is used to transmit the first high voltage region 11 electric energy to the second high voltage region 12, and also to transmit the driving signal from the first high voltage region 11 to the second high voltage region 12. For the transmission of the driving signal and the electric energy, reference may be made to the description of the above driving circuit embodiment, and details are not repeated here.

In fig. 11, the first high voltage region 11 and the second high voltage region 12 directly transmit the power and the driving signal through the bonding wire 501, and in addition, in another implementation, the transmission of the power and the driving signal between the first high voltage region 11 and the second high voltage region 12 can be realized by combining the package PIN and the bonding wire, which will be described in detail in conjunction with the attached drawings.

Referring to fig. 12, the figure is a schematic diagram of another driving circuit provided in the embodiment of the present application.

The bonding wire 501 included in the driving circuit provided in the embodiment of the present application is used to transmit electric energy and a driving signal between the first high voltage region 11 and the second high voltage region 12, specifically, the first high voltage region 11 is connected to the package PIN through the bonding wire 501, and the second high voltage region 12 is connected to the package PIN through the bonding wire 501, so as to interconnect the first high voltage region 11 and the second high voltage region 12. Namely, the pad of the first high voltage area 11 is connected with the package pin of the driving circuit through the bonding wire 501, and the pad of the second high voltage area 12 is connected with the package pin of the driving circuit through the bonding wire 501, so that the electric energy transmission and the driving signal transmission are realized between the first high voltage area 11 and the second high voltage area 12.

In addition, the drive circuit that this application embodiment provided still includes: a voltage conversion circuit (not shown in the figure);

the voltage conversion circuit is positioned in the first high-voltage area and used for converting the voltage of the first voltage domain into the voltage of the second voltage domain; the bonding wire is used for connecting the output voltage of the voltage conversion circuit to the second high-voltage area. One possible implementation of the voltage conversion circuit may be, for example, a linear voltage regulator circuit, which can implement both voltage reduction and voltage regulation functions.

In addition, in order to suppress the common mode signal between different high voltage regions, the driving circuit provided in the embodiment of the present application may also include the common mode suppression circuit introduced in fig. 8, and details thereof are not repeated herein.

In addition, the driving circuit provided in the above embodiments of the present application may be manufactured in the form of a device, for example, a chip, or may be used as a circuit, and the specific form of the product is not specifically limited in the embodiments of the present application.

Power converter embodiments

Based on the driving circuit of the bridge arm switching tube and the driving circuit provided by the above embodiments, the embodiments of the present application further provide a power converter, which is described in detail below with reference to the accompanying drawings.

Referring to fig. 13, a schematic diagram of a power converter according to an embodiment of the present application is shown.

The power converter provided by the embodiment of the application comprises: at least one half-bridge arm and the driving circuit of at least one bridge arm switching tube described in the above embodiments or the at least one driving circuit described in the above embodiments.

The half-bridge arm comprises a first switch tube Q1 and a second switch tube Q2;

a first end of the first switch tube Q1 is connected to the power source VIN, a second end of the first switch tube Q1 is connected to a first end of the second switch tube Q2, and a second end of the second switch tube W2 is grounded;

the driving circuit 1000 is used for driving the switching states of the first switching tube Q1 and the second switching tube Q2;

the power converter is configured to transform the power source VIN and output the transformed power source VIN, that is, the second end of the first switching tube Q1 is an output end of the power converter, that is, VOUT.

The power converter provided by the embodiment of the application comprises the driving circuit, at least two isolating rings are arranged in a high-voltage area, namely a part of the driving circuit corresponding to the first switching tube, so that at least two high-voltage areas are isolated, and the P-type semiconductor devices are arranged in different high-voltage areas according to the voltage areas corresponding to the P-type semiconductor devices, so that the P-type semiconductor devices in different voltage areas have different body potentials, and the P-type semiconductor devices in different voltage areas are prevented from mutually influencing and interfering. The driving circuit or the driving circuit in the embodiment of the application can avoid mutual interference among the P-type semiconductor devices, so that an accurate driving signal can be output to drive the switching state of the first switching tube, and the power converter can better perform electric energy conversion.

The power converter may be a dc-to-dc converter, a dc-to-ac converter, or an ac-to-dc converter, and the application is not limited to a specific type of power converter. Furthermore, the power converter may comprise one leg, i.e. a half-bridge power converter; two legs, i.e. a full bridge power converter, may also be included.

The embodiment of the present application does not specifically limit the application scenario of the power converter, and for example, the power converter may be applied to a photovoltaic power generation system, and may also be applied to the field of a secondary power source, for example, the power converter is included in an air conditioner power supply system of a data center. In addition, the present invention may also be applied to a system for supplying power to a communication base station, and is not illustrated here.

It should be understood that in the present application, "at least one" means one or more, "a plurality" means two or more. "and/or" for describing an association relationship of associated objects, indicating that there may be three relationships, e.g., "a and/or B" may indicate: only A, only B and both A and B are present, wherein A and B may be singular or plural. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship. "at least one of the following" or similar expressions refer to any combination of these items, including any combination of single item(s) or plural items. For example, at least one (one) of a, b, or c, may represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", wherein a, b, c may be single or plural.

The foregoing is merely a preferred embodiment of the present application and is not intended to limit the present application in any way. Although the present application has been described with reference to the preferred embodiments, it is not intended to limit the present application. Those skilled in the art can now make numerous possible variations and modifications to the disclosed embodiments, or modify equivalent embodiments, using the methods and techniques disclosed above, without departing from the scope of the claimed embodiments. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present application still fall within the protection scope of the technical solution of the present application without departing from the content of the technical solution of the present application.