阅读说明：本技术 防止复位状态下掉电的供电电路及柔性键盘 (Power supply circuit for preventing power failure in reset state and flexible keyboard ) 是由 樊俊锟 于 2021-07-14 设计创作，主要内容包括：本发明公开了一种防止复位状态下掉电的供电电路及柔性键盘,用于输出电源控制信号至MCU模块的IO口,包括：第一检测模块,所述第一检测模块具有接收复位信号的第一输入端和输出第一控制信号的第一输出端；第一开关模块,所述第一开关模块具有接收第一工作电压的第二输入端、输出第一工作电压的第二输出端和接收所述第一控制信号后使所述第二输入端与所述第二输出端导通的第三输入端；其中,所述第一开关模块的第二输出端所输出的第一工作电压促使所述电源控制信号为高电平。本发明可以应用于大多数的消费类电子产品中,可以防止消费类电子产品MCU在复位时掉电的问题,降低产品出现异常掉电状况的风险。(The invention discloses a power supply circuit and a flexible keyboard for preventing power failure in a reset state, which are used for outputting a power supply control signal to an IO port of an MCU module, and comprise: a first detection module having a first input terminal to receive a reset signal and a first output terminal to output a first control signal; the first switch module is provided with a second input end for receiving a first working voltage, a second output end for outputting the first working voltage and a third input end for conducting the second input end and the second output end after receiving the first control signal; the first working voltage output by the second output end of the first switch module enables the power supply control signal to be at a high level. The invention can be applied to most of consumer electronic products, can prevent the power failure problem of the MCU of the consumer electronic products during resetting, and reduces the risk of abnormal power failure of the products.)

1. The utility model provides a prevent power supply circuit that falls under reset state for the IO mouth of output power control signal to MCU module, its characterized in that includes:

a first detection module having a first input terminal to receive a reset signal and a first output terminal to output a first control signal;

the first switch module is provided with a second input end for receiving a first working voltage, a second output end for outputting the first working voltage and a third input end for conducting the second input end and the second output end after receiving the first control signal;

the first working voltage output by the second output end of the first switch module enables the power supply control signal to be at a high level.

2. The power supply circuit for preventing power down in a reset state according to claim 1, wherein the reset signal is a signal output by the reset module after receiving a reset operation.

3. The power supply circuit for preventing power down in a reset state of claim 1, wherein the first detection module comprises:

one end of the first resistor is used for receiving the reset signal;

and one end of the second resistor is connected with the other end of the first resistor and the second input end of the first switch module, and the other end of the second resistor is connected with a working voltage power supply module which outputs the first working voltage and the second input end of the first switch module.

4. The power supply circuit for preventing power down in a reset state of claim 3, wherein the first switching module comprises a first PNP transistor;

the base of the first PNP type triode is connected with the other end of the first resistor and one end of the second resistor, the emitting electrode of the first PNP type triode is connected with the other end of the second resistor and the working voltage power supply module, and the collecting electrode of the first PNP type triode outputs a first working voltage.

5. The power supply circuit for preventing power failure in a reset state according to claim 1, wherein the second output terminal of the first switch module is simultaneously connected to the IO ports of the self-locking module and the MCU module through a third resistor.

6. The power supply circuit for preventing power down in a reset state according to claim 5, wherein one end of the third resistor is connected to a collector of the first PNP type triode, the other end of the third resistor is simultaneously connected to an input terminal of a filter module and one end of a fourth resistor, an output terminal of the filter module is connected to the self-locking module, and the other end of the fourth resistor is connected to an IO port of the MCU module.

7. The power supply circuit for preventing power down in a reset state according to claim 5, wherein the self-locking module comprises a first NPN type triode and a first P channel enhancement type MOS tube;

the emitting electrode of the first NPN type triode is grounded, the collecting electrode of the first NPN type triode is simultaneously connected with the first power supply end of the battery, the source electrode of the first P channel enhancement type MOS tube and the grid electrode of the first P channel enhancement type MOS tube, and the drain electrode of the first P channel enhancement type MOS tube is connected with the second power supply end of the battery.

8. The power supply circuit for preventing power failure in a reset state according to claim 7, wherein a drain of the first P-channel enhancement type MOS transistor is simultaneously connected to one end of a fifth resistor and one end of a first inductance coil, the other end of the first inductance coil is simultaneously connected to a second power supply end of a battery and one end of a sixth resistor, and the other end of the sixth resistor is connected to the other end of the fourth resistor and an IO port of the MCU module.

9. The power supply circuit for preventing power down in a reset state according to claim 7, further comprising a USB charging module for supplying power to the first power terminal of the battery and the second power terminal of the battery.

10. A flexible keyboard comprising a power supply circuit as claimed in any one of claims 1 to 9 for preventing power loss in a reset state.

Technical Field

The invention relates to the technical field of internal circuits of electronic equipment, in particular to a power supply circuit and a flexible keyboard for preventing power failure in a reset state.

Background

At present, most of the MCUs in electronic equipment have an external reset function, so that the MCUs can return to an initial normal working state by using external reset under the condition of abnormal work of the MCUs. However, in the case of resetting the whole chip of part of MCUs in the market, the IO ports are easy to simultaneously cause instantaneous power failure.

Such as the power supply circuit of fig. 1 applied to the inside of a consumer electronic product having a battery, the control signal HOLD of the power supply is output from the IO port, and the control part of the power supply is disabled under the condition that the IO port continues to be at a low level for a long time at the time of reset, thereby causing the power supply to be powered down (as shown in fig. 5, a represents a VDD voltage waveform and B represents a P00 voltage waveform). The above abnormal conditions occur more frequently in portable consumer electronics (because the portable consumer electronics are frequently driven by a key, that is, the number of times of reset operations is more).

It is therefore desirable to develop a power supply circuit that prevents power down in the reset state.

Disclosure of Invention

The invention mainly aims to provide a power supply circuit and a flexible keyboard for preventing power failure in a reset state, so as to solve the technical problem that power failure is easily caused when most of the existing electronic equipment is in a continuous low level for a long time based on an IO port when an external reset function is executed in the background art.

The first aspect of the present invention provides a power supply circuit for preventing power down in a reset state, configured to output a power control signal to an IO port of an MCU module, including:

a first detection module having a first input terminal to receive a reset signal and a first output terminal to output a first control signal;

the first switch module is provided with a second input end for receiving a first working voltage, a second output end for outputting the first working voltage and a third input end for conducting the second input end and the second output end after receiving the first control signal;

the first working voltage output by the second output end of the first switch module enables the power supply control signal to be at a high level.

The power supply circuit for preventing power failure in a reset state is provided by the first aspect of the invention; when the RST key is pressed down, a reset signal corresponding to the RST key is received through a first input end of the first detection module, then a first control signal is output to a third input end of the first switch module through a first output end of the first detection module, so that the working voltage can be output from a second output end of the first switch module, the output first working voltage can pull up the power supply control signal PWR-HOLD, namely the power supply control signal PWR-HOLD transmitted to an IO port of the MCU keeps high level, and the MCU is enabled not to be powered down. The power supply circuit based on the invention also has a self-locking module, and the power supply circuit with the self-locking function has the advantages of small occupied area, effectiveness, practicability, easy function expansion and wide application in portable consumer electronic products.

A second aspect of the invention provides a flexible keyboard comprising a power supply circuit as provided in the first aspect to prevent power down in a reset state; therefore, when the flexible keyboard is applied specifically, the power supply cannot be powered off when an external reset function is executed, the power supply electric quantity is prolonged when being used, and the user experience is improved.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments described in the present application, and other drawings can be obtained by those skilled in the art without creative efforts.

FIG. 1 is a schematic diagram of a prior art power supply circuit;

fig. 2 is a schematic block diagram of a power supply circuit for preventing power down in a reset state according to a first embodiment of the present invention;

fig. 3 is a schematic block diagram of a power supply circuit for preventing power down in a reset state according to a second embodiment of the present invention;

FIG. 4 is a schematic diagram illustrating a specific connection of the power supply circuit for preventing power down in a reset state according to the present invention;

FIG. 5 is a voltage waveform diagram of the power supply circuit of FIG. 1;

fig. 6 is a voltage waveform diagram of the power supply circuit for preventing power down in a reset state in a specific application.

The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.

Detailed Description

It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

It is noted that relative terms such as "first," "second," and the like may be used to describe various components, but these terms are not intended to limit the components. These terms are only used to distinguish one component from another component. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present invention. The term "and/or" refers to a combination of any one or more of the associated items and the descriptive items.

The power supply circuit for preventing power failure in the reset state is mainly applied to portable consumer electronics, and mainly solves the technical problem that power failure is easily caused due to the fact that an IO port is in a continuous low level for a long time when an external reset function is triggered in a key mode.

Referring to fig. 2, the power supply circuit for preventing power failure in a reset state according to the first embodiment of the present invention includes a reset module 10, a working voltage supply module 30, and a first detection module 20 and a first switch module 40 connected to each other. The reset module 10 is electrically connected to the first detection module 20, the first detection module 20 is electrically connected to the first switch module 40, and the first switch module 40 is electrically connected to the operating voltage power supply module 30. Specifically, the RESET module 10 is configured to provide a RESET signal BT _ RESET to the power supply circuit, and after the first input end of the first detection module 20 receives the RESET signal BT _ RESET provided by the RESET module 10, the first output end of the first detection module 20 outputs a first control signal and transmits the first control signal to the first switch module 40. The third input end of the first switch module 40 is configured to control the second input end of the first switch module 40 to be conducted with the second output end of the first switch module 40 after receiving the first control signal. In this way, the first operating voltage VCC _3V3 provided by the operating voltage supply module 30 enters from the second input terminal of the first switch module 40 and is output to the MCU module 50 from the second output terminal of the first switch module 40. That is, the first operating voltage VCC _3V3 forces the power control signal PWR-HOLD to be at a high level (pulls up) after being output from the second output terminal of the first switching module 40, i.e., the power control signal PWR-HOLD is at a high level during the execution of the reset operation; the power control signal PWR-HOLD at the high level is thus transmitted to the IO port of the MCU module 50 so that the MCU module 50 is not powered down.

The RESET signal is a signal output by the RESET module 10 after receiving the RESET operation, for example, when the user triggers the RESET key, the RESET module 10 outputs the RESET signal BT _ RESET after receiving the RESET operation. The trigger switch key may be in the form of a touch, a press, etc., and the reset operation is generated by the user triggering the reset key.

Referring to fig. 4, fig. 4 is a specific connection schematic diagram of the power supply circuit for preventing power down in the reset state of the present invention, which discloses specific circuit connections in the first embodiment. The first detection module 20 includes a first resistor R18 and a second resistor R7 connected to each other, one end 181 of the first resistor R18 is connected to the reset module 10, the other end 182 of the first resistor R18 is connected to one end 71 of the second resistor R7 and the third input end of the first switch module 40, and the other end 72 of the second resistor R7 is connected to the second input ends of the operating voltage supply module 30 and the first switch module 40. One end 181 of the first resistor R18 is used to detect the RESET signal BT _ RESET transmitted by the RESET module 10. When the first end 181 of the first resistor R18 detects the RESET signal BT _ RESET, the other end 182 of the first resistor R18 outputs a first control signal, which reaches the third input end of the first switch module 40 to make the first switch module 40 in a conducting state. The second resistor R7 functions to prevent the first operating voltage VCC _3V3 from being directly transmitted to the third input terminal of the first switch module.

In one embodiment, the first switch module 40 is a transistor. Specifically, the first switch module 40 is a first PNP transistor Q11, a base of the first PNP transistor Q11 is used as a third input terminal of the first switch module 40 and is simultaneously connected to the other end 182 of the first resistor R18 and one end 71 of the second resistor R7, and an emitter of the first PNP transistor Q11 is used as a second input terminal of the first switch module 40 and is simultaneously connected to the other end 72 of the second resistor R7 and the working voltage power supply module 30. The collector of the first PNP transistor Q11 is used as the second output terminal of the first switching module 40 to output the first operating voltage. Based on the first switch module 40 selecting the first PNP transistor Q11, the third input terminal of the first switch module 40 is the base of the first PNP transistor Q11 to receive the first control signal. Specifically, when the first end 181 of the first resistor R18 detects the RESET signal BT _ RESET, and the first control signal output by the other end 182 of the first resistor R18 is at a high level, the base of the first PNP transistor Q11 receives the high level, so that the first PNP transistor Q11 is in a conducting state, and the first operating voltage VCC _3V3 can pass through the first PNP transistor Q11.

It should be noted that the first operating voltage VCC _3V3 is a voltage drop (related to the first PNP transistor Q11) when entering from the emitter of the first PNP transistor Q11 and outputting from the collector of the first PNP transistor Q11, and therefore the "first operating voltage VCC _3V 3" described in this application is not specifically a voltage signal with the same voltage magnitude. For example, the first operating voltage VCC _3V3 of 6V is 5.4V after passing through the first PNP transistor Q11.

Referring to fig. 3, fig. 3 is a schematic block diagram of a power supply circuit for preventing power down in a reset state according to a second embodiment of the present invention. The second embodiment further includes an auto-lock module 90, a battery 60, a back electromotive force boot module 70, a USB charging module 80, and a filtering module 100 based on the first embodiment. The output end of the USB charging module 80 is connected to the input end of the battery 60, and the output end of the battery 60 is connected to the input end of the back electromotive force startup module 70 and the input end of the self-locking module 90. The filtering module 100 is connected between the input end of the self-locking module 90 and the second output end of the first switching module 40, the output end of the back electromotive force starting module 70 is connected with the MCU module 50, and the output end of the self-locking module 100 is connected with the MCU module 50. In the second embodiment, based on the self-locking module 90 being able to realize the self-locking function of the MCU module 50, and the back electromotive force starting module 70 providing the back electromotive force starting function, the filtering module 100 performs filtering processing on the first working voltage VCC _3V3, so as to transmit the filtered first working voltage VCC _3V3 to the self-locking module 90.

In one embodiment, a protection module 110 for protecting the USB charging module 80 and the self-locking module 90 is further included, and the protection module 110 can prevent the transient voltage overshoot.

In an embodiment, an external power-on module 120 is further included for driving the MCU module 50, and when the external signal is present, the MCU module 50 receives the power control signal PWR-HOLD at a high level to power on the product.

Referring again to fig. 4, a schematic diagram of specific circuit connections in a second embodiment is disclosed. A second output terminal of the first switch module 40 is simultaneously connected to the self-locking module 90 and the IO port of the MCU module 50 through a third resistor R24. When the first switch module 40 is a first PNP transistor Q11, one end 242 of the third resistor R24 is connected to the collector of the first PNP transistor Q11, the other end 241 of the third resistor R24 is simultaneously connected to the input end of the filter module 100 and one end 11 of the fourth resistor R1, the output end of the filter module 100 is connected to the self-locking module 90, and the other end 12 of the fourth resistor R1 is connected to the IO port of the MCU module 50. Therefore, the third resistor R24 can perform a first voltage division process on the first operating voltage VCC _3V3, so that the first operating voltage VCC _3V3 after the first voltage division process is respectively transmitted to the filtering module 100 for filtering process; and the first working voltage VCC _3V3 after the first voltage division process is subjected to the second voltage division process by the fourth resistor R1 to pull up the power control signal PWR-HOLD (which is easily at a low level due to the reset operation performed outside the MCU module 50), that is, the first working voltage is merged with the power control signal PWR-HOLD after passing through the third resistor R24 and the fourth resistor R1, so that the power control signal PWR-HOLD at the low level is converted to a high level, and it is ensured that the power control signal PWR-HOLD at the high level enters the IO port of the MCU module 50, and the MCU module 50 is not powered down.

In an embodiment, the filtering module 100 includes a third capacitor C22 and a seventh resistor R2 connected in parallel, one end 21 of the seventh resistor R2 is connected to one end 11 of the fourth resistor R1, the other end 241 of the third resistor R24, one end 221 of the third capacitor C22 and the self-locking module 90, the other end 22 of the seventh resistor R2 is connected to the other end 222 of the third capacitor C22, and the filtering module 100 performs a filtering process on the first working voltage subjected to the first voltage division process through the third capacitor C22 and the seventh resistor R2 connected in parallel, so as to transmit the first working voltage VCC _3V3 subjected to the filtering process to the self-locking module 90.

In one embodiment, self-locking module 90 includes a first NPN transistor Q2 and a first P-channel enhancement MOS transistor Q3. The emitter of the first NPN transistor Q2 is grounded, the collector of the first NPN transistor Q2 is connected to the first power supply terminal VBAT _ IN of the battery 60, the source of the first P-channel enhancement type MOS transistor Q3, and the gate of the first P-channel enhancement type MOS transistor Q3, and the drain of the first P-channel enhancement type MOS transistor Q3 is connected to the second power supply terminal VBAT of the battery 60. Specifically, the method comprises the following steps: after the reset key is triggered, the MCU module 50 is powered on to enter a working mode, at the moment of triggering the reset key, the gate of the first P-channel enhancement type MOS transistor Q3 is grounded, the drain and the source of the first P-channel enhancement type MOS transistor Q3 are conducted, the MCU module 50 is powered on to rapidly enter the working mode, the IO port of the MCU module 50 outputs a high level to the base of the first NPN type triode Q2, the collector and the emitter of the first NPN type triode Q2 are conducted, the grounded state of the first P-channel enhancement type MOS transistor Q3 is maintained, so that the first P-channel enhancement type MOS transistor Q3 is continuously conducted to form self-locking.

In one embodiment, the back emf starting-up module 70 includes a first inductor FB4 and a fifth resistor R28. The drain of the first P-channel enhancement type MOS transistor Q3 is connected to one end 282 of the fifth resistor R28 and one end 41 of the first inductor FB4, the other end 42 of the first inductor FB4 is connected to the second power supply terminal VBAT of the battery 60 and one end 271 of the sixth resistor R27, and the other end 272 of the sixth resistor R27 is connected to the other end 12 of the fourth resistor R1 and the IO port of the MCU module 50. Based on the above specific circuit definition, the back electromotive force power-on function is provided by the first inductive coil FB 4.

IN an embodiment, the USB charging module 80 includes a tenth resistor R53, an eleventh resistor R50, and a second NPN transistor Q10, one end 531 of the tenth resistor R53 is configured to receive the USB interface voltage VBUS, the other end 532 of the tenth resistor R53 is simultaneously connected to a base of the second NPN transistor Q10 and one end 501 of the eleventh resistor R50, the other end 502 of the eleventh resistor R50 is simultaneously connected to an emitter of the second NPN transistor Q10 and a ground, a collector of the second NPN transistor Q10 is simultaneously connected to one end 31 of the twelfth resistor R3, a gate of the first P-channel enhancement type MOS Q3 and a collector of the first NPN transistor Q2, and the other end 32 of the twelfth resistor R3 is simultaneously connected to the first power supply terminal VBAT _ IN of the battery 60, the other end 281 of the fifth resistor R28 and the source of the first P-channel enhancement type MOS Q3. Specifically, when the USB interface is plugged for charging, the USB interface voltage VBUS enters, the base of the second NPN transistor Q10 receives a high level, the emitter and the collector of the second NPN transistor Q10 are turned on, so that the gate of the first P-channel enhancement type MOS transistor Q3 is grounded, and the USB interface voltage VBUS is transmitted to the first power supply terminal VBAT _ IN of the battery 60 and the second power supply terminal VBAT of the battery 60. Therefore, the USB charging module 80 supplies power to the first power supply terminal VBAT _ IN of the battery 60 and the second power supply terminal VBAT of the battery 60.

In an embodiment, the protection module 110 includes a first diode D1, a thirty-fifth capacitor C35, and a second diode D2, a cathode of the first diode D1 is simultaneously connected to one end 351 of the thirty-fifth capacitor C35, a cathode of the second diode D2, and a KEY terminal KEY _ P, an anode of the second diode D2 is simultaneously connected to one end 211 of the twenty-first resistor R21 and the power-on terminal PWR _ INTN, another end 212 of the twenty-first resistor R21 is configured to receive the first operating voltage VCC _3V3 provided by the operating voltage supply module 30, and another end 352 of the thirty-fifth capacitor C35 is grounded. Specifically, when the KEY is activated, the KEY terminal KEY _ P generates a voltage change (the transient voltage is transmitted to the first diode D1 and the second diode D2 through the thirty-fifth capacitor C35), the thirty-fifth capacitor C35 plays a role in preventing transient voltage overshoot, and the first diode D1 and the second diode D2 form a double-diode structure to prevent voltage backflow, so that the KEY terminal KEY _ P does not damage a subsequent circuit when an abnormally high level is generated.

In one embodiment, the external boot module 120 includes a sixty-sixth resistor R66, a sixty-seventh resistor R67, a fifty-eighth resistor R58, and a second PNP transistor Q1. The base of the second PNP transistor Q1 is connected to one end 661 of the sixty-sixth resistor R66 and one end 581 of the fifty-eighth resistor R58, the emitter of the second PNP transistor Q1 is connected to the other end 662 of the sixty-sixth resistor R66 and the first power supply terminal VBAT _ IN of the battery 60, the collector of the second PNP transistor Q1 is connected to one end 671 of the sixty-seventh resistor R67, the other end of the sixty-seventh resistor R67 is connected to the other end 241 of the third resistor R24, one end 21 of the seventh resistor R2, one end 221 of the third capacitor C22, the base of the first PNP transistor Q2 and one end 11 of the fourth resistor R1, and the other end 582 of the fifty-eighth resistor R58 is connected to the external signal terminal CPOUT. Specifically, the external signal end CPOUT is connected to the voltage comparator, and when the flexible keyboard is pulled, a trigger signal is generated, which makes the output of the voltage comparator low, that is, the external signal end CPOUT receives a low level, the second PNP transistor Q1 is turned on, so that the power control signal PWR _ HOLD is high, and the CPU module 50 drives the product to start.

The third embodiment of the present invention also provides a flexible keyboard, which integrates the reset module 10, the operating voltage power supply module 30, the first detection module 20, the first switch module 40 and the MCU module 50 described in the first embodiment. On this basis for flexible keyboard when carrying out concrete application, can not lead to the power to lose power when carrying out the outside function that resets (as shown in fig. 6, A represents VDD voltage waveform, all does not have the power failure condition in the operation that resets many times), and the length of time of use of power electric quantity is prolonged correspondingly, improves user experience.

The fourth embodiment of the present invention further provides a flexible keyboard, which is integrated with the reset module 10, the operating voltage power supply module 30, the first detection module 20, the first switch module 40, the MCU module 50, the battery 60, the back electromotive force power-on module 70, the USB charging module 80, the self-locking module 90, the filtering module 100, the protection module 110, and the external power-on module 120 described in the second embodiment. When the flexible keyboard is used for specific application, the functions of self-locking, starting up by back electromotive force, protecting a rear-stage circuit, charging a USB and the like are integrated on the basis that the power supply cannot be powered down when an external reset function is executed.

The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.