阅读说明：本技术 一种对电路中线性电容计算电路节点电荷的方法 (Method for calculating circuit node charge of linear capacitor in circuit ) 是由 陶雄 周振亚 吴大可 程明厚 刘强 于 2021-07-21 设计创作，主要内容包括：一种对电路中线性电容计算电路节点电荷的方法,包括以下步骤：1)根据线性电容的端口位置建立第一电容矩阵；2)对第一电容矩阵进行去掉空行空列处理,获得第二电容矩阵；3)用电容值填充第二电容矩阵；4)利用第二电容矩阵计算电容电荷向量；5)计算总的电荷向量。本发明通过矩阵和向量的乘法得到线性电容的电荷向量,避免遍历每个线性电容,使计算能够得到加速。(A method of calculating a circuit node charge for a linear capacitance in a circuit, comprising the steps of: 1) establishing a first capacitance matrix according to the port position of the linear capacitor; 2) removing empty rows and empty columns from the first capacitor matrix to obtain a second capacitor matrix; 3) filling the second capacitance matrix with capacitance values; 4) calculating a capacitance charge vector using the second capacitance matrix; 5) the total charge vector is calculated. The invention obtains the charge vector of the linear capacitor by the multiplication of the matrix and the vector, avoids traversing each linear capacitor, and accelerates the calculation.)

1. A method of calculating a circuit node charge for a linear capacitance in a circuit, comprising the steps of:

1) establishing a first capacitance matrix according to the port position of the linear capacitor;

2) removing empty rows and empty columns from the first capacitor matrix to obtain a second capacitor matrix;

3) filling the second capacitance matrix with capacitance values;

4) calculating a capacitance charge vector using the second capacitance matrix;

5) the total charge vector is calculated.

2. The method for calculating the node charge of the circuit based on the linear capacitance in the circuit according to claim 1, wherein the step 1) utilizes a capacitance charge calculation formula to establish a first capacitance matrix, and the first capacitance matrix is a sparse matrix, has no structure change and is stored in a compression mode.

3. The method of claim 1, wherein said step 2) further comprises the steps of:

31) recording the row number and the column number of each element of the first capacitor matrix;

32) removing the empty rows and the empty columns to obtain a second capacitor matrix;

33) and recording the mapping relation of the row number and the column number of each element between the first capacitance matrix and the second capacitance matrix.

4. A method of calculating a circuit node charge for a linear capacitance in a circuit according to claim 3, wherein the first capacitance matrix and the second capacitance matrix are symmetric matrices.

5. The method of claim 3, wherein the step 4) further comprises the steps of:

51) calculating voltage values corresponding to each node in the second capacitance matrix to form a voltage vector;

52) and multiplying the second capacitance matrix by the voltage vector to obtain a second charge vector corresponding to each node of the second capacitance matrix.

6. The method of claim 5, wherein step 5) further comprises adding a second charge vector to each node according to a mapping between the first capacitance matrix and the second capacitance matrix, and superimposing the second charge vector with the charges of other devices to obtain a total node charge vector.

7. A method of calculating a node charge of a circuit for a linear capacitance in a circuit as claimed in claim 6, wherein the node charge of devices other than the linear capacitance is calculated by traversing the devices.

8. The method for calculating the node charge of the circuit for the linear capacitor in the circuit according to claim 1, wherein the step 1) to the step 3) are only performed once, and the step 4) to the step 5) can be repeated for a plurality of times according to the change of the voltage value when the node charge of the equation of the circuit for the linear capacitor in the circuit with the unchanged connection relation of the circuit structure is calculated.

9. An apparatus for calculating a circuit node charge for a linear capacitor in a circuit, comprising a memory and a processor, wherein the memory stores a program running on the processor, and the processor executes the program to perform the steps of the method for calculating a circuit node charge for a linear capacitor in a circuit according to any one of claims 1 to 8.

10. A computer readable storage medium having stored thereon computer instructions, which when executed perform the steps of the method of calculating a circuit node charge for a linear capacitance in a circuit of any of claims 1-8.

Technical Field

The invention relates to the technical field of analog circuit numerical simulation, in particular to a method for calculating circuit node charges of a linear capacitor in a circuit.

Background

The current in the circuit follows kirchhoff's current law (KCL equation), i.e. the sum of the total currents of all branches connected by any node is zero. In the simulation process of SPICE precision of the circuit, the sum of the currents of all the branches connected to the same node needs to be calculated and used as a right-end term of a circuit equation, and the state of the circuit is iterated in the direction meeting the kirchhoff current law by solving the equation. Calculating the node current is therefore an important part of the overall simulation process. The derivative of the node charge with respect to time is also added as a current to the sum of the total current. In the specific calculation, the derivative of the charge is calculated according to different integration methods.

The general way to calculate the node charge is: and traversing all the devices, calculating port charges by the devices according to the circuit state, and adding the port charges to corresponding nodes. For the linear capacitor, the voltage difference can be simply multiplied by the capacitor to obtain the port charge. If each linear capacitor is traversed in the manner of ordinary device processing, access to the capacitor device will result in a large number of random memory accesses.

Thus, a method for efficiently calculating the charge of a linear capacitor node is needed.

Disclosure of Invention

In order to solve the defects of the prior art, the invention aims to provide a method for calculating the node charges of a circuit for linear capacitors in the circuit so as to improve the calculation efficiency of the node charges.

In order to achieve the above object, the present invention provides a method for calculating a circuit node charge for a linear capacitor in a circuit, comprising the steps of:

1) establishing a first capacitance matrix according to the port position of the linear capacitor;

2) removing empty rows and empty columns from the first capacitor matrix to obtain a second capacitor matrix;

3) filling the second capacitance matrix with capacitance values;

4) calculating a capacitance charge vector using the second capacitance matrix;

5) the total charge vector is calculated.

Further, in the step 1), a first capacitance matrix is established by using a capacitance charge calculation formula, the structure of the first capacitance matrix is a sparse matrix, the structure is not changed, and the first capacitance matrix is stored in a compression mode.

Further, the step 2) further comprises the following steps:

31) recording the row number and the column number of each element of the first capacitor matrix;

32) removing the empty rows and the empty columns to obtain a second capacitor matrix;

33) and recording the mapping relation of the row number and the column number of each element between the first capacitance matrix and the second capacitance matrix.

Further, the first capacitance matrix and the second capacitance matrix are symmetric matrices.

Further, the step 4) further comprises the following steps:

51) calculating voltage values corresponding to each node in the second capacitance matrix to form a voltage vector;

52) and multiplying the second capacitance matrix by the voltage vector to obtain a second charge vector corresponding to each node of the second capacitance matrix.

Further, the step 5) further includes adding the second charge vector to each node according to the mapping relationship between the first capacitance matrix and the second capacitance matrix, and then superimposing the second charge vector with the charges of other devices to obtain a total node charge vector.

Further, the node charges of devices other than the linear capacitance are calculated by traversing the devices.

Furthermore, when the equation node charges of the linear capacitors in the circuit with unchanged circuit structure connection relation are calculated, the steps 1) to 3) are only needed to be performed once, and the steps 4) to 5) can be repeated for multiple times according to the change of the voltage value.

In order to achieve the above object, the present invention further provides an apparatus for calculating a node charge of a circuit for a linear capacitor in a circuit, including a memory and a processor, where the memory stores a program running on the processor, and the processor executes the steps of the method for calculating a node charge of a circuit for a linear capacitor in a circuit when the processor runs the program.

To achieve the above object, the present invention also provides a computer readable storage medium having stored thereon computer instructions which, when executed, perform the steps of the above method of calculating a circuit node charge for a linear capacitance in a circuit.

Has the advantages that: the invention utilizes the characteristics that the connection relation of devices in the circuit can not change and the capacitance value of the linear capacitor is not changed, and the capacitance value of the linear capacitor is used for forming a fixed matrix. And then the port charges of the linear capacitors are calculated by multiplying the capacitor matrix and the voltage vector, so that the process of independently calculating the charges by traversing each capacitor is replaced. The remaining devices may be traversed to calculate node charges. The total charge can be obtained by combining all the charges. When matrix vector multiplication is carried out, only the upper triangular matrix or the lower triangular matrix can be multiplied and only corresponding elements are stored according to the symmetry of the linear capacitance matrix, so that the calculation efficiency is improved. The invention obtains the charge vector of the linear capacitor by the multiplication of the matrix and the vector, avoids traversing each linear capacitor, and accelerates the calculation.

Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.

Drawings

The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:

FIG. 1 is a flow chart of a method of calculating a circuit node charge for a linear capacitance in a circuit according to the present invention;

FIG. 2 is an exemplary circuit diagram according to an embodiment of the present invention;

FIG. 3 is a schematic diagram of an embodiment of filling a linear capacitor into a capacitor matrix;

FIG. 4 is a capacitance matrix obtained according to the circuit of FIG. 2, in which empty rows and columns are retained;

FIG. 5 is a diagram illustrating the correspondence between the row numbers of the overall matrix and the row numbers of the capacitor matrix, wherein-1 indicates no correspondence;

FIG. 6 is a diagram illustrating the correspondence between the row numbers of the capacitor matrix and the row numbers of the overall matrix;

FIG. 7 is a schematic diagram of the multiplication of the capacitance matrix (with the empty rows and columns removed) and the voltage vector obtained by the circuit of FIG. 2;

FIG. 8 is a schematic diagram of the resulting charge vector added to the node total charge vector.

Detailed Description

The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it will be understood that they are described herein for the purpose of illustration and explanation and not limitation.

Fig. 1 is a flow chart of a method for calculating a circuit node charge for a linear capacitor in a circuit according to the present invention, and the method for calculating a circuit node charge for a linear capacitor in a circuit according to the present invention will be described in detail with reference to fig. 1.

At step 11, an overall capacitance matrix is built based on the port positions of the linear capacitances.

In this step, all the linear capacitors are traversed, and a capacitance matrix is established according to the port positions of the linear capacitors.

Fig. 2 is an exemplary circuit diagram according to an embodiment of the present invention, in which node positions and linear capacitances have been labeled, wherein a total of 2 linear capacitances and 4 circuit nodes and one ground node are included. Establishing a capacitance matrix for the matrix in the circuit shown in fig. 2 first requires establishing a capacitance matrix for each capacitor separately. Fig. 3 is a schematic diagram of an implementation method for filling a linear capacitor with a capacitor in a capacitor matrix, wherein two ports of the linear capacitor are assumed to be numbered i and j, and a capacitance value is C. After analyzing the C1 capacitor in fig. 2, it can be known that the adjacent circuit nodes are node 2 and node 3, and according to kirchhoff's current law and a capacitance charge calculation formula, a capacitor matrix of the C1 capacitor can be determined according to the matrix shown in fig. 3, where the row number and the column number respectively correspond to the node number. Analysis of the capacitance of C2 shows that its neighboring node 4 and the ground node can determine that its capacitance matrix contains only one non-zero C2.

Each capacitor adds a non-zero element position in the capacitor matrix according to the description of fig. 3 (the sparse structure of the matrix is determined by all non-zero elements, and then a computer memory is applied to facilitate filling of the capacitors). Fig. 4 is the resulting capacitance matrix with capacitance data added to indicate the source of the non-zero elements. And finally, obtaining a capacitance matrix of all linear capacitances in the whole circuit according to the capacitance matrix of each node.

The built integral capacitance matrix structure is generally a sparse matrix, the structure is not changed, and a compression mode is adopted for storage.

At step 22, the entire capacitor matrix is processed to obtain a capacitor matrix with empty rows and columns removed.

In the step, the element positions in the whole capacitor matrix are marked, the whole capacitor matrix is traversed, empty rows and columns are removed, row numbers and column numbers are renumbered, and the mapping relation between the row numbers and the column numbers of the original matrix is recorded. Fig. 5 records the mapping of the entire matrix row numbers to the capacitor matrix row numbers, and fig. 6 records the mapping of the capacitor matrix row numbers to the entire matrix row numbers. The mapping of column numbers is consistent with row numbers.

In step 33, the capacitance matrix is populated with capacitance values.

In this step, all the linear capacitances are traversed and the capacitance values are added to the capacitance matrix. Since the capacitor matrix has removed empty rows and columns, the mapping in FIG. 5 is used to fill in the correct locations.

At step 44, the charge vector is calculated using the capacitance matrix.

In this step, the voltage vector of the original circuit is mapped to the voltage vector corresponding to the capacitance matrix, and the voltage vector is multiplied by the capacitance matrix to obtain the charge vector. Fig. 7 shows a calculation process.

When matrix vector multiplication is carried out, only the upper triangular matrix or the lower triangular matrix can be multiplied and only corresponding elements are stored according to the symmetry of the linear capacitance matrix, so that the calculation efficiency is improved.

At step 55, the total charge vector is calculated.

In this step, the mapping relationship in fig. 6 is used, and the charge vector calculated by using the capacitance matrix is added to the overall node charge, and then the charges of other devices are superimposed to obtain the total charge vector. FIG. 8 illustrates a merge practice in which node charges may be calculated by traversing the device for the other remaining devices.

In addition, when the equation node charge of the linear capacitance calculation circuit in the circuit with unchanged circuit structure connection relation is calculated, the steps 11 to 33 are only performed once, and the steps 44 to 55 can be repeated for multiple times according to the change of the voltage.

According to the characteristic that the structure and the value of the linear capacitance matrix are symmetrical, the invention improves the realization of the multiplication of the matrix and the vector and reduces the multiplication times and the storage space.

The invention also provides a device for calculating the node charges of the circuit for the linear capacitors in the circuit, which comprises a memory and a processor, wherein the memory is stored with a program running on the processor, and the processor executes the steps of the method for calculating the node charges of the circuit for the linear capacitors in the circuit when running the program.

The present invention further provides a computer-readable storage medium, on which computer instructions are stored, and when the computer instructions are executed, the steps of the method for calculating the node charges of the circuit for the linear capacitors in the circuit are performed, and the method for calculating the node charges of the circuit for the linear capacitors in the circuit is described in the foregoing description, and will not be described again.

Those of ordinary skill in the art will understand that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that changes may be made in the embodiments and/or equivalents thereof without departing from the spirit and scope of the invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.