Receiving and demodulating processing method of D8PSK signal

文档序号:22748 发布日期:2021-09-21 浏览:28次 中文

阅读说明:本技术 一种d8psk信号的接收解调处理方法 (Receiving and demodulating processing method of D8PSK signal ) 是由 李辉 赵建伟 王党卫 董加成 王超 于 2021-06-24 设计创作,主要内容包括:本发明公开了一种D8PSK信号的接收解调处理方法,包括信号预处理、数据同步、信道估计与均衡、数据解码等过程;信号预处理过程首先将输入信号进行数字下变频,混频到基带。然后进行数字滤波,剔除噪声信号,同时将数据进行抽取到低倍符号速率采样率。数据解码过程首先将均衡结束后的信号根据D8PSK信号映射格式进行解映射运算,将符号数据转为比特数据流。然后根据发送端的加扰特性进行比特解扰并根据编码格式进行信道译码,最后进行整帧数据的CRC校验,完成整个D8PSK信号的接收解调过程。本发明内容对于D8PSK信号接收解调的消息正确率高,且算法计算量小、资源利用率高、具有较强的工程应用性。(The invention discloses a receiving and demodulating method of a D8PSK signal, which comprises the processes of signal preprocessing, data synchronization, channel estimation and equalization, data decoding and the like; the signal preprocessing process first performs digital down-conversion on the input signal, mixing to baseband. Then digital filtering is carried out to eliminate noise signals, and data is extracted to a low-power symbol rate sampling rate. In the data decoding process, firstly, the signal after the equalization is finished is subjected to demapping operation according to the D8PSK signal mapping format, and the symbol data is converted into bit data stream. And then, carrying out bit descrambling according to the scrambling characteristic of the sending end, carrying out channel decoding according to the coding format, and finally carrying out CRC (cyclic redundancy check) of the whole frame of data to complete the receiving and demodulating process of the whole D8PSK signal. The invention has high message accuracy for receiving and demodulating D8PSK signals, small calculation amount of algorithm, high resource utilization rate and stronger engineering applicability.)

1. A receiving and demodulating method for D8PSK signal is characterized in that the method comprises the following steps:

(1) signal preprocessing;

in the signal preprocessing process, firstly, an input signal is subjected to digital down-conversion, frequency mixing is carried out to a baseband, then digital filtering is carried out, noise signals are eliminated, and meanwhile, data are extracted to a low-power symbol rate sampling rate;

(2) data synchronization;

in the data synchronization process, firstly, the over-sampling data after frequency mixing and filtering is subjected to differential demodulation for subsequent differential demapping operation and the adverse effect brought by the frequency offset of a receiving and transmitting end is directly eliminated to the maximum extent; carrying out frame arrival detection and timing fine synchronization on the differentially demodulated signals, and determining a timing fine synchronization starting point of a current received signal frame;

(3) channel estimation and equalization;

the channel estimation and equalization process performs channel equalization on the synchronized signals to eliminate intersymbol interference of the data signals;

(4) data decoding;

in the data decoding process, firstly, the equalized signal is subjected to demapping operation according to a D8PSK signal mapping format, symbol information is converted into a bit data stream, then bit descrambling is carried out according to scrambling characteristics of a sending end, then channel decoding is carried out according to a coding format, and finally CRC (cyclic redundancy check) of the whole frame of data is carried out, so that the whole receiving and demodulating process of the D8PSK signal is completed.

2. The method of claim 1 for receiving and demodulating D8PSK signals, wherein in the signal preprocessing:

the input intermediate frequency data has a sampling rate fsFrequency of the intermediate frequency signal being fIFLet a (n) be the input sample sequence, the mixing operation is as follows:

digital filtering and data extraction adopt CIC cascade comb filter of multiple extraction, because adopt the input signal of 10.5KHz symbol rate, reduce the data sampling rate to 210KHz after here extraction, this signal is still 20 times oversampling baseband signal, second stage filtering adopts linear phase low-pass filter, the digital domain cutoff frequency is:

3. the method of claim 1 for receiving and demodulating D8PSK signals, wherein in the data synchronization process:

differential demodulation firstly records a received signal sequence under 20 times of oversampling as r (n), and differential operation is as follows:

m(n)=r*(n-Q)r(n) (3);

the frame arrival detection adopts a sliding correlation method to carry out N of a leading Reference Signal (RS)RS16 points sequence asTaking the received signal sequence under Q times oversampling as m (n), taking the correlation coefficient of the received signal and the preamble sequence as a frame detection metric value, and taking the received signal sequence under the symbol rate with d as the start as:

taking the normalized correlation coefficient as a frame detection metric value:

performing sliding frame detection on the received signal under Q times of oversampling, if the metric value exceeds a given threshold GthIf so, the frame is considered to arrive;

after the frame arrival is detected, further utilizing sliding correlation to calculate timing fine synchronization, and in a time window after the frame detection metric value exceeds the threshold point, taking the time point of the maximum value of the sliding correlation as a timing fine synchronization point, namely:

4. the method of claim 1 for receiving and demodulating D8PSK signals, wherein in the channel estimation and equalization process:

in line-of-sight channels, where the channel is a scalar, the received signal vector corresponding to the RS signal is written as:the relationship between the received signal and the RS without considering the noise is as follows:

yRS=xRS·h (7);

based on this, the expression of channel estimation is expressed as:

and based on the channel estimation value, finishing scalar channel equalization operation on the subsequent data frame:

5. the method of claim 1 for receiving and demodulating D8PSK signals, wherein in the data decoding process:

the symbol information and bit difference mapping relationship is as follows:

the respective corresponding bit streams are:

[000,001,010,011,100,101,110,111] (11);

the demapping operation for each symbol is performed by finding the closest constellation point in a:

wherein a (i) represents each element of a;

the bit descrambling is carried out according to the Pseudo Noise (PN) scrambling characteristic of a transmitting end, and the polynomial of the adopted bit descrambling and the polynomial of the scrambled register are the same as that of the following:

1+x2+x15 (13);

the channel decoding is performed according to the coding format of the transmitting end, where the original polynomial adopted by the receiving end and the transmitting end is the same as:

P(x)=x8+x2+x+1 (14);

the coding format is composed of fixed-length Reed-Solomon (255, 249)28The method is implemented by the following steps of carrying out binary code by adopting a generating and decoding polynomial:

wherein a is the root of the original polynomial p (x);

and finally performing CRC on the data after channel decoding to confirm that no transmission error occurs in the data transmission process, wherein the adopted CRC generating and checking polynomial is as follows:

G(x)=x32+x25+x20+x14+x7+x2+x+1 (16);

and completing the receiving and demodulating process of the whole D8PSK signal through the CRC check of the whole frame of data.

Technical Field

The invention relates to a receiving and demodulating method of a D8PSK signal, belonging to the field of communication broadcasting.

Background

Global Navigation Satellite System (GNSS) based Local Area Augmentation Systems (LAAS) have been applied globally as GNSS terrestrial augmentation systems (GBAS). The GBAS location service provides differentially corrected horizontal position, speed and time information to support area navigation (RNAV) and monitoring operations in the terminal area. LAAS Data broadcasting is realized by very high frequency ground-to-air Data link (vdl) communication, and has become one of the most important communication realization modes of air-to-ground communication subnets of Aeronautical telecommunications networks (Aeronautical telecommunications networks). The spatial signal adopts a modulation mode of D8PSK (Differential elevation-Phase Shift keying. D8PSK). The D8PSK modulation combines binary data into characters, each of which consists of 3 consecutive binary bits. The modulation mode has short duration of the synchronous code element and high synchronization difficulty, and the existing coherent and noncoherent demodulation algorithms have poor suppression effects on frequency offset and noise, so that the message accuracy is low, the modulation mode is limited by high demodulation precision, calculation amount and resource consumption, and the modulation mode is not favorable for engineering realization.

Disclosure of Invention

The present invention is directed to a method for receiving and demodulating D8PSK signals, so as to solve the above technical problem.

In order to achieve the purpose, the invention adopts the following technical scheme:

a receiving and demodulating method for D8PSK signal is characterized in that the method comprises the following steps:

(1) signal preprocessing;

in the signal preprocessing process, firstly, an input signal is subjected to digital down-conversion, frequency mixing is carried out to a baseband, then digital filtering is carried out, noise signals are eliminated, and meanwhile, data are extracted to a low-power symbol rate sampling rate;

(2) data synchronization;

in the data synchronization process, firstly, the over-sampling data after the frequency mixing filtering is subjected to differential demodulation, so that on one hand, the subsequent differential demapping operation is facilitated, and on the other hand, the adverse effect brought by the frequency offset of a receiving and transmitting end can be directly eliminated to the maximum extent; carrying out frame arrival detection and timing fine synchronization on the differentially demodulated signals, and determining a timing fine synchronization starting point of a current received signal frame;

(3) channel estimation and equalization;

the channel estimation and equalization process performs channel equalization on the synchronized signals to eliminate intersymbol interference of the data signals;

(4) data decoding;

in the data decoding process, firstly, the equalized signal is subjected to demapping operation according to a D8PSK signal mapping format, symbol information is converted into a bit data stream, then bit descrambling is carried out according to scrambling characteristics of a sending end, then channel decoding is carried out according to a coding format, and finally CRC (cyclic redundancy check) of the whole frame of data is carried out, so that the whole receiving and demodulating process of the D8PSK signal is completed.

As a further scheme of the invention, in the signal preprocessing process:

the input intermediate frequency data has a sampling rate fsFrequency of the intermediate frequency signal being fIFLet a (n) be the input sample sequence, the mixing operation is as follows:

digital filtering and data extraction can adopt CIC cascade comb filter of multiple extraction, because of adopting the input signal of 10.5KHz symbol rate, reduce the data sampling rate to 210KHz after here extraction, the signal is still 20 times of oversampling baseband signal, the second stage filtering adopts linear phase low-pass filter, the digital domain cut-off frequency is:

as a further scheme of the present invention, in the data synchronization process:

differential demodulation firstly records a received signal sequence under 20 times of oversampling as r (n), and differential operation is as follows:

m(n)=r*(n-Q)r(n) (3);

the frame arrival detection adopts a sliding correlation method to carry out N of a leading Reference Signal (RS)RS16 points sequence asTaking the received signal sequence under Q times oversampling as m (n), taking the correlation coefficient of the received signal and the preamble sequence as a frame detection metric value, and taking the received signal sequence under the symbol rate with d as the start as:

taking the normalized correlation coefficient as a frame detection metric value:

performing sliding frame detection on the received signal under Q times of oversampling, if the metric value exceeds a given threshold GthIf so, the frame is considered to arrive;

and after the frame arrival is detected, further utilizing sliding correlation to calculate timing fine synchronization. In a time window after the frame detection metric value exceeds the threshold point, taking the time point of the maximum sliding correlation value as a timing fine synchronization point, namely:

as a further scheme of the present invention, in the channel estimation and equalization process:

in line-of-sight channels, where the channel is a scalar, the received signal vector corresponding to the RS signal is written as:without considering the noise, the relationship between the received signal and the RS is known as follows:

yRS=xRS·h (7);

based on this, the expression of channel estimation can be expressed as:

based on the channel estimate, scalar channel equalization operations on subsequent data frames may be completed:

as a further scheme of the present invention, in the data decoding process:

the symbol information and bit difference mapping relationship is as follows:

the respective corresponding bit streams are:

[000,001,010,011,100,101,110,111] (11);

the demapping operation for each symbol can be performed by finding the closest constellation point in a:

wherein a (i) represents each element of a;

the bit descrambling is performed according to the Pseudo Noise (PN) scrambling characteristic of the transmitting end, and the polynomial of the register used for bit descrambling and scrambling is the same as that:

1+x2+x15 (13);

the channel decoding is performed according to the coding format of the transmitting end, where the original polynomial adopted by the receiving end and the transmitting end is the same as:

P(x)=x8+x2+x+1 (14);

the coding format is composed of fixed-length Reed-Solomon (255, 249)28The binary code is completed, and the generating and decoding polynomials used here are:

wherein a is the root of the original polynomial p (x);

and finally performing CRC check on the data after channel decoding to confirm that no transmission error occurs in the data transmission process, wherein the CRC generating and checking polynomial adopted by the method is as follows:

G(x)=x32+x25+x20+x14+x7+x2+x+1 (16);

and completing the receiving and demodulating process of the whole D8PSK signal through the CRC check of the whole frame of data.

Compared with the prior art, the invention has the following advantages: the invention provides a method for receiving and demodulating D8PSK signals, which has the advantages of high message accuracy for receiving and demodulating the D8PSK signals, small algorithm calculation amount, high resource utilization rate and stronger engineering applicability.

Drawings

FIG. 1 is a flow chart of the method of the present invention;

FIG. 2 is a flow chart of the signal preprocessing process of the present invention;

FIG. 3 is a diagram of an algorithm implementation of the PN scrambler/descrambler of the present invention;

fig. 4 is a diagram of an implementation of the CRC check algorithm of the present invention.

Detailed Description

The invention is explained in further detail below with reference to the figures and the specific embodiments.

As shown in fig. 1, a method for receiving and demodulating D8PSK signals includes the following steps:

(1) signal preprocessing:

the signal preprocessing process first performs digital down-conversion on the input signal, mixing to baseband. The input intermediate frequency data has a sampling rate fsFrequency of the intermediate frequency signal being fIF. Let a (n) be the input sample sequence, the mixing operation is as follows:

after mixing, digital filtering and data extraction are carried out, noise signals are eliminated, and data are extracted to a low-power symbol rate sampling rate.

The digital filtering and data extraction can adopt CIC cascade comb filter with multiple extraction. Since the input signal is at a 10.5KHz symbol rate, the data sampling rate is reduced to 210KHz after decimation, which is still a 20 times oversampled baseband signal. The second stage of filtering adopts a linear phase low-pass filter, and the digital domain cut-off frequency is as follows:

the signal pre-processing procedure is shown in fig. 2.

(2) Data synchronization:

in the data synchronization process, firstly, the over-sampling data after the frequency mixing filtering is subjected to differential demodulation, so that on one hand, the subsequent differential demapping operation is facilitated, and on the other hand, the adverse effect brought by the frequency offset of the receiving and transmitting end can be directly eliminated to the maximum extent.

Differential demodulation first records the received signal sequence with Q20 times over-sampled as r (n). The difference operation is as follows:

m(n)=r*(n-Q)r(n) (3);

and carrying out frame arrival detection and timing fine synchronization on the differentially demodulated signals, and determining a timing fine synchronization starting point of the current received signal frame.

The frame arrival detection adopts a sliding correlation method. Preamble reference signalN of number (RS)RS16 points sequence asThe received signal sequence at Q-fold oversampling is denoted as m (n). And taking the correlation coefficient of the received signal and the preamble sequence as a frame detection metric value. Let the received signal sequence at the symbol rate starting with d be:

taking the normalized correlation coefficient as a frame detection metric value:

performing sliding frame detection on the received signal under Q times of oversampling, if the metric value exceeds a given threshold GthThen the frame is considered to have arrived.

And after the frame arrival is detected, further utilizing sliding correlation to calculate timing fine synchronization. In a time window after the frame detection metric value exceeds the threshold point, taking the time point of the maximum sliding correlation value as a timing fine synchronization point, namely:

(3) channel estimation and equalization:

the channel estimation and equalization process performs channel equalization on the synchronized signal to eliminate intersymbol interference of the data signal.

In line-of-sight channels, a channel is a scalar quantity. The received signal vector for the RS signal is written as:without considering the noise, the relationship between the received signal and the RS is known as follows:

yRS=xRS·h (7);

based on this, the expression of channel estimation can be expressed as:

based on the channel estimate, scalar channel equalization operations on subsequent data frames may be completed:

(4) and (3) data decoding:

in the data decoding process, firstly, the signal after the equalization is finished is subjected to demapping operation according to the D8PSK signal mapping format, and the symbol information is converted into a bit data stream.

The symbol information and bit difference mapping relationship is as follows:

the respective corresponding bit streams are:

[000,001,010,011,100,101,110,111] (11);

the demapping operation for each symbol can be performed by finding the closest constellation point in a:

wherein a (i) represents the i-th element of a.

And performing bit descrambling on the demapped data according to the scrambling characteristic of the sending end.

Bit descrambling is performed according to a Pseudo Noise (PN) scrambling characteristic of a transmitting end. The algorithm for implementing PN scrambler/descrambler is shown in fig. 3, where the polynomial of the bit descrambling and scrambled register is the same as:

1+x2+x15 (13);

and then, carrying out channel decoding according to the coding format, wherein the channel decoding is carried out according to the coding format of the sending end, and the original polynomial adopted by the receiving end and the sending end is the same as that adopted by the receiving end:

P(x)=x8+x2+x+1 (14);

this encoding format is accomplished by a fixed length Reed-Solomon (255, 249) 28-ary code, where the generating and decoding polynomials used are:

where a is the root of the original polynomial p (x).

And finally performing CRC (cyclic redundancy check) on the data subjected to channel decoding to confirm that no transmission error occurs in the data transmission process. The CRC check implementation algorithm is shown in fig. 4. The CRC generation and check polynomial employed is:

G(x)=x32+x25+x20+x14+x7+x2+x+1 (16);

and completing the receiving and demodulating process of the whole D8PSK signal through the CRC check of the whole frame of data. .

The foregoing is a preferred embodiment of the present invention, and it will be apparent to those skilled in the art that variations, modifications, substitutions and alterations can be made in the embodiment without departing from the principles and spirit of the invention.

11页详细技术资料下载
上一篇:一种医用注射器针头装配设备
下一篇:面向短突发通信的全数据收敛判决导向载波恢复方法

网友询问留言

已有0条留言

还没有人留言评论。精彩留言会获得点赞!

精彩留言,会给你点赞!

技术分类