阅读说明：本技术 显示基板和显示装置 (Display substrate and display device ) 是由 孙开鹏 黄炜赟 王彬艳 吴超 程羽雕 于 2020-06-30 设计创作，主要内容包括：本公开实施例还提供一种显示基板和显示装置。该显示基板包括：衬底基板和多个子像素。第一显示区的子像素的密度小于第二显示区的子像素的密度；多个子像素包括多个第一像素组和多个第二像素组,多个第一像素组位于第一显示区,多个第二像素组位于第二显示区,第一显示区包括多个子显示区和位于多个子显示区之间的子透光区,各第一像素组包括沿第一方向依次排列的第一子像素、第二子像素和第三子像素,各第二像素组包括沿第一方向排列的第一子像素、第二子像素对和第三子像素,第二子像素对包括沿第二方向排列的两个第二子像素。该显示基板可降低第一显示区的分辨率,并且增加第一像素组中第二子像素的使用寿命。(The embodiment of the disclosure also provides a display substrate and a display device. The display substrate includes: a substrate base plate and a plurality of sub-pixels. The density of the sub-pixels of the first display area is less than that of the sub-pixels of the second display area; the plurality of sub-pixels comprise a plurality of first pixel groups and a plurality of second pixel groups, the plurality of first pixel groups are located in the first display area, the plurality of second pixel groups are located in the second display area, the first display area comprises a plurality of sub-display areas and sub-light-transmitting areas located among the plurality of sub-display areas, each first pixel group comprises first sub-pixels, second sub-pixels and third sub-pixels which are sequentially arranged along a first direction, each second pixel group comprises first sub-pixels, second sub-pixel pairs and third sub-pixels which are arranged along the first direction, and each second sub-pixel pair comprises two second sub-pixels which are arranged along a second direction. The display substrate can reduce the resolution of the first display area and prolong the service life of the second sub-pixels in the first pixel group.)

1. A display substrate, comprising:

a substrate including a first display region and a second display region at least partially surrounding the first display region; and

a plurality of sub-pixels on the substrate and in the first and second display regions, the density of the sub-pixels of the first display region being less than the density of the sub-pixels of the second display region, each of the sub-pixels including a pixel circuit,

wherein the plurality of sub-pixels include a first sub-pixel, a second sub-pixel, and a third sub-pixel, the plurality of sub-pixels include a plurality of first pixel groups and a plurality of second pixel groups, the plurality of first pixel groups are located in the first display region, the plurality of second pixel groups are located in the second display region,

the first display area comprises a plurality of sub-display areas and sub-light-transmitting areas located among the sub-display areas, a plurality of first pixel groups are arranged in a one-to-one correspondence mode with the sub-display areas, each first pixel group comprises one first sub-pixel, one second sub-pixel and one third sub-pixel which are sequentially arranged along a first direction, each second pixel group comprises one first sub-pixel, one second sub-pixel pair and one third sub-pixel which are arranged along the first direction, and the second sub-pixel pair comprises two second sub-pixels which are arranged along a second direction.

2. The display substrate of claim 1, further comprising:

the plurality of first shading layers are arranged in one-to-one correspondence with the plurality of sub-display areas, and each first shading layer is positioned on one side, close to the substrate, of the corresponding first pixel group; and

and the second shading layer is positioned in the second display area and positioned on one side of the plurality of second pixel groups close to the substrate.

3. The display substrate according to claim 2, wherein each of the sub-pixels further comprises a power supply line extending in the second direction, the power supply line being connected to the pixel circuit and configured to apply a constant voltage to the pixel circuit,

the power line of at least one sub-pixel in each first pixel group is electrically connected with the corresponding first shading layer, and the power line of at least one sub-pixel in each second pixel group is electrically connected with the second shading layer.

4. The display substrate according to claim 3, wherein the power line of the first sub-pixel in each of the first pixel groups is electrically connected to the corresponding first light shielding layer, and the power lines of the first sub-pixel, the second sub-pixel and the third sub-pixel in each of the second pixel groups are electrically connected to the corresponding second light shielding layer.

5. The display substrate according to any one of claims 1 to 4, wherein each of the sub-display regions includes three unit regions in which the first sub-pixel, the second sub-pixel, and the third sub-pixel of the first pixel group are respectively disposed,

a first spacing region including one of the cell regions is provided between the first pixel groups adjacent in the first direction, a second spacing region including three of the cell regions provided in the first direction is provided between the first pixel groups adjacent in the second direction,

the sub light-transmitting region includes the first and second spaced regions.

6. The display substrate according to claim 5, wherein the power supply line of the second sub-pixel in each of the first pixel groups is connected to the power supply line of the second sub-pixel in the first pixel group adjacent in the second direction through the second spacing region,

the power supply line of the first sub-pixel and the power supply line of the third sub-pixel in each of the first pixel groups are disconnected from the power supply line of the first sub-pixel and the power supply line of the third sub-pixel in the first pixel group adjacent in the second direction.

7. The display substrate according to claim 5, wherein the pixel circuit of the sub-pixel in each of the first pixel groups includes a first initialization signal line, a first reset signal line, a gate line, an emission control line, a second initialization signal line, and a second reset signal line extending in the first direction,

in each of the first pixel groups, the first initialization signal line of the first sub-pixel, the first initialization signal line of the second sub-pixel, and the first initialization signal line of the third sub-pixel are connected,

in each of the first pixel groups, the first reset signal line of the first sub-pixel, the first reset signal line of the second sub-pixel, and the first reset signal line of the third sub-pixel are connected,

in each of the first pixel groups, the gate line of the first sub-pixel, the gate line of the second sub-pixel, and the gate line of the third sub-pixel are connected,

in each of the first pixel groups, the emission control line of the first sub-pixel, the emission control line of the second sub-pixel, and the emission control line of the third sub-pixel are connected,

in each of the first pixel groups, the second initialization signal line of the first sub-pixel, the second initialization signal line of the second sub-pixel, and the second initialization signal line of the third sub-pixel are connected,

in each of the first pixel groups, the second reset signal line of the first subpixel, the second reset signal line of the second subpixel, and the second reset signal line of the third subpixel are connected.

8. The display substrate according to claim 7, wherein the power line of the first sub-pixel in each of the first pixel groups is electrically connected to the corresponding first light-shielding layer through a first light-shielding layer via hole,

the power lines of the first sub-pixel, the second sub-pixel and the third sub-pixel in each second pixel group are respectively electrically connected with the second shading layer through the second shading layer via hole,

the orthographic projection of the first shading layer through hole on the substrate is located on one side, away from the emission signal line, of the second reset signal line.

9. The display substrate of claim 8, wherein one of the first pixel groups includes only one of the first light shield layer vias.

10. The display substrate of claim 8, wherein the pixel circuit of the first sub-pixel comprises:

a wiring region in which the first initialization signal line, the first reset signal line, the gate line, the emission control line, the second initialization signal line, and the second reset signal line are disposed; and

and the via hole area is positioned on one side of the wiring area close to the second spacing area, and the first light shielding layer via hole is arranged in the via hole area.

11. The display substrate according to claim 8, wherein the pixel circuit of the sub-pixel in each of the second pixel groups includes a first initialization signal line, a first reset signal line, a gate line, and an emission control line extending in the first direction,

the second initialization signal line of the first sub-pixel in the first pixel group and the extension line of the second reset signal line are located between the first emission control line of the first sub-pixel in the second pixel group of the same row and the first reset signal line of the first sub-pixel in the second pixel group of the next row.

12. The display substrate of claim 7,

the first initializing signal line of the third sub-pixel in each of the first pixel groups is connected to the first initializing signal line of the first sub-pixel in the first pixel group adjacent in the first direction through a first connecting line,

the first reset signal line of the third sub-pixel in each of the first pixel groups is connected to the first reset signal line of the first sub-pixel in the first pixel group adjacent in the first direction through a second connection line,

the gate line and the second reset signal line of the third subpixel in each of the first pixel groups are connected by a third connection line and are connected to the gate line and the second reset signal line of the first subpixel in the first pixel group adjacent in the first direction by the third connection line,

the emission control line of the third sub-pixel in each of the first pixel groups is connected to the emission control line of the first sub-pixel in the first pixel group adjacent in the first direction through a fourth connection line,

the second initialization signal line of the third sub-pixel in each of the first pixel groups is connected to the second initialization signal line of the first sub-pixel in the first pixel group adjacent in the first direction through a fifth connection line,

the first connecting line, the second connecting line, the third connecting line, the fourth connecting line and the fifth connecting line are gathered in the first interval area.

13. The display substrate according to claim 12, wherein the first connection line, the third connection line, and the fifth connection line are disposed at the same layer as the power supply line and at a different layer from the first initialization signal line, the gate line, and the second initialization signal line.

14. The display substrate according to claim 13, wherein the second connection line and the first reset signal line are disposed on a same layer and are integrally formed, and the fourth connection line and the emission control line are disposed on a same layer and are integrally formed.

15. The display substrate according to claim 13, wherein the first connection line, the second connection line, the third connection line, the fourth connection line, and the fifth connection line are sequentially arranged in the second direction.

16. The display substrate of claim 5, wherein the pixel circuit further comprises a data line extending along the second direction,

the data line of the first sub-pixel in each of the first pixel groups is connected to the data line of the first sub-pixel in the first pixel group adjacent in the second direction through a sixth connection line,

the data line of the second sub-pixel in each of the first pixel groups is connected to the data line of the second sub-pixel in the first pixel group adjacent in the second direction through a seventh connection line,

the data line of the third sub-pixel in each of the first pixel groups is connected to the data line of the third sub-pixel in the first pixel group adjacent in the second direction through an eighth connection line,

the sixth connecting line, the seventh connecting line and the eighth connecting line are gathered in the second spaced area.

17. The display substrate according to claim 16, wherein the sixth connection line and the first initialization signal line are disposed in the same layer and are disposed in a different layer from the data lines, the seventh connection line and the data lines are disposed in the same layer and are integrally formed, and the eighth connection line and the first reset signal line are disposed in the same layer and are disposed in a different layer from the data lines.

18. The display substrate according to claim 17, wherein the sixth connecting line, the eighth connecting line, and the seventh connecting line are sequentially arranged in the first direction.

19. The display substrate according to any one of claims 1 to 4, wherein the sub-transmissive region is not provided with the sub-pixel.

20. The display substrate of any of claims 1-4, wherein the first direction is substantially perpendicular to the second direction.

21. The display substrate of any of claims 1-4, wherein the first subpixel is configured to emit light of a first color, the second subpixel is configured to emit light of a second color, and the third subpixel is configured to emit light of a third color.

22. The display substrate of claim 21, wherein the first color is red, the second color is green, and the third color is blue.

23. A display device comprising the display substrate of any one of claims 1-22.

24. The display device according to claim 23, further comprising:

a photosensitive functional element positioned on one side of the plurality of sub-pixels close to the substrate base plate,

wherein, the orthographic projection of the photosensitive functional element on the substrate base plate is at least partially overlapped with the first display area.

Technical Field

The embodiment of the disclosure relates to a display substrate and a display device.

Background

With the continuous development of display technology, Organic Light Emitting Diode (OLED) display technology has been increasingly applied to various electronic products due to its advantages of self-luminescence, wide viewing angle, high contrast, low power consumption, high response speed, etc.

On the other hand, with the continuous development of the organic light emitting diode display technology, people have higher and higher requirements for the screen occupation ratio of electronic products. Therefore, a design in which some functional parts of an electronic product are disposed under a screen is a new research focus. For example, a camera of an electronic product may be disposed below a screen, i.e., an off-screen camera design.

Disclosure of Invention

The embodiment of the disclosure provides a display substrate and a display device. The display substrate includes: the display device comprises a substrate base plate, a first display area and a second display area, wherein the second display area at least partially surrounds the first display area; and a plurality of sub-pixels on the substrate and in the first and second display regions, the sub-pixels of the first display region having a density lower than that of the sub-pixels of the second display region, each sub-pixel including a pixel circuit, the plurality of sub-pixels including a first sub-pixel, a second sub-pixel and a third sub-pixel, the plurality of sub-pixels including a plurality of first pixel groups and a plurality of second pixel groups, the plurality of first pixel groups being in the first display region, the plurality of second pixel groups being in the second display region, the first display region including a plurality of sub-display regions and a sub-transmissive region between the plurality of sub-display regions, the plurality of first pixel groups being in one-to-one correspondence with the plurality of sub-display regions, each first pixel group including a first sub-pixel, a second sub-pixel and a third sub-pixel arranged in order along the first direction, each second pixel group including a first sub-pixel arranged along the first direction, A second sub-pixel pair including two second sub-pixels arranged in the second direction, and a third sub-pixel. The display substrate adopts a Real GRB pixel arrangement mode in a first display area and adopts a GGRB pixel arrangement mode in a second display area; on one hand, the display substrate can reduce the resolution of the first display area or PPI (Pixel Per Inc), thereby increasing the light transmittance of the first display area; on the other hand, the second display area of the display substrate has higher resolution and display effect. In addition, because the first display area adopts the pixel arrangement mode of Real GRB, the light-emitting area of the second sub-pixel in the first pixel group is larger, and therefore, the service life is longer.

At least one embodiment of the present disclosure provides a display substrate, including: a substrate including a first display region and a second display region at least partially surrounding the first display region; and a plurality of sub-pixels on the substrate and in the first and second display regions, wherein the sub-pixels of the first display region have a density less than that of the sub-pixels of the second display region, each of the sub-pixels includes a pixel circuit, the sub-pixels include a first sub-pixel, a second sub-pixel, and a third sub-pixel, the sub-pixels include a plurality of first pixel groups and a plurality of second pixel groups, the first pixel groups are located in the first display region, the second pixel groups are located in the second display region, the first display region includes a plurality of sub-display regions and a sub-transmissive region located between the sub-display regions, the first pixel groups are arranged in one-to-one correspondence with the sub-display regions, and each of the first pixel groups includes one of the first sub-pixels, and the first sub-pixels are sequentially arranged in a first direction, One of the second sub-pixels and one of the third sub-pixels, each of the second pixel groups includes one of the first sub-pixels, one of the second sub-pixel pairs, and one of the third sub-pixels arranged in the first direction, and the second sub-pixel pair includes two of the second sub-pixels arranged in the second direction.

For example, an embodiment of the present disclosure provides a display substrate further including: the plurality of first shading layers are arranged in one-to-one correspondence with the plurality of sub-display areas, and each first shading layer is positioned on one side, close to the substrate, of the corresponding first pixel group; and the second shading layer is positioned in the second display area and positioned on one side of the plurality of second pixel groups close to the substrate.

For example, in a display substrate provided in an embodiment of the present disclosure, each of the sub-pixels further includes a power line extending along the second direction, the power line is connected to the pixel circuit and configured to apply a constant voltage to the pixel circuit, the power line of at least one of the sub-pixels in each of the first pixel groups is electrically connected to the corresponding first light shielding layer, and the power line of at least one of the sub-pixels in each of the second pixel groups is electrically connected to the second light shielding layer.

For example, in a display substrate provided in an embodiment of the present disclosure, the power line of the first sub-pixel in each first pixel group is electrically connected to the corresponding first light shielding layer, and the power lines of the first sub-pixel, the second sub-pixel, and the third sub-pixel in each second pixel group are electrically connected to the corresponding second light shielding layer.

For example, in a display substrate provided in an embodiment of the present disclosure, each of the sub display regions includes three unit regions, the first sub pixel, the second sub pixel, and the third sub pixel in the first pixel group are respectively disposed in the three unit regions, a first spacing region is disposed between the first pixel groups adjacent to each other in the first direction, the first spacing region includes one unit region, a second spacing region is disposed between the first pixel groups adjacent to each other in the second direction, the second spacing region includes three unit regions disposed in the first direction, and the sub light-transmitting region includes the first spacing region and the second spacing region.

For example, in a display substrate provided in an embodiment of the present disclosure, the power line of the second sub-pixel in each first pixel group is connected to the power line of the second sub-pixel in the first pixel group adjacent to the second direction through the second spacing region, and the power line of the first sub-pixel and the power line of the third sub-pixel in each first pixel group are disconnected from the power line of the first sub-pixel and the power line of the third sub-pixel in the first pixel group adjacent to the second direction.

For example, in a display substrate provided in an embodiment of the present disclosure, the pixel circuit of the sub-pixel in each of the first pixel groups includes a first initialization signal line, a first reset signal line, a gate line, an emission control line, a second initialization signal line, and a second reset signal line extending in the first direction, the first initialization signal line of the first sub-pixel, the first initialization signal line of the second sub-pixel, and the first initialization signal line of the third sub-pixel in each of the first pixel groups are connected, the first reset signal line of the first sub-pixel, the first reset signal line of the second sub-pixel, and the first reset signal line of the third sub-pixel in each of the first pixel groups are connected, and the gate line of the first sub-pixel, the first reset signal line of the second sub-pixel, and the first reset signal line of the third sub-pixel in each of the first pixel groups are connected, The gate line of the second subpixel is connected to the gate line of the third subpixel, the emission control line of the first subpixel, the emission control line of the second subpixel, and the emission control line of the third subpixel are connected in each of the first pixel groups, the second initialization signal line of the first subpixel, the second initialization signal line of the second subpixel, and the second initialization signal line of the third subpixel are connected in each of the first pixel groups, and the second reset signal line of the first subpixel, the second reset signal line of the second subpixel, and the second reset signal line of the third subpixel are connected in each of the first pixel groups.

For example, in a display substrate provided in an embodiment of the present disclosure, the power line of the first sub-pixel in each first pixel group is electrically connected to the corresponding first light shielding layer through a first light shielding layer via, the power lines of the first sub-pixel, the second sub-pixel and the third sub-pixel in each second pixel group are electrically connected to the second light shielding layer through the second light shielding layer via, respectively, and an orthographic projection of the first light shielding layer via on the substrate is located on a side of the second reset signal line away from the emission signal line.

For example, in a display substrate provided in an embodiment of the present disclosure, one first pixel group includes only one first light shielding layer via hole.

For example, in a display substrate provided in an embodiment of the present disclosure, a pixel circuit of the first sub-pixel includes: a wiring region in which the first initialization signal line, the first reset signal line, the gate line, the emission control line, the second initialization signal line, and the second reset signal line are disposed; and the via hole area is positioned on one side of the wiring area close to the second spacing area, and the first light shielding layer via hole is arranged in the via hole area.

For example, in a display substrate provided in an embodiment of the present disclosure, the pixel circuit of the sub-pixel in each second pixel group includes a first initialization signal line, a first reset signal line, a gate line, and an emission control line extending along the first direction, and the second initialization signal line of the first sub-pixel in the first pixel group and the extension line of the second reset signal line are located between the first emission control line of the first sub-pixel in the second pixel group in the same row and the first reset signal line of the first sub-pixel in the second pixel group in the next row.

For example, in a display substrate provided by an embodiment of the present disclosure, the first initialization signal line of the third subpixel in each first pixel group is connected to the first initialization signal line of the first subpixel in the first pixel group adjacent in the first direction through a first connection line, the first reset signal line of the third subpixel in each first pixel group is connected to the first reset signal line of the first subpixel in the first pixel group adjacent in the first direction through a second connection line, the gate line and the second reset signal line of the third subpixel in each first pixel group are connected to each other through a third connection line, and are connected to the gate line and the second reset signal line of the first subpixel in the first pixel group adjacent in the first direction through the third connection line, the emission control line of the third sub-pixel in each of the first pixel groups is connected to the emission control line of the first sub-pixel in the first pixel group adjacent in the first direction through a fourth connection line, the second initialization signal line of the third sub-pixel in each of the first pixel groups is connected to the second initialization signal line of the first sub-pixel in the first pixel group adjacent in the first direction through a fifth connection line, and the first connection line, the second connection line, the third connection line, the fourth connection line, and the fifth connection line are gathered in the first spacing region.

For example, in a display substrate provided in an embodiment of the present disclosure, the first connection line, the third connection line, and the fifth connection line are disposed on the same layer as the power line, and are disposed on a different layer from the first initialization signal line, the gate line, and the second initialization signal line.

For example, in a display substrate provided in an embodiment of the present disclosure, the second connection line and the first reset signal line are disposed in the same layer and are integrally formed, and the fourth connection line and the emission control line are disposed in the same layer and are integrally formed.

For example, in a display substrate provided in an embodiment of the present disclosure, the first connecting line, the second connecting line, the third connecting line, the fourth connecting line, and the fifth connecting line are sequentially arranged in the second direction.

For example, in a display substrate provided in an embodiment of the present disclosure, the pixel circuit further includes a data line extending along the second direction, the data line of the first sub-pixel in each first pixel group is connected to the data line of the first sub-pixel in the first pixel group adjacent in the second direction by a sixth connection line, the data line of the second sub-pixel in each first pixel group is connected to the data line of the second sub-pixel in the first pixel group adjacent in the second direction by a seventh connection line, the data line of the third sub-pixel in each first pixel group is connected to the data line of the third sub-pixel in the first pixel group adjacent in the second direction by an eighth connection line, the sixth connecting line, the seventh connecting line and the eighth connecting line are gathered in the second spaced area.

For example, in a display substrate provided in an embodiment of the present disclosure, the sixth connection line and the first initialization signal line are disposed on the same layer and are disposed on a different layer from the data lines, the seventh connection line and the data lines are disposed on the same layer and are integrally formed, and the eighth connection line and the first reset signal line are disposed on the same layer and are disposed on a different layer from the data lines.

For example, in a display substrate provided in an embodiment of the present disclosure, the sixth connecting line, the seventh connecting line, and the eighth connecting line are sequentially arranged in the first direction.

For example, in a display substrate provided in an embodiment of the present disclosure, the sub-transmissive region is not provided with the sub-pixels.

For example, in a display substrate provided in an embodiment of the present disclosure, the first direction is substantially perpendicular to the second direction.

For example, in a display substrate provided in an embodiment of the present disclosure, the first sub-pixel is configured to emit light of a first color, the second sub-pixel is configured to emit light of a second color, and the third sub-pixel is configured to emit light of a third color.

For example, in a display substrate provided in an embodiment of the present disclosure, the first color is red, the second color is green, and the third color is blue.

At least one embodiment of the present disclosure further provides a display device including the display substrate.

For example, an embodiment of the present disclosure provides a display device further including: and the photosensitive functional element is positioned on one side of the plurality of sub-pixels close to the substrate base plate, wherein the orthographic projection of the photosensitive functional element on the substrate base plate is at least partially overlapped with the first display area.

Drawings

To more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly introduced below, and it is apparent that the drawings in the following description relate only to some embodiments of the present disclosure and are not limiting to the present disclosure.

Fig. 1 is a schematic plan view of a display substrate according to an embodiment of the present disclosure;

fig. 2 is a schematic plan view of another display substrate provided in accordance with an embodiment of the present disclosure;

FIG. 3 is a schematic cross-sectional view along the direction AA in FIG. 2 of a display substrate according to an embodiment of the present disclosure;

fig. 4 is a schematic partial plan view of another display substrate provided in accordance with an embodiment of the present disclosure;

fig. 5 is a schematic partial plan view of a display substrate according to an embodiment of the present disclosure;

FIG. 6 is an enlarged view of a first pixel set of FIG. 5; and

fig. 7 is a schematic diagram of a display device according to an embodiment of the present disclosure.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions of the embodiments of the present disclosure will be described clearly and completely with reference to the drawings of the embodiments of the present disclosure. It is to be understood that the described embodiments are only a few embodiments of the present disclosure, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the disclosure without any inventive step, are within the scope of protection of the disclosure.

Unless otherwise defined, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The use of "first," "second," and similar terms in this disclosure is not intended to indicate any order, quantity, or importance, but rather is used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items.

With the increasing requirements of people on the screen occupation ratio of electronic products, the design of the camera under the screen also becomes a research hotspot of various manufacturers. The technical difficulty of designing the camera under the screen is mainly that the light transmittance of the screen is low, so that the imaging quality of the camera placed below the screen is seriously affected.

With the increase of requirements of consumers on the integrity of the screen, the under-screen camera is popular. At present, in the OLED field, the technical difficulty of under-screen shooting is mainly low screen transmittance, so that the imaging quality of a camera placed below a screen is seriously influenced. For example, the display screen can be divided into a first display area and a second display area, the camera can be arranged in the first display area, and the second display area can be a normal display area; the density of the sub-pixels in the first display area can be reduced by reducing the resolution of the first display area, so that the light transmittance is increased, and the function of shooting under a screen is realized.

The embodiment of the disclosure also provides a display substrate and a display device. The display substrate includes: the display device comprises a substrate base plate, a first display area and a second display area, wherein the second display area at least partially surrounds the first display area; and a plurality of sub-pixels on the substrate and in the first and second display regions, the sub-pixels of the first display region having a density lower than that of the sub-pixels of the second display region, each sub-pixel including a pixel circuit, the plurality of sub-pixels including a first sub-pixel, a second sub-pixel and a third sub-pixel, the plurality of sub-pixels including a plurality of first pixel groups and a plurality of second pixel groups, the plurality of first pixel groups being in the first display region, the plurality of second pixel groups being in the second display region, the first display region including a plurality of sub-display regions and a sub-transmissive region between the plurality of sub-display regions, the plurality of first pixel groups being in one-to-one correspondence with the plurality of sub-display regions, each first pixel group including a first sub-pixel, a second sub-pixel and a third sub-pixel arranged in order along the first direction, each second pixel group including a first sub-pixel arranged along the first direction, A second sub-pixel pair including two second sub-pixels arranged in the second direction, and a third sub-pixel. The display substrate adopts a Real GRB pixel arrangement mode in a first display area and adopts a GGRB pixel arrangement mode in a second display area; on one hand, the display substrate can reduce the resolution of the first display area or PPI (Pixel Per Inc), thereby increasing the light transmittance of the first display area; on the other hand, the second display area of the display substrate has higher resolution and display effect. In addition, because the first display area adopts the pixel arrangement mode of Real GRB, the light-emitting area of the green sub-pixel is larger, and the service life is longer.

Hereinafter, a display substrate and a display device provided in an embodiment of the present disclosure will be described in detail with reference to the accompanying drawings.

Fig. 1 is a schematic plan view of a display substrate according to an embodiment of the disclosure. As shown in fig. 1, the display substrate 100 includes a substrate 110 and a plurality of sub-pixels 120; the substrate 110 includes a first display region 112 and a second display region 114, the second display region 114 at least partially surrounding the first display region 112; the plurality of sub-pixels 120 are located on the substrate 110 and in the first display area 112 and the second display area 114, and the density of the sub-pixels of the first display area 112 is less than that of the sub-pixels of the second display area 114; each sub-pixel 120 includes a pixel circuit. The plurality of sub-pixels 120 include a first sub-pixel 121, a second sub-pixel 122 and a third sub-pixel 123, the plurality of sub-pixels 120 include a plurality of first pixel groups 141 and a plurality of second pixel groups 142, the plurality of first pixel groups 141 are located in the first display region 112, and the plurality of second pixel groups 142 are located in the second display region 114; the first display area 112 includes a plurality of sub-display areas 1124 and a sub-light-transmitting area 1126 located between the plurality of sub-display areas 1124, a plurality of first pixel groups 141 are disposed in one-to-one correspondence with the plurality of sub-display areas 1124, each first pixel group 141 includes one first sub-pixel 121, one second sub-pixel 122 and one third sub-pixel 123 arranged in sequence along a first direction, each second pixel group 142 includes one first sub-pixel 121, one second sub-pixel pair 1220 and one third sub-pixel 123 arranged along the first direction, and the second sub-pixel pair 1220 includes two second sub-pixels 122 arranged along a second direction.

In the display substrate provided by the embodiment of the present disclosure, the first display region 112 includes a plurality of sub-display regions 1124 and sub-light-transmitting regions 1126 located between the plurality of sub-display regions 1124, and the plurality of first pixel groups 141 are disposed in one-to-one correspondence with the plurality of sub-display regions 1124. At this time, the plurality of sub display regions in the first display region 112 may be used for displaying, and the sub light-transmitting region 1126 may transmit light, so that the first display region 112 may be provided with a light-sensitive functional element, such as a camera. Each of the first pixel groups 141 includes one first subpixel 121, one second subpixel 122, and one third subpixel 123 sequentially arranged in a first direction; it can be seen that the sub-pixels in the first display area 112 can adopt the pixel arrangement of Real GRB; at this time, the light emitting area of the second sub-pixel is larger, thereby having a longer service life. Each second pixel group 142 includes one first subpixel 121, one second subpixel pair 1220, and one third subpixel 123 arranged in the first direction, and the second subpixel pair 1220 includes two second subpixels 122 arranged in the second direction; it can be seen that the subpixels in the second display area 114 can adopt the pixel arrangement of the GGRB, thereby having higher resolution and better display effect. It should be noted that, since the number of the sub-pixels in the first display region is small, in order to make the luminance of the entire display substrate uniform, the luminance of the sub-pixels in each first pixel group is greater than the luminance of the sub-pixels in the second pixel group, so that the display substrate can have a longer service life by increasing the light emitting area of the second sub-pixels in the first pixel group.

For example, as shown in fig. 1, an orthogonal projection of the first display area 112 on the substrate base 110 has a rectangular shape, and the second display area 114 surrounds three edges of the first display area 112. Of course, embodiments of the present disclosure include, but are not limited to, this. The shape of the orthographic projection of the first display area 112 on the substrate base plate 110 may also be other shapes, such as a circle or a drop; in addition, the second display area 114 may also surround all edges of the first display area 112.

In some examples, the sub-transmissive region 1126 does not provide the sub-pixel 120. Thus, the sub light transmission region 1126 may have a higher light transmittance.

In some examples, the first direction is substantially perpendicular to the second direction. The above-mentioned condition that the first direction is substantially perpendicular to the second direction includes a case where an angle between the first direction and the second direction is 90 degrees and a case where an angle between the first direction and the second direction is in a range of 80 to 100 degrees.

In some examples, the first subpixel 121 is configured to emit light of a first color, the second subpixel 122 is configured to emit light of a second color, and the third subpixel 123 is configured to emit light of a third color.

For example, the first color is red, the second color is green, and the third color is blue.

Fig. 2 is a schematic plan view of another display substrate provided in accordance with an embodiment of the present disclosure; fig. 3 is a schematic cross-sectional view of a display substrate along the direction AA in fig. 2 according to an embodiment of the disclosure.

As shown in fig. 2 and 3, the display substrate 100 further includes a plurality of first light-shielding layers 151 and second light-shielding layers 152; the plurality of first light-shielding layers 151 and the plurality of sub-display regions 1124 are disposed in one-to-one correspondence; each first light-shielding layer 151 is located on one side of the corresponding first pixel group 141 close to the substrate 110; the second light-shielding layer 152 is disposed in the second display region 114 and on a side of the plurality of second pixel groups 142 close to the substrate 110. Thus, the first light-shielding layer 151 can prevent light emitted from the first pixel group 141 from entering the photosensitive functional element disposed in the first display region 112; similarly, the second light-shielding layer 152 can prevent the light emitted from the second pixel group 142 from entering the photosensitive functional element disposed in the first display region 112, thereby ensuring that the photosensitive functional element can perform its function with high quality. For example, the photosensitive functional element may be a camera.

For example, the orthographic projection of the pixel circuits 130 of the sub-pixels 120 in the first pixel group 141 on the substrate 110 falls within the orthographic projection of the corresponding first light shielding layer 151 on the substrate 110, so that the first light shielding layer 151 can shield the pixel circuits 130 of the sub-pixels 120 in the first pixel group 141, and light is prevented from being diffracted into the photosensitive functional element through the slits between the signal lines of the pixel circuits 130.

For example, as shown in fig. 2 and 3, adjacent sub-display regions 1124 are disposed at intervals. Of course, the disclosed embodiments include, but are not limited to, that two or more adjacent sub-display areas may be closely arranged to constitute one larger area.

In some examples, as shown in fig. 2 and 3, the second light shielding layer 151 may occupy the entire area of the second display region 114, while the first light shielding layer 151 only occupies the area of the sub-display region 1124 in the first display region 112, thereby ensuring that the first display region 112 has a certain light transmittance.

In some examples, as shown in fig. 2, each sub-display area 1124 includes three unit areas 200, and the first sub-pixel 121, the second sub-pixel 122, and the third sub-pixel 123 in the first pixel group 141 are respectively disposed in the three unit areas 200; that is, one unit region 200 sets one subpixel 120. A first spacing region 161 is disposed between the first pixel groups 141 adjacent in the first direction, the first spacing region 161 includes one cell region 200, a second spacing region 162 is disposed between the first pixel groups 141 adjacent in the second direction, the second spacing region 162 includes three cell regions 200 disposed in the first direction, and the sub light transmitting region 1126 includes the first spacing region 161 and the second spacing region 162. In the display substrate provided in this example, the pixel density of the first display region is approximately 3/8 of the pixel density of the second display region, and the PPI of the first display region is approximately 1/2 of the PPI of the second display region. Therefore, the first display area has higher light transmittance, so that the photosensitive functional element arranged in the first display area has better performance.

Fig. 4 is a partial schematic plan view of another display substrate according to an embodiment of the disclosure. Fig. 4 shows only power supply lines and pixel circuits of the first pixel group and the second pixel group. As shown in fig. 4, each sub-pixel 120 further includes a power line 128 extending along the second direction, the power line 128 is connected to the pixel circuit 130 and configured to apply a constant voltage to the pixel circuit 130, the power line 128 of at least one sub-pixel 120 in each first pixel group 141 is electrically connected to the corresponding first light shielding layer 151, and the power line 128 of at least one sub-pixel 128 in each second pixel group 142 is electrically connected to the second light shielding layer 152. In the display substrate provided in this example, the first light-shielding layer and the second light-shielding layer are both connected to the power line, so that the first light-shielding layer and the second light-shielding layer are prevented from being in a floating state during display, and the display quality of the display substrate can be improved.

In some examples, as shown in fig. 4, in order to reduce the area of each first pixel group 141, the power line 128 of the first subpixel 121 in each first pixel group 141 is connected to the corresponding first light shielding layer 151, and the power line 128 of the second subpixel 122 and the power line 128 of the third subpixel 123 in each first pixel group 141 are not connected to the corresponding first light shielding layer 151. Thus, only the power supply line 128 of the first subpixel 121 in each first pixel group 141 applies a constant voltage to the first light-shielding layer 151 corresponding to the first pixel group 141.

In some examples, as shown in fig. 4, the power lines 128 of the first sub-pixel 121, the second sub-pixel 122 and the third sub-pixel 123 in each second pixel group 142 are electrically connected to the corresponding second light-shielding layer 152. Of course, the embodiments of the present disclosure include, but are not limited to, each second pixel group may only have the power lines of some of the sub-pixels connected to the corresponding second light-shielding layer.

Fig. 5 is a schematic partial plan view of a display substrate according to an embodiment of the present disclosure; fig. 6 is an enlarged schematic view of a first pixel group in fig. 5. As shown in fig. 5 and 6, the power line 128 of the second sub-pixel 122 in each first pixel group 141 is connected to the power line 128 of the second sub-pixel 122 in the first pixel group 141 adjacent in the second direction through the second spacing region 162. The power supply line 128 of the first subpixel 121 and the power supply line 128 of the third subpixel 123 in each first pixel group 141 are disconnected from the power supply line 128 of the first subpixel 121 and the power supply line 128 of the third subpixel 123 in the first pixel group 141 adjacent in the second direction. That is, the power line 128 of the first sub-pixel 121 in each first pixel group 141 is not connected to the power line 128 of the first sub-pixel 121 in the first pixel group 141 adjacent in the second direction, and the power line 128 of the third sub-pixel 123 in each first pixel group 141 is not connected to the power line 128 of the third sub-pixel 123 in the first pixel group 141 adjacent in the second direction. Therefore, the display substrate can reduce the number of the routing lines in the second spacing area, and the light transmittance of the second spacing area is improved.

It should be noted that, as shown in fig. 5 and fig. 6, the power line 128 of the first sub-pixel 121, the power line 128 of the second sub-pixel 122, and the power line 128 of the third sub-pixel 123 in each first pixel group 141 may be electrically connected to each other through the second gate layer in the pixel circuit.

In some examples, as shown in fig. 5 and 6, the pixel circuit 130 of the sub-pixel 120 in each first pixel group 141 includes a first initialization signal line 1311, a first reset signal line 1321, a gate line 133, an emission control line 134, a second initialization signal line 1312, and a second reset signal line 1322 extending in a first direction. In each first pixel group 141, the first initialization signal line 1311 of the first subpixel 121, the first initialization signal line 1311 of the second subpixel 122, and the first initialization signal line 1311 of the third subpixel 123 are connected; in each first pixel group 141, the first reset signal line 1321 of the first subpixel 121, the first reset signal line 1321 of the second subpixel 122, and the first reset signal line 1321 of the third subpixel 123 are connected; in each first pixel group 141, the gate line 133 of the first subpixel 121, the gate line 133 of the second subpixel 122, and the gate line 133 of the third subpixel 123 are connected; in each first pixel group 141, the emission control line 134 of the first subpixel 121, the emission control line 134 of the second subpixel 122, and the emission control line 134 of the third subpixel 123 are connected; in each first pixel group 141, the second initialization signal line 1312 of the first subpixel 121, the second initialization signal line 1312 of the second subpixel 122, and the second initialization signal line 1312 of the third subpixel 123 are connected; in each of the first pixel groups 141, the second reset signal line 1322 of the first subpixel 121, the second reset signal line 1322 of the second subpixel 122, and the second reset signal line 1322 of the third subpixel 123 are connected.

In the present disclosure, in order to more clearly explain the connection relationship of these signal lines, these signal lines are divided into signal line segments corresponding to the respective sub-pixels. However, each signal line in each first pixel group may be integrally formed. For example, as shown in fig. 5, in each first pixel group 141, the first initialization signal line 1311 of the first subpixel 121, the first initialization signal line 1311 of the second subpixel 122, and the first initialization signal line 1311 of the third subpixel 123 are integrally molded; the first reset signal line 1321 of the first subpixel 121, the first reset signal line 1321 of the second subpixel 122, and the first reset signal line 1321 of the third subpixel 123 are integrally molded; the gate line 133 of the first sub-pixel 121, the gate line 133 of the second sub-pixel 122, and the gate line 133 of the third sub-pixel 123 are integrally formed; the emission control line 134 of the first subpixel 121, the emission control line 134 of the second subpixel 122, and the emission control line 134 of the third subpixel 123 are integrally molded; the second initialization signal line 1312 of the first subpixel 121, the second initialization signal line 1312 of the second subpixel 122, and the second initialization signal line 1312 of the third subpixel 123 are integrally formed; the second reset signal line 1322 of the first subpixel 121, the second reset signal line 1322 of the second subpixel 122, and the second reset signal line 1322 of the third subpixel 123 are integrally formed.

In some examples, as shown in fig. 4, 5 and 6, the power line 128 of the first sub-pixel 121 in each first pixel group 141 is electrically connected to the corresponding first light shielding layer 151 through the first light shielding layer via hole 171; for example, as shown in fig. 4, 5 and 6, one first pixel group 141 includes only one first light shielding layer via hole 171. The power lines 128 of the first sub-pixel 121, the second sub-pixel 122 and the third sub-pixel 123 in each second pixel group 142 are electrically connected to the second light-shielding layer 152 through the second light-shielding layer via hole 172; the orthographic projection of the first light shielding layer via hole 171 on the substrate 110 is located on a side of the second reset signal line 1322 away from the emission signal line 134. Thus, the second initialization signal line 1312 and the second reset signal line 1322 can be disposed closer to the emission signal line 134, thereby reducing the area occupied by the pixel circuit, further reducing the area of the first light-shielding layer and improving the light transmittance of the first display region. In some examples, as shown in fig. 5 and 6, the pixel circuit 130 of the first subpixel 121 includes a routing region 1215 and a via region 1217; a first initialization signal line 1311, a first reset signal line 1321, a gate line 133, an emission control line 134, a second initialization signal line 1312, and a second reset signal line 1322 are disposed in the wiring region 1215; the via region 1217 is located at a side of the routing region 1215 adjacent to the second spaced region 162, and the first light shielding layer via 171 is disposed at the via region 1217. Thus, since the first light-shielding layer via 171 is disposed in the via region 1217, the first initialization signal line 1311, the first reset signal line 1321, the gate line 133, the emission control line 134, the second initialization signal line 1312, and the second reset signal line 1322 may be more densely disposed in the routing region 1215. Therefore, the display substrate can reduce the area occupied by the pixel circuit, further reduce the area of the first shading layer and improve the light transmittance of the first display area.

In some examples, as shown in fig. 5 and 6, the pixel circuit 130 of the sub-pixel 120 in each second pixel group 142 includes a first initialization signal line 1311, a first reset signal line 1321, a gate line 133, and an emission control line 134 extending in a first direction, and the extension lines of the second initialization signal line 1312 and the second reset signal line 1322 of the first sub-pixel 121 in the first pixel group 141 are located between the first emission control line 134 of the first sub-pixel 121 in the second pixel group 142 of the same row and the first reset signal line 1311 of the first sub-pixel 121 in the second pixel group 142 of the next row. In the display substrate, the pixel circuits of the sub-pixels in each second pixel group do not need to be provided with a second initialization signal line and a second reset signal line, but the first initialization signal line and the first reset signal line of the sub-pixels of the second pixel group in the next row are used as the second initialization signal line and the second reset signal line of the sub-pixels of the second pixel group in the previous row; at this time, since the second initialization signal line and the extension line of the second reset signal line of the first sub-pixel in the first pixel group are located between the first emission control line of the first sub-pixel in the second pixel group in the same row and the first reset signal line of the first sub-pixel in the second pixel group in the next row, the display substrate can reduce the area occupied by the pixel circuit of each sub-pixel in the first pixel group, thereby reducing the area of the first light shielding layer and improving the light transmittance of the first display region.

In some examples, as shown in fig. 5 and 6, the first initialization signal line 1311 of the third subpixel 123 in each first pixel group 141 is connected to the first initialization signal line 1311 of the first subpixel 121 in the first pixel group 141 adjacent in the first direction through the first connection line 181; the first reset signal line 1321 of the third subpixel 123 in each first pixel group 141 is connected to the first reset signal line 1321 of the first subpixel 121 in the first pixel group 141 adjacent in the first direction through the second connection line 182; the gate line 133 and the second reset signal line 1322 of the third subpixel 123 in each first pixel group 141 are connected by a third connection line 183, and are connected by the third connection line 183 to the gate line 133 and the second reset signal line 1322 of the first subpixel 121 in the first pixel group 141 adjacent in the first direction; the emission control line 124 of the third subpixel 123 in each first pixel group 141 is connected to the emission control line 124 of the first subpixel 121 in the first pixel group 141 adjacent in the first direction through a fourth connection line 184; the second initialization signal line 1312 of the third subpixel 123 in each first pixel group 141 is connected to the second initialization signal line 1312 of the first subpixel 121 in the first pixel group 141 adjacent in the first direction through the fifth connection line 185, and the first connection line 181, the second connection line 182, the third connection line 183, the fourth connection line 184, and the fifth connection line 185 are gathered at the first partition region 161. For example, "gathered" in the present disclosure means that the arrangement density of the connection lines is smaller than that of various signal lines connected to the connection lines. For example, the first to fifth connection lines 181-185 are densely arranged in the second direction, and the various signal lines connected thereto are more sparsely arranged in the second direction. Therefore, the display substrate can reduce the area occupied by the first connecting line, the second connecting line, the third connecting line, the fourth connecting line and the fifth connecting line by folding the first connecting line, the second connecting line, the third connecting line, the fourth connecting line and the fifth connecting line in the first spacing area, so that the light transmittance of the first display area can be improved.

In some examples, as shown in fig. 5 and 6, the first, third, and fifth connection lines 181, 183, and 185 are disposed at the same layer as the power line 128 and at a different layer from the first, gate, and second initialization signal lines 1311, 133, and 1312. For example, the first, third, and fifth connection lines 181, 183, and 185 may be electrically connected to the first, gate, and second initialization signal lines 1311, 133, and 1312, respectively, through vias.

In some examples, as shown in fig. 5 and 6, the second connection line 182 and the first reset signal line 1321 are disposed at the same layer and are integrally formed, and the fourth connection line 184 and the emission control line 134 are disposed at the same layer and are integrally formed. Therefore, the first connecting line, the third connecting line and the fifth connecting line are positioned on the same layer, and the second connecting line and the fourth connecting line are positioned on the same layer; first connecting wire, third connecting wire and fifth connecting wire and second connecting wire and fourth connecting wire are located the rete of difference, consequently, under the prerequisite of guaranteeing mutual insulation, first connecting wire, second connecting wire, third connecting wire, fourth connecting wire and fifth connecting wire can inseparable setting to can further reduce the area that first connecting wire, second connecting wire, third connecting wire, fourth connecting wire and fifth connecting wire occupy.

In some examples, as shown in fig. 5 and 6, the first connection line 181, the second connection line 182, the third connection line 183, the fourth connection line 184, and the fifth connection line 185 are sequentially disposed in the second direction. From this, under the prerequisite of guaranteeing mutual insulation, first connecting wire, second connecting wire, third connecting wire, fourth connecting wire and fifth connecting wire can be inseparable setting to can further reduce the area that first connecting wire, second connecting wire, third connecting wire, fourth connecting wire and fifth connecting wire occupy.

In some examples, as shown in fig. 5 and 6, the pixel circuit 130 further includes a data line 136 extending in the second direction; the data line 136 of the first sub-pixel 121 in each first pixel group 141 is connected to the data line 136 of the first sub-pixel 121 in the first pixel group 141 adjacent to the second direction through a sixth connection line 186, the data line 136 of the second sub-pixel 122 in each first pixel group 141 is connected to the data line 136 of the second sub-pixel 122 in the first pixel group 141 adjacent to the second direction through a seventh connection line 187, the data line 136 of the third sub-pixel 123 in each first pixel group 141 is connected to the data line 136 of the third sub-pixel 123 in the first pixel group 141 adjacent to the second direction through an eighth connection line 188, and the sixth connection line 186, the seventh connection line 187, and the eighth connection line 188 are gathered in the second spaced region 162. Therefore, the display substrate can reduce the area occupied by the sixth connecting line, the seventh connecting line and the eighth connecting line by folding the sixth connecting line, the seventh connecting line and the eighth connecting line in the second spacing region, thereby improving the light transmittance of the first display region.

In some examples, as shown in fig. 5 and 6, the sixth connecting line 186 and the first initialization signal line 1311 are disposed at the same layer and different from the data line 136, the seventh connecting line 187 and the data line 136 are disposed at the same layer and integrally formed, and the eighth connecting line 188 and the first reset signal line 1321 are disposed at the same layer and different from the data line 136. For example, the sixth connecting lines 186 and the eighth connecting lines 188 may be electrically connected to the corresponding data lines 136 through vias, respectively. Therefore, the sixth connecting line and the eighth connecting line are arranged in different layers with the data line, and the seventh connecting line and the data line are positioned in the same layer; that is, the film layers where the sixth and eighth connecting lines are located and the film layers where the seventh connecting line is located are different film layers. Therefore, on the premise of ensuring mutual insulation, the sixth connecting wire, the seventh connecting wire and the eighth connecting wire can be arranged closely, so that the area occupied by the sixth connecting wire, the seventh connecting wire and the eighth connecting wire can be further reduced.

In some examples, as shown in fig. 6, the sixth, eighth, and seventh connecting lines 186, 188, 187 are disposed in order in the first direction.

It should be noted that the number of the first pixel groups in the first display area in the display substrate provided by the embodiment of the present disclosure is not limited to the specific number of the first pixel groups in the first display area in the above-mentioned figures, but is set according to the specific size of the product.

An embodiment of the present disclosure also provides a display device. Fig. 7 is a schematic diagram of a display device according to an embodiment of the present disclosure. As shown in fig. 7, the display device 300 includes the display substrate 100. Therefore, the display device has the technical effects corresponding to the beneficial technical effects of the display substrate, and specific reference can be made to the related description of the display substrate.

For example, the display device may be a display device such as an Organic Light-Emitting Diode (OLED) display, and any product or component having a display function such as a television, a digital camera, a mobile phone, a watch, a tablet computer, a notebook computer, and a navigator including the display device.

In some examples, as shown in fig. 7, the display device 300 further includes a light sensing functional element 310 located on a side of the plurality of sub-pixels 120 close to the substrate 110, and an orthogonal projection of the light sensing functional element 310 on the substrate 110 at least partially overlaps the first display area 112. The light sensing function 310 is configured to receive light from a side of the display substrate where the plurality of sub-pixels are located, thereby implementing various functions.

For example, the photosensitive functional element 310 may be a camera, so that the display device can realize functions such as image capture while realizing a full-screen design.

The following points need to be explained:

(1) in the drawings of the embodiments of the present disclosure, only the structures related to the embodiments of the present disclosure are referred to, and other structures may refer to general designs.

(2) Features of the same embodiment of the disclosure and of different embodiments may be combined with each other without conflict.

The above description is intended to be exemplary of the present disclosure, and not to limit the scope of the present disclosure, which is defined by the claims appended hereto.