阅读说明：本技术 功率放大电路 (Power amplifying circuit ) 是由 浪江寿典 后藤聪 佐藤知明 于 2021-06-23 设计创作，主要内容包括：提供一种功率放大电路,功率放大电路(100)具备：单端放大器(1),其在第一模式的情况下以及在与第一模式不同的第二模式的情况下进行动作；差动放大器(2),其在第二模式的情况下进行动作；第一平衡不平衡变压器(3),其将单端放大器(1)的不平衡输出信号转换成差动信号并向差动放大器(2)输出；第二平衡不平衡变压器(4),其将差动放大器(2)的平衡输出信号转换成不平衡输出信号；以及第一开关电路(5),其在第一模式中输出单端放大器(1)的不平衡输出信号,在第二模式中输出第二平衡不平衡变压器(4)的不平衡输出信号。据此,能够通过简易的结构得到能够切换增益的功率放大电路。(Provided is a power amplification circuit (100) which is provided with: a single-ended amplifier (1) that operates in a first mode and in a second mode different from the first mode; a differential amplifier (2) that operates in the second mode; a first balun (3) that converts an unbalanced output signal of the single-ended amplifier (1) into a differential signal and outputs the differential signal to the differential amplifier (2); a second balun (4) that converts the balanced output signal of the differential amplifier (2) into an unbalanced output signal; and a first switch circuit (5) that outputs an unbalanced output signal of the single-ended amplifier (1) in a first mode and outputs an unbalanced output signal of the second balun (4) in a second mode. Thus, a power amplifier circuit capable of switching gain can be obtained with a simple configuration.)

1. A power amplification circuit is provided with:

a single-ended amplifier that operates in a first mode and in a second mode different from the first mode;

a differential amplifier that operates in the second mode;

a first balun that converts an unbalanced output signal of the single-ended amplifier into a differential signal and outputs the differential signal to the differential amplifier;

a second balun that converts a balanced output signal of the differential amplifier into an unbalanced output signal; and

a first switching circuit that outputs an unbalanced output signal of the single-ended amplifier in the first mode and outputs an unbalanced output signal of the second balun in the second mode.

2. The power amplification circuit of claim 1,

the power amplification circuit includes:

a first capacitor disposed between the single-ended amplifier and one end of an input side winding of the first balun; and

a second switching circuit that connects the other end of the input side winding of the first balun to a reference potential in the case of the second mode.

3. The power amplification circuit of claim 1,

the single-ended amplifier is connected to one end of the input side winding of the first balun,

supplying a power supply voltage of the single-ended amplifier to the other end of the input side winding of the first balun.

4. The power amplification circuit of claim 2 or 3,

the first switch circuit switches and outputs an unbalanced output signal of the single-ended amplifier and an unbalanced output signal of the second balun.

5. The power amplification circuit of claim 2 or 3,

the first switching circuit shorts an unbalanced output path of the single-ended amplifier with an unbalanced output path of the second balun in the first mode.

6. The power amplification circuit of claim 5,

a second capacitor is provided in the unbalanced output path of the second balun transformer,

one end of the second capacitor is connected to one end of the output side winding of the second balun, and the other end of the second capacitor is connected to one end of the first switching circuit.

7. The power amplification circuit of claim 4,

the power amplification circuit includes:

a third switch circuit that switches an output of the first switch circuit to any one of a plurality of output paths and outputs the switched output; and

a matching circuit disposed between the first switching circuit and the third switching circuit.

8. The power amplification circuit of claim 7,

the matching circuit is a variable matching circuit capable of adjusting characteristics.

Technical Field

The present invention relates to a power amplifier circuit.

Background

In a power amplifier circuit mounted in a wireless communication terminal device, a multistage structure using a plurality of amplifiers is widely used in order to obtain a desired gain. For example, patent document 1 listed below describes a power amplifier circuit having a two-stage configuration including a single-ended amplifier and a differential amplifier.

In such a power amplifier circuit having a multistage configuration including a single-ended amplifier and a differential amplifier, a gain switching function is sometimes required. For example, a configuration in which a single-ended amplifier having a relatively low gain and a differential amplifier having a relatively high gain are switched is disclosed (for example, patent document 2).

Prior art documents

Patent document

Patent document 1: japanese patent laid-open publication No. 2014-225862

Patent document 2: specification of U.S. Pat. No. 9160377

Disclosure of Invention

Problems to be solved by the invention

In the configuration described in patent document 2, the power amplification path by the single-ended amplifier and the power amplification path by the differential amplifier are switched by the switch circuit, and therefore, the circuit configuration may become complicated.

The present invention has been made in view of the above circumstances, and an object thereof is to obtain a power amplifier circuit capable of switching gain with a simple configuration.

Means for solving the problems

A power amplification circuit according to one aspect of the present invention includes: a single-ended amplifier that operates in a first mode and in a second mode different from the first mode; a differential amplifier that operates in the second mode; a first balun that converts an unbalanced output signal of the single-ended amplifier into a differential signal and outputs the differential signal to the differential amplifier; a second balun that converts a balanced output signal of the differential amplifier into an unbalanced output signal; and a first switching circuit that outputs an unbalanced output signal of the single-ended amplifier in the first mode, and outputs an unbalanced output signal of the second balun in the second mode.

In this configuration, a power amplifier circuit capable of switching between an amplification operation in the first mode at a relatively low first gain (low gain) and an amplification operation in the second mode at a relatively high second gain (high gain) can be realized with a simple configuration.

Effects of the invention

According to the present disclosure, a power amplifier circuit capable of switching gain can be obtained with a simple configuration.

Drawings

Fig. 1A is a diagram showing a configuration example of a power amplifier circuit according to embodiment 1.

Fig. 1B is a diagram showing a configuration example of a power amplifier circuit according to embodiment 1.

Fig. 2A is a diagram showing an equivalent circuit of the first balun in the first mode of the power amplification circuit of embodiment 1.

Fig. 2B is a diagram showing an equivalent circuit of the first balun in the first mode of the power amplification circuit of the comparative example of embodiment 1.

Fig. 3 is a diagram showing an example of a simulation result of the frequency-gain characteristic in the first mode of the power amplifier circuit of embodiment 1.

Fig. 4A is a diagram showing a configuration example of a power amplifier circuit according to embodiment 2.

Fig. 4B is a diagram showing a configuration example of a power amplifier circuit according to embodiment 2.

Fig. 5 is a diagram showing an equivalent circuit of the first balun in the first mode of the power amplification circuit of embodiment 2.

Fig. 6 is a diagram showing an example of a simulation result of the frequency-gain characteristic in the first mode of the power amplifier circuit of embodiment 2.

Fig. 7 is a diagram showing a comparative example of simulation results of frequency-gain characteristics in the second mode of the power amplifier circuit of embodiment 1 and the power amplifier circuit of embodiment 2.

Fig. 8A is a diagram showing a configuration example of a power amplifier circuit according to embodiment 3.

Fig. 8B is a diagram showing a configuration example of a power amplifier circuit according to embodiment 3.

Fig. 9A is a diagram showing a configuration example of a power amplifier circuit according to embodiment 4.

Fig. 9B is a diagram showing a configuration example of a power amplifier circuit according to embodiment 4.

Fig. 10 is a diagram showing an equivalent circuit of the second balun in the first mode of the power amplification circuit of embodiment 4.

Fig. 11 is a diagram showing an equivalent circuit of a second balun in the first mode of the power amplification circuit of the comparative example of embodiment 4.

Fig. 12 is a diagram showing an example of a simulation result of the frequency-gain characteristic in the first mode of the power amplifier circuit of embodiment 4.

Fig. 13 is a diagram showing a configuration example of a power amplifier circuit according to embodiment 5.

Fig. 14 is a diagram showing a configuration example of a power amplifier circuit according to embodiment 6.

Description of the reference numerals

1a single-ended amplifier;

2a differential amplifier;

3 a first balun;

4a second balun;

5a first switching circuit;

6 a second switching circuit;

7a matching circuit;

7a variable matching circuit;

8a, 8b matching circuits;

10a, 10b, 10c matching circuits;

21. 22 an amplifier;

31. 41 an input side winding;

32. 42 an output side winding;

100. 100a, 100b, 100c, 100d, 100e power amplifier circuits;

a C1 capacitor (first capacitor);

c2 capacitor (second capacitor).

Detailed Description

Hereinafter, a power amplifier circuit according to an embodiment will be described in detail with reference to the drawings. The present invention is not limited to the embodiment. The components of the embodiments include components that can be easily replaced by those skilled in the art, or substantially the same components. Each embodiment is an example, and partial replacement or combination of the structures shown in different embodiments can be performed. In embodiment 2 and thereafter, descriptions of common matters with embodiment 1 are omitted, and only differences will be described. In particular, the same operational effects due to the same structure are not mentioned in each embodiment.

(embodiment mode 1)

Fig. 1A and 1B are diagrams illustrating a configuration example of a power amplifier circuit according to embodiment 1. The power amplifier circuit 100 according to embodiment 1 performs an amplification operation with a relatively low first gain (low gain) and an amplification operation with a relatively high second gain (high gain) on the input high frequency input signal RFin, and outputs a high frequency output signal RFout. Hereinafter, a mode in which an amplification operation by the first gain is performed is referred to as a "first mode", and a mode in which an amplification operation by the second gain is performed is referred to as a "second mode". Fig. 1A shows a state in the case of the first mode, and fig. 1B shows a state in the case of the second mode.

As shown in fig. 1A and 1B, a power amplification circuit 100 of embodiment 1 includes a single-ended amplifier 1, a differential amplifier 2, a first balun 3, a second balun 4, and a first switch circuit 5.

The single-ended amplifier 1 operates in the first mode and the second mode by the first power supply voltage Vcc1 input through the inductance element Lp 1.

The single-ended amplifier 1 may be formed of, for example, a bipolar Transistor, and may be formed of, for example, a Field Effect Transistor (FET). In the case where the single-ended amplifier 1 is constituted by a Bipolar Transistor, for example, a Heterojunction Bipolar Transistor (HBT) is exemplified. The present disclosure is not limited by the structure of the single-ended amplifier 1.

The first balun 3 includes an input side winding 31 and an output side winding 32.

The single-ended amplifier 1 amplifies a high-frequency input signal RFin which is a single-ended signal. An unbalanced output signal, which is an output of the single-ended amplifier 1, is input to the input terminal 51a of the first switch circuit 5 via the capacitor C1p and the inductance element L1 p. Further, an unbalanced output signal, which is an output of the single-ended amplifier 1, is input to one end of the input side winding 31 of the first balun 3 via a capacitor C1 (first capacitor). The other end of the input side winding 31 of the first balun 3 is connected to the reference potential via the second switching circuit 6 in the second mode (see fig. 1B). The reference potential is a ground potential here, but is not limited thereto.

The first balun 3 performs unbalanced-balanced conversion of the unbalanced output signal from the single-ended amplifier 1 into a differential signal. The output side winding 32 of the first balun 3 is connected between the inputs INP, INN of the differential amplifier 2.

The input side winding 31 and the output side winding 32 of the first balun 3 are electromagnetically coupled. Thereby, the unbalanced output signal output from the single-ended amplifier 1 is subjected to unbalanced-balanced conversion by the first balun 3.

The second balun 4 includes an input side winding 41 and an output side winding 42.

The input side winding 41 is connected between the output OUTP and the output OUTN of the differential amplifier 2. A center tap is provided at a midpoint of the input side winding 41, and the second power supply voltage Vcc2 is applied thereto via the inductance element Lp 2. Further, a capacitor Cb1 is connected in parallel to input side winding 41.

One end of the output side winding 42 is connected to a reference potential. Further, a capacitor Cb2 is connected in parallel to the output side winding 42.

The differential amplifier 2 operates in the second mode by the second power supply voltage Vcc2 input via the inductance element Lp2 and the input side winding 41 of the second balun 4.

The differential amplifier 2 includes two amplifiers 21 and 22 for amplifying the differential signal output from the first balun 3. The amplifiers 21 and 22 may be formed of bipolar transistors, for example, or may be formed of FETs, for example. When the amplifiers 21 and 22 are formed of bipolar transistors, an HBT is illustrated, for example. The present disclosure is not limited by the structure of the amplifiers 21, 22.

The input side winding 41 and the output side winding 42 of the second balun 4 are electromagnetically coupled. Thereby, the balanced output signal output from the differential amplifier 2 is subjected to the balun conversion by the second balun transformer 4.

A balanced output signal, which is an output of the second balun 4, is input to the input terminal 51b of the first switch circuit 5.

The first switch circuit 5 switches and outputs the unbalanced output signal of the single-ended amplifier 1 and the unbalanced output signal of the second balun 4. Specifically, the first switch circuit 5 electrically connects the input terminal 51A and the output terminal 52 in the first mode (see fig. 1A), and electrically connects the input terminal 51B and the output terminal 52 in the second mode (see fig. 1B).

With the configuration of embodiment 1 described above, a power amplifier circuit capable of switching between an amplification operation in the first mode at a relatively low first gain (low gain) and an amplification operation in the second mode at a relatively high second gain (high gain) can be realized with a simple configuration.

Fig. 2A is a diagram showing an equivalent circuit of the first balun in the first mode of the power amplification circuit of embodiment 1. Fig. 2B is a diagram showing an equivalent circuit of the first balun in the first mode of the power amplification circuit of the comparative example of embodiment 1. Fig. 3 is a diagram showing an example of a simulation result of the frequency-gain characteristic in the first mode of the power amplifier circuit of embodiment 1. In fig. 3, a solid line shows a simulation result in the first mode of the power amplification circuit of embodiment 1, and a broken line shows a simulation result in the first mode of the power amplification circuit of the comparative example of embodiment 1 shown in fig. 2B.

In the comparative example shown in fig. 2B, a series resonant circuit is formed by the capacitor C1 (first capacitor) and the inductance elements L1 and L3. As a result, as shown by the broken line in fig. 3, the resonance frequency of the series resonant circuit including the capacitor C1 and the inductance elements L1 and L3 may decrease in the transmission frequency band (in the example shown in fig. 3, around 2 GHz).

In the present embodiment, as described above, the following method is adopted: the second switching circuit 6 is provided at the other end of the input side winding 31 of the first balun 3, and in the case of the first mode, the input side winding 31 of the first balun 3 is separated from the reference potential. As a result, as shown by the solid line in fig. 3, in the amplification operation at the relatively low first gain (low gain) in the first mode, the drop in the transmission band as shown by the broken line in fig. 3 in the comparative example can be prevented.

(embodiment mode 2)

Fig. 4A and 4B are diagrams illustrating a configuration example of a power amplifier circuit according to embodiment 2. Fig. 4A shows a state in the case of the first mode, and fig. 4B shows a state in the case of the second mode. The same components as those in embodiment 1 are denoted by the same reference numerals, and description thereof is omitted.

Fig. 5 is a diagram showing an equivalent circuit of the first balun in the first mode of the power amplification circuit of embodiment 2. Fig. 6 is a diagram showing an example of a simulation result of the frequency-gain characteristic in the first mode of the power amplifier circuit of embodiment 2. In fig. 6, a solid line shows a simulation result in the first mode of the power amplification circuit of embodiment 2, and a broken line shows a simulation result in the first mode of the power amplification circuit of the comparative example of embodiment 1 shown in fig. 2B.

As shown in fig. 4A and 4B, the power amplifier circuit 100a according to embodiment 2 has the following configuration: the single-ended amplifier 1 is connected to one end of the input-side winding 31 of the first balun 3, and supplies a first power supply voltage Vcc1 to the other end of the input-side winding 31. Thus, as shown in fig. 5, the series resonant circuit described in the comparative example of embodiment 1 is not configured. As a result, as shown by the solid line in fig. 6, the drop of the comparative example shown by the broken line in fig. 6 does not occur in the transmission band (around 2 GHz in the example shown in fig. 6).

Fig. 7 is a diagram showing a simulation result of the frequency-gain characteristic in the second mode of the power amplification circuit of embodiment 2. In fig. 7, a solid line shows a simulation result in the second mode of the power amplification circuit of embodiment 2, and a broken line shows a simulation result in the second mode of the power amplification circuit of embodiment 1.

In the second mode, as shown by the solid line in fig. 7, good gain characteristics similar to those of the configuration of embodiment 1 shown by the broken line in fig. 7 can be obtained.

With the configuration of embodiment 2 described above, a power amplifier circuit capable of switching between an amplification operation in the first mode at a relatively low first gain (low gain) and an amplification operation in the second mode at a relatively high second gain (high gain) can be realized with a simpler configuration.

(embodiment mode 3)

Fig. 8A and 8B are diagrams illustrating a configuration example of a power amplifier circuit according to embodiment 3. Fig. 8A shows a state in the case of the first mode, and fig. 8B shows a state in the case of the second mode. The same components as those in embodiment 2 are denoted by the same reference numerals, and description thereof is omitted.

In the power amplifier circuit 100B of embodiment 3, as shown in fig. 8A and 8B, the first switch circuit 5a is a Single Pole Single Thread (SPST) type. Specifically, in the first mode, the unbalanced output path of the single-ended amplifier 1 and the unbalanced output path of the second balun 4 are short-circuited. Thus, in the amplification operation with the relatively high second gain (high gain) in the second mode, an increase in the current consumption due to the power loss in the switching circuit can be suppressed.

(embodiment mode 4)

Fig. 9A and 9B are diagrams illustrating a configuration example of a power amplifier circuit according to embodiment 4. Fig. 9A shows a state in the case of the first mode, and fig. 9B shows a state in the case of the second mode. The same components as those in embodiment 3 are denoted by the same reference numerals, and description thereof is omitted.

In the power amplification circuit 100C according to embodiment 4, as shown in fig. 9A and 9B, a capacitor C2 (second capacitor) is provided in the unbalanced output path of the second balun 4. Specifically, one end of the capacitor C2 is connected to one end of the output side winding 42 of the second balun 4, and the other end of the capacitor C2 is connected to one end of the first switch circuit 5 a.

Fig. 10 is a diagram showing an equivalent circuit of the second balun in the first mode of the power amplification circuit of embodiment 4. Fig. 11 is a diagram showing an equivalent circuit of a second balun in the first mode of the power amplification circuit of the comparative example of embodiment 4. Fig. 12 is a diagram showing an example of a simulation result of the frequency-gain characteristic in the first mode of the power amplifier circuit of embodiment 4. In fig. 12, a solid line shows a simulation result in the first mode of the power amplification circuit of embodiment 4, and a broken line shows a simulation result in the first mode of the power amplification circuit of the comparative example of embodiment 4 shown in fig. 11.

In the comparative example shown in fig. 11, a series resonant circuit is formed by the capacitor Cb1 and the inductance elements L4 and L5. As a result, as shown by the broken line in fig. 12, the resonance frequency of the series resonant circuit including the capacitor Cb1 and the inductance elements L4 and L5 may decrease in the transmission frequency band (in the example shown in fig. 11, around 2 GHz).

In the present embodiment, by providing the capacitor C2 in the unbalanced output path of the second balun 4, the resonance frequency of the series resonant circuit can be shifted from the transmission band as shown by the solid line in fig. 12. Thus, in the amplification operation with the relatively low first gain (low gain) in the first mode, the frequency of the drop in the gain characteristic can be made out of the transmission band.

(embodiment 5)

Fig. 13 is a diagram showing a configuration example of a power amplifier circuit according to embodiment 5. The same components as those in embodiment 2 are denoted by the same reference numerals, and description thereof is omitted.

As shown in fig. 13, the power amplifier circuit 100d according to embodiment 5 includes a matching circuit 7, matching circuits 8a and 8b, a third switching circuit 9, and matching circuits 10a, 10b, and 10c in addition to the configuration of embodiment 2.

The third switch circuit 9 switches the output of the first switch circuit 5 to any one of the plurality of output paths and outputs the switched output.

A matching circuit 8a is connected to the input terminal 51a of the first switch circuit 5. A matching circuit 8b is connected to the input terminal 51b of the first switch circuit 5.

The matching circuit 8a is provided in the unbalanced output path of the single-ended amplifier 1. The matching circuit 8a is configured to match the impedance between the output of the single-ended amplifier 1 and the input terminal 51a of the first switch circuit 5. The matching circuit 8a is configured as a part of a matching circuit for matching impedance between the output of the single-ended amplifier 1 and the input terminal 51a of the first switch circuit 5.

The matching circuit 8b is provided in the unbalanced output path of the second balun transformer 4. The matching circuit 8b is configured to match the impedance between the output of the second balun 4 and the input terminal 51b of the first switching circuit 5. The matching circuit 8b is configured as a part of a matching circuit for matching the impedance between the output of the second balun 4 and the input terminal 51b of the first switching circuit 5.

A matching circuit 10a is connected to the output terminal 92a of the third switch circuit 9. A matching circuit 10b is connected to the output terminal 92b of the third switch circuit 9. A matching circuit 10c is connected to the output terminal 92c of the third switch circuit 9.

The matching circuits 10a, 10b, and 10c are configured to match impedances between the output terminals 92a, 92b, and 92c of the third switch circuit 9 and the outside connected through the output paths, respectively.

A matching circuit 7 is connected between the output terminal 52 of the first switch circuit 5 and the input terminal 91 of the third switch circuit 9.

The matching circuit 7 is configured to match the impedance between the output terminal 52 of the first switch circuit 5 and the input terminal 91 of the third switch circuit 9. The matching circuit 7 matches the impedance between the unbalanced output of the single-ended amplifier 1 or the unbalanced output of the second balun 4 and the input terminal 91 of the third switching circuit 9 by a combination of the matching circuit 8a or the matching circuit 8 b.

The matching circuit 7 can include a matching element provided in common in impedance matching of the matching circuit 8a and impedance matching of the matching circuit 8 b. For example, in the impedance matching of the matching circuit 8a, an inductance element is connected to the unbalanced output path of the single-ended amplifier 1 and used for impedance adjustment. This inductance element is sometimes used for impedance matching of the matching circuit 8 b. In this case, the matching circuit 8a and the matching circuit 8b are not provided with the inductance element, and the matching circuit 7 is provided with the inductance element corresponding to the inductance element, thereby making it possible to share the matching elements. The matching element to be shared may be a capacitor instead of an inductance element. By sharing the matching element, the circuit area required for matching can be reduced.

The matching circuit 7 can include matching elements provided in common in impedance matching of the matching circuit 10a, impedance matching of the matching circuit 10b, and impedance matching of the matching circuit 10 c. That is, as in the case of the above-described example, the matching element can be shared, and the circuit area can be reduced.

(embodiment mode 6)

Fig. 14 is a diagram showing a configuration example of a power amplifier circuit according to embodiment 6. The same components as those in embodiment 5 are denoted by the same reference numerals, and description thereof is omitted.

As shown in fig. 14, the power amplifier circuit 100e according to embodiment 6 includes a variable matching circuit 7a instead of the matching circuit 7 according to embodiment 5.

As an example of the variable element, the variable matching circuit 7a has, for example, a variable Capacitor (Digital Tunable Capacitor: DTC). The variable capacitor is a capacitor capable of changing a capacitance value based on a control signal input from the outside. The variable capacitor may be a variable element (variable resistor, variable phase shifter, variable inductor) as well as the variable capacitor. Since the variable matching circuit 7a has a variable element, characteristics at the time of impedance matching can be adjusted.

The variable matching circuit 7a is configured to match impedance with the outside connected through the output path, for example, by adjusting the capacitance value of the variable capacitor. When the variable element is not an element for adjusting a capacitance value such as a variable capacitor, characteristics at the time of impedance matching can be adjusted by adjusting a parameter of the variable element.

By using the variable matching circuit 7a, the matching circuits 10a, 10b, and 10c of embodiment 5 do not need to be used, and therefore, the circuit area required for matching can be further reduced. Further, by optimizing the matching, the impedance can be optimized in accordance with the mode of the first mode or the second mode, and the current consumption can be reduced.

The above-described embodiments are intended to facilitate understanding of the present invention, and are not intended to limit the present invention. The present invention can be modified and improved without departing from the scope of the invention, and equivalents thereof are also included in the present invention.

In addition, the present disclosure can also adopt the following configuration.

(1) A power amplification circuit according to one aspect of the present invention includes: a single-ended amplifier that operates in a first mode and in a second mode different from the first mode; a differential amplifier that operates in the second mode; a first balun that converts an unbalanced output signal of the single-ended amplifier into a differential signal and outputs the differential signal to the differential amplifier; a second balun that converts a balanced output signal of the differential amplifier into an unbalanced output signal; and a first switching circuit that outputs an unbalanced output signal of the single-ended amplifier in the first mode, and outputs an unbalanced output signal of the second balun in the second mode.

In this configuration, a power amplifier circuit capable of switching between an amplification operation in the first mode at a relatively low first gain (low gain) and an amplification operation in the second mode at a relatively high second gain (high gain) can be realized with a simple configuration.

(2) The power amplifier circuit of the above (1) includes: a first capacitor disposed between the single-ended amplifier and one end of an input side winding of the first balun; and a second switching circuit that connects the other end of the input side winding of the first balun to a reference potential in the case of the second mode.

In this configuration, in the first mode, the transmission band of the power amplifying circuit can be free from a drop.

(3) In the power amplification circuit according to the above (1), the single-ended amplifier is connected to one end of the input-side winding of the first balun, and a power supply voltage of the single-ended amplifier is supplied to the other end of the input-side winding of the first balun.

In this configuration, a power amplifier circuit capable of switching between an amplification operation in the first mode at a relatively low first gain (low gain) and an amplification operation in the second mode at a relatively high second gain (high gain) can be realized with a simpler configuration.

(4) In the power amplification circuit according to the above (2) or (3), the first switch circuit may switch between an unbalanced output signal of the single-ended amplifier and an unbalanced output signal of the second balun so as to output the signals

(5) In the power amplification circuit of the above (2) or (3), the first switch circuit may short-circuit an unbalanced output path of the single-ended amplifier and an unbalanced output path of the second balun in the first mode.

In this configuration, in the amplification operation in the second mode at the relatively high second gain (high gain), a decrease in gain due to power loss in the switching circuit can be suppressed.

(6) In the power amplification circuit according to the above (5), a second capacitor is provided in the unbalanced output path of the second balun, one end of the second capacitor is connected to one end of the output side winding of the second balun, and the other end of the second capacitor is connected to one end of the first switching circuit.

In this configuration, the frequency of the drop in gain characteristic in the first mode can be made out of the transmission band.

(7) The power amplifier circuit of the above (4) includes: a third switch circuit that switches an output of the first switch circuit to any one of a plurality of output paths and outputs the switched output; and a matching circuit provided between the first switching circuit and the third switching circuit.

In this configuration, the matching element can be shared, and the circuit area can be reduced.

(8) In the power amplifying circuit of the above (7), the matching circuit is a variable matching circuit capable of adjusting characteristics.

In this structure, the circuit area required for matching can be further reduced. Further, by optimizing the matching, the impedance can be optimized in accordance with the mode of the first mode or the second mode, and the current consumption can be reduced.

According to the present disclosure, a power amplifier circuit capable of switching gain can be obtained with a simple configuration.