阅读说明：本技术 一种具有低耦合插损的硅光芯片耦合结构及硅基晶圆 (Silicon optical chip coupling structure with low coupling insertion loss and silicon-based wafer ) 是由 胡朝阳 孙旭 陈晓刚 汪军平 林天营 于 2021-04-20 设计创作，主要内容包括：本发明提供一种具有低耦合插损的硅光芯片耦合结构及硅基晶圆,硅基晶圆上设有多个硅光芯片,该耦合结构应用于硅光芯片与单模光纤或者激光光源芯片之间的耦合,将小尺寸硅透镜或者硅透镜阵列无源贴片至硅光芯片的透镜刻槽中,来实现与单模光纤或者激光器芯片的高效率的自动化对准封装,具有高效率、低成本的特点。(The invention provides a silicon optical chip coupling structure with low coupling insertion loss and a silicon-based wafer, wherein a plurality of silicon optical chips are arranged on the silicon-based wafer, the coupling structure is applied to coupling between the silicon optical chips and a single-mode optical fiber or a laser light source chip, and small-size silicon lenses or silicon lens arrays are passively pasted in lens grooves of the silicon optical chips to realize efficient automatic alignment packaging with the single-mode optical fiber or the laser chip, and the silicon optical chip coupling structure has the characteristics of high efficiency and low cost.)

1. A silicon optical chip coupling structure with low coupling insertion loss is characterized in that: the silicon optical chip comprises a functional area, a coupling area is arranged on the periphery of the functional area, a silicon optical waveguide coupled with the functional area is arranged on the coupling area, a functional element notch groove used for placing at least one functional element is formed in the coupling area on the outer side of the silicon optical waveguide, at least one lens notch groove is formed in the coupling area between the silicon optical waveguide and the functional element notch groove, a silicon lens or a silicon lens array is arranged in the lens notch groove, and the silicon optical waveguide is coupled with the functional element through the silicon lens or the silicon lens array.

2. The silicon optical chip coupling structure with low coupling insertion loss of claim 1, wherein: the functional element comprises a single-mode optical fiber, the number of the lens notches is one, and the functional element notches are V-shaped notches matched with the shape of the single-mode optical fiber.

3. A silicon optical chip coupling structure with low coupling insertion loss as defined in claim 1 or 2, wherein: the functional element comprises a light source chip, the number of the lens notches is two, an isolator notch is arranged on a coupling area between the two lens notches, and an isolator used for preventing reflected light from influencing the internal light emitting performance of the laser of the light source chip is arranged in the isolator notch.

4. The silicon optical chip coupling structure with low coupling insertion loss of claim 1, wherein: the lens groove is a deep groove, and the depth of the deep groove is 10-200 microns.

5. The silicon optical chip coupling structure with low coupling insertion loss of claim 4, wherein: and an alignment guide groove is reserved in the deep groove and is used for passive alignment of the silicon lens or the silicon lens array and the silicon optical chip.

6. The silicon optical chip coupling structure with low coupling insertion loss of claim 1, wherein: the silicon lens or the silicon lens array is fixed in the lens notch groove through an oxygen plasma oxidation mode or light path glue.

7. A silicon-based wafer, comprising: the wafer comprises a wafer substrate, wherein a plurality of silicon optical chips arranged in an array are arranged on the wafer substrate, and the coupling structure of any one of claims 1 to 5 is arranged on each silicon optical chip.

8. A silicon optical chip coupling structure with low coupling insertion loss is characterized in that: the silicon optical chip is arranged on the silicon substrate, a functional element notch groove used for placing at least one functional element is formed in the silicon substrate on the periphery of the silicon optical chip, at least one lens notch groove is formed in the silicon substrate between the silicon optical chip and the functional element notch groove, a silicon lens or a silicon lens array is arranged in the lens notch groove, and coupling of a silicon optical waveguide and the functional element in the silicon optical chip is achieved through the silicon lens or the silicon lens array.

9. The silicon optical chip coupling structure with low coupling insertion loss of claim 8, wherein: the functional element is a single-mode fiber, the lens notch is one, and the functional element notch is a V-shaped notch matched with the single-mode fiber in shape.

10. The silicon optical chip coupling structure with low coupling insertion loss of claim 8, wherein: the functional element is a light source chip, the number of the lens notches is two, an isolator notch is arranged on a coupling area between the two lens notches, and an isolator used for preventing reflected light from influencing the light emitting performance of the interior of the laser of the light source chip is arranged in the isolator notch.

Technical Field

The invention relates to the technical field of semiconductors, in particular to a silicon optical chip coupling structure with low coupling insertion loss and a silicon-based wafer.

Background

With the vigorous construction of cloud computing, mobile internet, data centers, and the like, the global market has urgent and direct demands for bandwidth and broadband networks. Currently, optical communication networks are developing towards the direction of integration, low power consumption, intellectualization and large capacity, and the silicon optical technology in the high-speed optical chip has the advantages of low cost, high integration degree, large bandwidth and the like, can meet the requirements of continuously increasing data services, network resources and the like, and is one of the main technologies actively laid out and researched by various global manufacturers. However, the coupling of the silicon optical chip with the single-mode fiber has problems of large coupling insertion loss, high alignment accuracy requirement, and the like due to the small size of the spot size of the silicon optical chip, and is one of the major bottlenecks that limit the industrial development of the silicon optical technology. How to find a low-cost, wafer-level coupling method has become a critical issue for manufacturers of silicon optical chips/devices/products.

Manufacturers of current layout silicon photonics are researching efficient coupling schemes, which in summary include the following two main approaches:

(1) grating vertical coupling

The grating coupler on the silicon optical chip is a device for converting light transmitted along the horizontal waveguide direction into light transmitted along the vertical direction, and has the function of spot size conversion, so that the light can be coupled in the vertical direction through a single-mode optical fiber or an optical fiber array. The mode has low requirement on alignment precision and is convenient for batch coupling. But the disadvantages are also obvious, such as strong wavelength dependence, large coupling insertion loss, large polarization dependence and the like.

(2) End face horizontal coupling

The spot converter is designed on the end face, and usually, the spot in the silicon optical waveguide is expanded in a mode of silicon optical tapered waveguide, cantilever beam waveguide, double-layer waveguide and the like, so that the spot is matched with the spot in the single-mode optical fiber, and the coupling insertion loss is reduced. The method has the advantages of low coupling insertion loss, small polarization correlation and the like, but has higher alignment precision requirement and higher requirement on batch production, so that the yield of batch production devices is lower and the cost is higher.

It can be seen that the end-face horizontal coupling mode is more advantageous in systems sensitive to wavelength and polarization requirements than the vertical coupling. How to match the size of the silicon optical mode spot with the size of the single-mode optical fiber mode spot is the key point of optimization, and the current industry mainly has the following two modes:

one method is to design a spot size converter inside the silicon optical chip to enlarge the spot size of the silicon optical waveguide, for example: inverted cone waveguides, cantilever beam waveguides, and the like. As shown in fig. 1, the silicon optical chip includes a functional region 1 and a coupling region 2 inside, the coupling region 2 is provided with a silicon optical spot converter 12, a single-mode fiber 7 is horizontally coupled with the silicon optical spot converter 12, and an optical field can be expanded from original <1 μm to about 4-8 μm after passing through the silicon optical spot converter 12, and is close to a mode field (~ 9 μm) of the single-mode fiber 7. However, the technical design and processing difficulty is high, and the mode field conversion span is large, so that the mode field of the single-mode optical fiber is difficult to be completely matched.

Because the difficulty in realizing complete spot matching inside the silicon optical chip is high, spot matching is generally carried out through an external small spot optical fiber or a spot converter. The small-mode-spot optical fiber is a special optical fiber, and the mode field diameter can be customized within the range of 3-8 mu m; the spot size converter is a waveguide chip made of low refractive index materials such as glass or SiN, the size of the rear end of the waveguide chip is basically the same as that of a single mode fiber, the size of the front end of the waveguide chip is gradually the same as that of a silicon waveguide, as shown in fig. 2, a PLC (Planar Lightwave Circuit, PLC for short) is added outside the silicon optical chip, and a SiO (silicon oxide) chip is processed by the PLC₂The waveguide 13 realizes the coupling of the single mode fiber 7 and the silicon optical mode spot converter 12 of the silicon optical chip coupling area 2; in this way, mode matching of the single mode optical fibre 7 with the silicon optical waveguide 3 can be achieved. But requires additional spot conversion chips at a cost in size and cost. Meanwhile, the size of the spot at the coupling position of the silicon optical waveguide is small, so that the coupling precision requirement is high, and the method is not friendly to batch automatic production.

In view of the above situation, the present invention aims to provide a low insertion loss and easy-to-package silicon optical waveguide coupling method.

Disclosure of Invention

The technical problem to be solved by the invention is as follows: in order to overcome the defects in the prior art, the invention provides a silicon optical chip coupling structure with low coupling insertion loss and a silicon-based wafer, which are applied to coupling between a silicon optical chip and a single-mode fiber or a laser light source chip, and realize high-efficiency automatic alignment packaging with the single-mode fiber or the laser chip by passively mounting a small-size silicon lens or a silicon lens array into a lens notch of the silicon optical chip.

The technical scheme adopted for solving the technical problems is as follows: the utility model provides a silicon optical chip coupling structure with low coupling is inserted and is decreased, includes silicon optical chip, silicon optical chip includes the functional area, the functional area periphery is equipped with the coupling district, be equipped with the silicon optical waveguide with the functional area coupling in the coupling district, be equipped with the functional element etching groove that is used for placing at least one functional element in the coupling district in the silicon optical waveguide outside, be equipped with at least one lens etching groove in the coupling district between silicon optical waveguide and the functional element etching groove, the lens etching groove has the guide effect, be equipped with silicon lens or silicon lens array in the lens etching groove, realize silicon optical waveguide and functional element's coupling through silicon lens or silicon lens array. A single silicon lens is used for the single-channel coupling case, and a silicon lens array is composed of a plurality of silicon lenses and is used for the multi-channel coupling case.

There are many functional elements, including but not limited to single-mode fiber, light source chip (i.e. laser chip), etc., and the coupling of two or more functional elements can also be realized simultaneously.

When the functional element is a single-mode fiber, coupling between the single-mode fiber and the silicon optical waveguide can be realized by adopting one silicon lens or one silicon lens array, so that one lens notch is used for fixing the silicon lens or the silicon lens array, and the functional element notch is a V-shaped notch matched with the single-mode fiber in shape.

When the functional element is a light source chip, the light source needs to be collimated and then converged, and an isolator needs to be placed in the middle, so a double-lens scheme is needed, at the moment, two lens notches are arranged, one is close to the silicon optical waveguide and the other is close to the light source chip, an isolator notch is arranged on a coupling area between the two lens notches, and an isolator used for preventing reflected light from influencing the internal light emitting performance of the laser of the light source chip is arranged in the isolator notch. The isolator is arranged to avoid the problem that the coupling end face has reflection, so that the reflected light is prevented from entering the interior of the laser of the light source chip again to influence the luminescence property.

The deep etching is relative to the shallow etching, and the etching of some waveguide structures in the common chip processing adopts dry etching, the depth of the etching does not exceed 2 microns, and the etching belongs to the shallow etching; the deep etching is generally wet etching with the depth of 10-200 microns. The diameter of the silicon lens is generally 200-500 micrometers, so that in order to meet the installation requirement of the silicon lens, the lens groove is a deep groove formed by deep etching, and the depth of the deep groove is 10-200 micrometers.

Furthermore, an alignment guide groove is reserved in the deep groove and used for passive alignment of the silicon lens or the silicon lens array and the silicon optical chip.

Specifically, the silicon lens or the silicon lens array is fixed in the lens notch groove by an oxygen plasma oxidation mode or light path glue. Wherein, the mode of oxygen plasma oxidation realizes fixedly specifically: oxidizing the surfaces of the silicon micro-lens or the silicon lens array and the lens groove by oxygen plasma, forming an oxide film between the contact surfaces of the silicon micro-lens or the silicon lens array and the lens groove, and connecting and fixing the silicon micro-lens or the silicon lens array and the lens groove

A silicon-based wafer, comprising: the wafer comprises a wafer substrate, wherein a plurality of silicon optical chips arranged in an array are arranged on the wafer substrate, and the coupling structure is arranged on the silicon optical chips. During manufacturing, a silicon substrate is manufactured on a wafer, and then a silicon optical chip, a silicon lens or a silicon lens array and a functional chip are attached.

The utility model provides a silicon optical chip coupling structure with low coupling is inserted and is decreased, includes silicon optical chip and silicon-based base plate, silicon optical chip sets up on silicon-based base plate, be equipped with the functional element inslot that is used for placing at least one functional element on the silicon-based base plate of silicon optical chip outlying, be equipped with at least one lens inslot on the silicon-based base plate between silicon optical chip and the functional element inslot, be equipped with silicon lens or silicon lens array in the lens inslot, realize the coupling of inside silicon optical waveguide of silicon optical chip and functional element through silicon lens or silicon lens array.

Specifically, the functional element is a single-mode fiber, the lens notch is one, and the functional element notch is a V-shaped notch matched with the single-mode fiber in shape.

Specifically, the functional element is a light source chip, the number of the lens notches is two, an isolator notch is arranged on a coupling area between the two lens notches, and an isolator used for preventing reflected light from influencing the internal light emitting performance of the laser of the light source chip is arranged in the isolator notch.

The invention has the beneficial effects that: the silicon optical chip coupling structure with low coupling insertion loss and the silicon-based wafer realize a coupling mode with low cost and high efficiency by combining the silicon lens or the silicon lens array with the silicon optical chip.

Drawings

The invention is further illustrated by the following figures and examples.

Fig. 1 is a schematic structural diagram of a prior art silicon optical waveguide spot-size converter.

FIG. 2 is a prior art SiO solid solution passing through a PLC₂The structure of the mode spot conversion realized by the waveguide is shown schematically.

Fig. 3 is a schematic diagram of a coupling structure according to the first embodiment.

Fig. 4 is a schematic diagram of a coupling structure according to the second embodiment.

FIG. 5 is a schematic structural diagram of a silicon-based wafer according to a third embodiment.

Fig. 6 is a schematic diagram of a coupling structure of a single silicon optical chip on the silicon-based wafer of fig. 5.

Fig. 7 is a schematic diagram of a coupling structure according to the fourth embodiment.

In the figure: 1. functional area, 2, coupling area, 3, silicon optical waveguide, 4, lens notch, 41, first lens notch, 42, second lens notch, 51, light source chip notch, 52, isolator notch, 53, V-shaped notch, 61, silicon lens array, 62, first silicon lens, 63, second silicon lens, 64, isolator, 65, electrode, 7, single-mode fiber, 8, glass cover plate, 9, silicon-based wafer, 91, wafer base, 92, silicon optical chip, 10, silicon-based substrate101, silicon photochip grooving, 11, light source chip, 12, silicon optical mode spot converter, 13, SiO₂A waveguide.

Detailed Description

The present invention will now be described in detail with reference to the accompanying drawings. This figure is a simplified schematic diagram, and merely illustrates the basic structure of the present invention in a schematic manner, and therefore it shows only the constitution related to the present invention.

The coupling structure of the present invention utilizes a miniaturized silicon lens or silicon lens array 61 to realize the coupling of the functional element with low insertion loss and easy packaging and the silicon optical waveguide 3 by a single chip processing mode or a hybrid integration mode, and the following provides a description of specific implementation modes of different embodiments.

The first embodiment is as follows:

as shown in fig. 3, a silicon optical chip coupling structure with low coupling insertion loss according to the present invention is integrated inside a silicon optical chip, and implements multi-channel coupling between a single-mode optical fiber 7 and the silicon optical chip, so that a silicon lens array 61 is used.

The silicon optical chip comprises a functional area 1 and a coupling area 2 which are connected with each other inside, wherein the coupling area 2 is positioned on one side of the functional area 1, and the functional area 1 is used for realizing the functions of the silicon optical chip, such as modulation, receiving, a filter and the like; the coupling region 2 is used for coupling the silicon optical waveguide 3 or the silicon optical mode spot converter 12 with an external single-mode optical fiber 7, and the coupling structure is arranged in the coupling region 2 of the silicon optical chip.

The preparation process comprises the following steps:

firstly, a lens notch 4 for fixing and a functional element notch 53 for fixing the single-mode fiber 7 are etched in sequence in the coupling region 2 outside the silicon optical waveguide 3, the functional element notch is a deep notch and is in a V-shaped notch 53, and an alignment guide groove is reserved in the deep notch for passive alignment of the silicon lens and the silicon optical chip.

Then, the silicon lens array 61 is placed in a deep groove using oxygen plasma (O)₂Plasma) oxidation or optical path glue fixation (solid arrows in the figure indicate O)₂Plasma oxidation or optical path glue fixation, hollow arrow indicates the process encapsulation circulation process)。

Finally, the single mode optical fiber 7 is fixed on the silicon optical chip through the V-shaped notch 53 and is pressed and fixed through the glass cover plate 8.

Thereby achieving aligned coupling of the single mode optical fiber 7 to the silicon optical waveguide 3. In the implementation process, the size of the mode spot of the silicon optical waveguide 3 can be expanded to about 4-5 μm by using a simple inverted cone structure, the size of a silicon lens is generally 200 μm, the alignment tolerance of the silicon lens is large, and passive alignment can be performed by using an alignment guide groove in a deep groove.

Compared with the current scheme of matching with the single-mode optical fiber 7 through the structure of the silicon optical mode spot converter 12, the invention has the advantages that:

(1) the process is simple: multilayer spot conversion structures such as SiN or suspension structures such as cantilever beams are not required to be added;

(2) the reliability is high: the processing technology is simple, and the technical scheme is mature;

(3) wafer-level passive mounting can be performed: the alignment positioning groove can be added at the combination part of the silicon optical chip and the silicon lens, the surface mounting of the silicon lens is completed at a wafer level, the process is simple, and the alignment tolerance is large.

Example two:

as shown in fig. 4, this embodiment is a scheme with a double lens, and the difference from the first embodiment is that the silicon optical chip can also realize coupling with a light source chip 11, which is a second functional element, a coupling structure coupled with the light source chip 11 is further disposed on a coupling region 2 inside the silicon optical chip, the coupling structure includes a first lens notch 41, an isolator notch 52, a second lens notch 42, and a light source chip notch 51, which are sequentially disposed, the light source chip notch 51 is a functional element notch, and a first silicon lens 62, an isolator 64, a second silicon lens 63, and the light source chip 11 are sequentially disposed in the first lens notch 41, the isolator notch 52, the second lens notch 42, and the light source chip notch 51.

The preparation process comprises the following steps:

the manufacturing process is substantially similar to that of the first embodiment, and the first silicon lens 62, the isolator 64, the second silicon lens 63 and the light source chip 11 are fixed by etching the coupling region 2 of the silicon optical chipA lens notch 41, an isolator notch 52, a second lens notch 42 and a light source chip notch 51, wherein the notches are deep notches formed by a deep etching process and are reserved with alignment guide grooves; then, the first silicon lens 62, the isolator 64, the second silicon lens 63, and the light source chip 11 are sequentially placed in the deep groove, respectively, and oxygen plasma (O) is used₂Plasma) oxidation mode or optical path glue.

The size of the spot of the laser light source chip 11 is generally 2-5 μm, so that the coupling alignment can be realized by adopting a silicon lens scheme. By the method, a wafer-level high-precision surface mounting scheme can be realized. Wherein, a corresponding electrode 65 structure can be designed on the silicon optical chip to provide current for the light source chip 11. Compared with the traditional off-chip passive coupling scheme, the scheme has higher alignment precision.

Example three:

the silicon lens or silicon lens array 61 is currently used in mass production for aligning the single-mode optical fiber 7 and the laser light source chip 11 with the silicon optical waveguide 3. Therefore, the solutions of the first and second embodiments can be implemented on the silicon-based wafer 9, and the wafer-level silicon lens arrangement and alignment are realized, and then the dicing and packaging steps are performed.

As shown in fig. 5, a silicon-based wafer 9 includes a wafer substrate 91, a plurality of silicon optical chips 92 arranged in an array are disposed on the wafer substrate 91, and the silicon optical chips 92 have a coupling structure according to the first embodiment or the second embodiment. As shown in fig. 6, the single-mode optical fiber 7 is taken as an example to describe the manufacturing process, during the manufacturing, a silicon substrate is first fabricated on a wafer substrate 91, then a deep etching process in the first embodiment is adopted to etch a corresponding deep trench, and then an automatic chip mounting device is utilized to place a silicon optical chip 92, a silicon lens and the single-mode optical fiber 7 in the deep trench etched in advance, and the deep trench is passed through an O-ring₂Plasma oxidation of a layer of SiO₂A membrane, which fixes the silicon lens and the silicon-based wafer 9. And then carrying out wafer processing such as thinning and scribing to obtain a silicon optical chip 92 with a silicon lens, and then aligning and coupling the single-mode optical fiber 7 and the silicon optical chip 92.

Example four:

as shown in fig. 7, the present embodiment is different from the first and second embodiments in that the coupling structure is disposed outside the silicon optical chip 92 through the silicon-based substrate 10, instead of the coupling region 2 disposed inside the silicon optical chip 92, and other structures and processes are substantially the same as those of the first and second embodiments.

The silicon optical chip comprises a silicon optical chip 92 and a silicon substrate 10, wherein a silicon optical chip notch 101 is formed on the silicon substrate 10 through etching, the silicon optical chip 92 is arranged in the silicon optical chip notch 101 of the silicon substrate 10, a functional element notch for placing at least one functional element is arranged on the silicon substrate 10 on the periphery of the silicon optical chip 92, at least one lens notch 4 is arranged on the silicon substrate 10 between the silicon optical chip 92 and the functional element notch, a silicon lens or a silicon lens array 61 is arranged in the lens notch 4, and the silicon optical waveguide 3 inside the silicon optical chip 92 is coupled with the functional element through the silicon lens or the silicon lens array 61.

In this example, the silicon-based substrate 10 has two functional elements, namely a single-mode fiber 7 and a light source chip 11, so that, for the coupling of the single-mode fiber 7, a lens notch 4 and a V-shaped notch 53 are formed on the silicon-based substrate 10 by etching, and a silicon lens array 61 and the single-mode fiber 7 are respectively placed; for the coupling of the light source chip 11, a first lens notch 41, an isolator notch 52, a second lens notch 42 and a light source chip notch 51 are etched on the silicon substrate 10, and a first silicon lens 62, an isolator 64, a second silicon lens 63 and the light source chip 11 are respectively placed.

The embodiment is suitable for the scheme of mounting the silicon substrate 10 and the silicon optical chip 92, and has more advantages in cost because the silicon optical chip 92 with higher cost does not need to waste the wafer area of the silicon optical chip 92 and perform some deep grooving and other treatments. However, dicing and assembling are required, and mounting on the wafer cannot be performed, so that the assembly cost is high. The specific operation method is basically consistent with the previous application examples.

In light of the foregoing description of preferred embodiments in accordance with the invention, it is to be understood that numerous changes and modifications may be made by those skilled in the art without departing from the scope of the invention. The technical scope of the present invention is not limited to the contents of the specification, and must be determined according to the scope of the claims.