阅读说明：本技术 螺栓松动监控装置及方法、计算机可存储介质 (Bolt looseness monitoring device and method and computer-storable medium ) 是由 徐迅驰 江海 范钧 吴程赟 韩菊龙 于 2019-11-22 设计创作，主要内容包括：本公开涉及螺栓松动监控装置及方法、计算机可存储介质。螺栓松动监控装置包括：LC谐振电路,被配置为根据频率为LC谐振电路的特征频率的电流信号生成当前电压幅值信号,LC谐振电路包括平行板电容器,平行板电容器包括相对设置的第一电容极板和第二电容极板,第一电容极板包括至少一个第一扇弧形极板,第二电容极板包括至少一个第二扇弧形极板,第一扇弧形极板和第二扇弧形极板一一对应,且每一对第一扇弧形极板与第二扇弧形极板的圆心角相同,在螺栓未松动的情况下,第一扇弧形极板在第二扇弧形极板的投影与第二扇弧形极板的重叠角度等于圆心角；以及数据处理模块,被配置为接收当前电压幅值信号,并根据当前电压幅值信号,判断螺栓是否松动。(The present disclosure relates to bolt loosening monitoring devices and methods, computer-storable media. Bolt looseness monitoring device includes: the LC resonance circuit is configured to generate a current voltage amplitude signal according to a current signal with a frequency which is a characteristic frequency of the LC resonance circuit, the LC resonance circuit comprises a parallel plate capacitor, the parallel plate capacitor comprises a first capacitance polar plate and a second capacitance polar plate which are oppositely arranged, the first capacitance polar plate comprises at least one first sector arc polar plate, the second capacitance polar plate comprises at least one second sector arc polar plate, the first sector arc polar plate and the second sector arc polar plate are in one-to-one correspondence, the central angle of each pair of the first sector arc polar plate and the second sector arc polar plate is the same, and the overlapping angle of the projection of the first sector arc polar plate on the second sector arc polar plate and the second sector arc polar plate is equal to the central angle under the condition that a bolt is not loosened; and the data processing module is configured to receive the current voltage amplitude signal and judge whether the bolt is loosened or not according to the current voltage amplitude signal.)

1. A bolt loosening monitoring device, comprising:

an LC resonance circuit configured to generate a current voltage amplitude signal according to a current signal having a frequency that is a characteristic frequency of the LC resonance circuit, the LC resonance circuit including a parallel plate capacitor including a first capacitor plate and a second capacitor plate that are arranged opposite to each other, a first hole adapted to a bolt head is formed in a center of the first capacitor plate, a second hole capable of passing a screw is formed in a center of the second capacitor plate, the bolt head is fixed in the first hole, the screw is mounted to a fixed structure through the second hole, the second capacitor plate is fixedly mounted to the fixed structure, the first capacitor plate includes at least one first fan-shaped plate, the second capacitor plate includes at least one second fan-shaped plate, wherein the first fan-shaped plate and the second fan-shaped plate correspond to each other, the central angle of each pair of first sector arc-shaped polar plates is the same as that of each pair of second sector arc-shaped polar plates, and the overlapping angle of the projection of the first sector arc-shaped polar plates on the corresponding second sector arc-shaped polar plates and the corresponding second sector arc-shaped polar plates is equal to the central angle of the first sector arc-shaped polar plates under the condition that the bolts are not loosened; and

and the data processing module is configured to receive the current voltage amplitude signal and judge whether the bolt is loosened according to the current voltage amplitude signal.

2. The bolt loosening apparatus of claim 1, wherein the at least one first sector arc plate comprises a plurality of first sector arc plates spaced apart from each other connected in series having the same center and the same radius, and the at least one second sector arc plate comprises a plurality of second sector arc plates spaced apart from each other connected in series having the same center and the same radius.

3. The bolt loosening apparatus of claim 1, wherein the data processing module comprises:

a signal sampling circuit configured to receive the present voltage amplitude signal and sample the present voltage amplitude signal to generate a present voltage amplitude discrete signal;

and the analog-to-digital conversion circuit is configured to receive the current voltage amplitude discrete signal and perform analog-to-digital conversion on the current voltage amplitude discrete signal to generate a current digital code.

4. The bolt loosening apparatus of claim 3, wherein the data processing module further comprises:

a communication unit configured to receive and transmit the current data encoding;

and the monitoring unit is configured to receive the current digital code and judge whether the bolt is loosened according to the current digital code.

5. The bolt loosening apparatus of claim 4, wherein,

the LC resonant circuit is further configured to: under the condition that the bolt is not loosened, generating a standard voltage amplitude signal according to a current signal with the frequency being the characteristic frequency of the LC resonance circuit;

the signal sampling circuit is further configured to: sampling the standard voltage amplitude signal to generate a standard voltage amplitude discrete signal;

the analog-to-digital conversion circuit is further configured to: and performing analog-to-digital conversion on the standard voltage amplitude discrete signal to generate a standard digital code.

6. The bolt loosening apparatus of claim 5, wherein determining whether a bolt is loosened from the current numerical code comprises:

calculating the sum of the current overlapping angles of each pair of the first sector arc-shaped polar plate and the second sector arc-shaped polar plate according to the current digital code, wherein the current overlapping angle is the overlapping angle between the projection of the first sector arc-shaped polar plate on the second sector arc-shaped polar plate and the second sector arc-shaped polar plate;

determining the difference value between the sum of the central angles of the first fan-shaped polar plates and the sum of the current overlapping angles;

and determining the loosening angle of the bolt according to the ratio of the difference value to the number of the first sector arc-shaped polar plates.

7. The bolt loosening apparatus of claim 4, wherein calculating the sum of the current overlap angles of each pair of first and second scalloped plates based on the digital code comprises:

determining the current peak voltage amplitude according to the peak code in the current digital code;

determining a standard peak voltage amplitude according to a standard peak code in the standard digital code;

determining the current frequency according to the ratio of the current peak voltage amplitude to the standard peak voltage amplitude;

determining a current capacitance value according to the current frequency;

determining the current overlapping area according to the current capacitance value;

and determining the sum of the current overlapping angles according to the current overlapping area.

8. The bolt loosening apparatus of claim 4, wherein determining whether a bolt is loosened from the current numerical code comprises:

and comparing the current digital code with the standard digital code, and under the condition that the current digital code is inconsistent with the standard digital code, loosening the bolt.

9. The bolt loosening apparatus of claim 4, wherein,

the data processing module further comprises a signal source configured to: periodically generating a current signal with the frequency of the characteristic frequency of the LC resonance circuit, and inputting the current signal into the LC resonance circuit;

the communication unit is further configured to: and periodically triggering the signal source to generate a current signal with the frequency of the characteristic frequency of the LC resonance circuit.

10. The bolt loosening apparatus of claim 9, wherein the LC resonant circuit further comprises an inductor, the bolt loosening monitoring apparatus further comprising:

a first package comprising a first electrode, wherein the second capacitive plate, the inductor, the signal sampling circuit, the analog-to-digital conversion circuit, the communication unit, and the signal source are located inside the first package, and the first electrode is connected in series with the second capacitive plate and the signal source, respectively;

and the second packaging piece comprises a second electrode, wherein the second electrode is respectively connected with the first capacitor plate and the inductor in series, and the first capacitor plate is positioned inside the second packaging piece.

11. The bolt loosening apparatus of claim 6, wherein the second electrode connected in series with the inductor comprises:

the second electrode is connected in series with the inductor by a conductive contact.

12. The bolt loosening apparatus of claim 10, wherein the second encapsulation comprises a protective cap fixedly covering the first aperture.

13. The bolt loosening apparatus of claim 12, wherein the second enclosure further comprises a plurality of retaining buttons that secure bolt heads within the first bore.

14. A bolt loosening monitoring method performed by the bolt loosening monitoring apparatus according to any one of claims 1 to 13, comprising:

generating a current voltage amplitude signal according to a current signal with the frequency being the characteristic frequency of the LC resonance circuit;

and judging whether the bolt is loosened or not according to the current voltage amplitude signal.

15. A bolt loosening monitoring device, comprising:

a memory; and

a processor coupled to the memory, the processor configured to execute the bolt loosening monitoring method of claim 14 based on instructions stored in the memory.

16. A computer-storable medium having stored thereon computer program instructions which, when executed by a processor, implement the bolt loosening monitoring method of claim 14.

Technical Field

The disclosure relates to the technical field of communication, in particular to a bolt looseness monitoring device and method and a computer storage medium.

Background

The communication iron tower combines main structural components by bolts, maintains the structural stability, and simultaneously utilizes the bolts to fix the working platform and install the antenna, so the bolt looseness inspection is the main content of the periodic inspection and maintenance of the iron tower. Maintenance personnel need to climb up the iron tower each time, fastening operation is carried out on a large number of bolts one by one, and working strength and operation risk are great. Besides, the bolt is widely applied to mechanical structures such as railway tracks, highway bridges, marine vessels, aviation aircrafts and the like, the reliability of bolt connection determines the stability of the structure, wherein whether the bolt is loosened is a main factor influencing the stability, and the loosening of the bolt can cause serious consequences. Therefore, many bolt loosening detection techniques exist at present.

Related bolt looseness monitoring technology still relies on a large amount of manpowers to carry out marking inspection, and then utilizes bolt looseness detection methods such as pattern recognition, pretightening force detection, nonlinear characteristic monitoring, ultrasonic detection to monitor the bolt one by one, and is inefficient.

Disclosure of Invention

The inventor thinks that: in the related bolt looseness monitoring technology, marking needs to be carried out manually, and the efficiency is low.

To above-mentioned technical problem, this disclosure provides a solution, carries out the monitoring of bolt looseness automatically, has improved the efficiency of bolt looseness monitoring.

According to a first aspect of the present disclosure, there is provided a bolt loosening monitoring device, comprising: an LC resonance circuit configured to generate a current voltage amplitude signal according to a current signal having a frequency that is a characteristic frequency of the LC resonance circuit, the LC resonance circuit including a parallel plate capacitor including a first capacitor plate and a second capacitor plate that are arranged opposite to each other, a first hole adapted to a bolt head is formed in a center of the first capacitor plate, a second hole capable of passing a screw is formed in a center of the second capacitor plate, the bolt head is fixed in the first hole, the screw is mounted to a fixed structure through the second hole, the second capacitor plate is fixedly mounted to the fixed structure, the first capacitor plate includes at least one first fan-shaped plate, the second capacitor plate includes at least one second fan-shaped plate, wherein the first fan-shaped plate and the second fan-shaped plate correspond to each other, the central angle of each pair of first sector arc-shaped polar plates is the same as that of each pair of second sector arc-shaped polar plates, and the overlapping angle of the projection of the first sector arc-shaped polar plates on the corresponding second sector arc-shaped polar plates and the corresponding second sector arc-shaped polar plates is equal to the central angle of the first sector arc-shaped polar plates under the condition that the bolts are not loosened; and the data processing module is configured to receive the current voltage amplitude signal and judge whether the bolt is loosened according to the current voltage amplitude signal.

In some embodiments, the at least one first sector arc plate comprises a plurality of first sector arc plates which are connected in series, have the same circle center and the same radius, and are spaced apart from each other, and the at least one second sector arc plate comprises a plurality of second sector arc plates which are connected in series, have the same circle center and the same radius, and are spaced apart from each other.

In some embodiments, the data processing module comprises: a signal sampling circuit configured to receive the present voltage amplitude signal and sample the present voltage amplitude signal to generate a present voltage amplitude discrete signal; and the analog-to-digital conversion circuit is configured to receive the current voltage amplitude discrete signal and perform analog-to-digital conversion on the current voltage amplitude discrete signal to generate a current digital code.

In some embodiments, the data processing module further comprises: a communication unit configured to receive and transmit the current data encoding; and the monitoring unit is configured to receive the current digital code and judge whether the bolt is loosened according to the current digital code.

In some embodiments, the LC resonant circuit is further configured to: under the condition that the bolt is not loosened, generating a standard voltage amplitude signal according to a current signal with the frequency being the characteristic frequency of the LC resonance circuit; the signal sampling circuit is further configured to: sampling the standard voltage amplitude signal to generate a standard voltage amplitude discrete signal; the analog-to-digital conversion circuit is further configured to: and performing analog-to-digital conversion on the standard voltage amplitude discrete signal to generate a standard digital code.

In some embodiments, determining whether the bolt is loose based on the current numerical code comprises: calculating the sum of the current overlapping angles of each pair of the first sector arc-shaped polar plate and the second sector arc-shaped polar plate according to the current digital code, wherein the current overlapping angle is the overlapping angle between the projection of the first sector arc-shaped polar plate on the second sector arc-shaped polar plate and the second sector arc-shaped polar plate; determining the difference value between the sum of the central angles of the first fan-shaped polar plates and the sum of the current overlapping angles; and determining the loosening angle of the bolt according to the ratio of the difference value to the number of the first sector arc-shaped polar plates.

In some embodiments, calculating a sum of current overlap angles of each pair of first and second sector plates from the digital code comprises: determining the current peak voltage amplitude according to the peak code in the current digital code; determining a standard peak voltage amplitude according to a standard peak code in the standard digital code; determining the current frequency according to the ratio of the current peak voltage amplitude to the standard peak voltage amplitude; determining a current capacitance value according to the current frequency; determining the current overlapping area according to the current capacitance value; and determining the sum of the current overlapping angles according to the current overlapping area.

In some embodiments, determining whether the bolt is loose based on the current numerical code comprises: and comparing the current digital code with the standard digital code, and under the condition that the current digital code is inconsistent with the standard digital code, loosening the bolt.

In some embodiments, the data processing module further comprises a signal source configured to: periodically generating a current signal with the frequency of the characteristic frequency of the LC resonance circuit, and inputting the current signal into the LC resonance circuit; the communication unit is further configured to: and periodically triggering the signal source to generate a current signal with the frequency of the characteristic frequency of the LC resonance circuit.

In some embodiments, the LC resonant circuit further comprises an inductor, and the bolt loosening monitoring device further comprises: a first package comprising a first electrode, wherein the second capacitive plate, the inductor, the signal sampling circuit, the analog-to-digital conversion circuit, the communication unit, and the signal source are located inside the first package, and the first electrode is connected in series with the second capacitive plate and the signal source, respectively; and the second packaging piece comprises a second electrode, wherein the second electrode is respectively connected with the first capacitor plate and the inductor in series, and the first capacitor plate is positioned inside the second packaging piece.

In some embodiments, the second electrode connected in series with the inductor comprises: the second electrode is connected in series with the inductor by a conductive contact.

In some embodiments, the second package includes a protective cap fixedly covering the first hole.

In some embodiments, the second enclosure further includes a plurality of retaining buttons that secure bolt heads within the first aperture.

According to a second aspect of the present disclosure, there is provided a bolt loosening monitoring method, the bolt loosening monitoring apparatus according to any of the above embodiments, including: generating a current voltage amplitude signal according to a current signal with the frequency being the characteristic frequency of the LC resonance circuit; and judging whether the bolt is loosened or not according to the current voltage amplitude signal.

According to a third aspect of the present disclosure, there is provided a bolt loosening monitoring device, comprising: a memory; and a processor coupled to the memory, the processor configured to perform the bolt loosening monitoring method of any of the above embodiments based on instructions stored in the memory.

According to a fourth aspect of the present disclosure, a computer-storable medium having stored thereon computer program instructions which, when executed by a processor, implement the bolt loosening monitoring method according to any of the embodiments described above.

In the embodiment, bolt loosening monitoring is automatically carried out, and the efficiency of bolt loosening monitoring is improved.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the description, serve to explain the principles of the disclosure.

The present disclosure may be more clearly understood from the following detailed description, taken with reference to the accompanying drawings, in which:

FIG. 1 illustrates a block diagram of a bolt loosening monitoring device, according to some embodiments of the present disclosure;

FIG. 2A shows a schematic diagram of a first capacitor plate having a plurality of first scalloped plates according to some embodiments of the present disclosure;

FIG. 2B illustrates a schematic diagram depicting a correspondence between a waveform diagram of a voltage amplitude signal, a waveform diagram of a voltage amplitude discrete signal, and a digital code for different bolt loosening conditions, according to some embodiments of the present disclosure;

FIG. 2C shows a schematic state diagram of a parallel plate capacitor with bolts not loosened according to some embodiments of the present disclosure;

FIG. 2D shows a schematic view of a state of a parallel plate capacitor with loose bolts according to some embodiments of the present disclosure;

FIG. 2E is a schematic view of a state of a parallel plate capacitor with loose bolts according to further embodiments of the present disclosure;

FIG. 2F shows a schematic of the state of a parallel plate capacitor with loose bolts according to still further embodiments of the present disclosure;

FIG. 3 illustrates a block diagram of a data processing module, according to some embodiments of the present disclosure;

FIG. 4 illustrates a schematic view of a bolt loosening monitoring device according to some embodiments of the present disclosure;

FIG. 5 illustrates a schematic circuit diagram of a bolt loosening monitoring device according to some embodiments of the present disclosure;

FIG. 6 illustrates a flow diagram of a bolt loosening monitoring method according to some embodiments of the present disclosure;

FIG. 7 illustrates a block diagram of a bolt loosening monitoring device, according to some embodiments of the present disclosure;

FIG. 8 illustrates a block diagram of a computer system for implementing some embodiments of the present disclosure.

Detailed Description

Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions, and numerical values set forth in these embodiments do not limit the scope of the present disclosure unless specifically stated otherwise.

Meanwhile, it should be understood that the sizes of the respective portions shown in the drawings are not drawn in an actual proportional relationship for the convenience of description.

The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the disclosure, its application, or uses.

Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.

In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.

Fig. 1 illustrates a block diagram of a bolt loosening monitoring device according to some embodiments of the present disclosure.

As shown in fig. 1, the bolt loosening monitoring device 1 includes an LC resonance circuit 11 and a data processing module 12.

The LC resonance circuit 11 is configured to generate a present voltage amplitude signal from a current signal having a frequency that is a characteristic frequency of the LC resonance circuit. In some embodiments, the LC resonant circuit is further configured to generate a standard voltage amplitude signal from a current signal having a frequency that is a characteristic frequency of the LC resonant circuit if the bolt is not loosened.

The LC resonant circuit includes a parallel plate capacitor. The parallel plate capacitor includes a first capacitive plate and a second capacitive plate disposed in opposition. The center of the first capacitor plate is provided with a first hole matched with the bolt head. The center of the second capacitor plate is provided with a second hole which can penetrate through the screw rod. The bolt head is fixed in the first hole, and the screw rod passes the second hole and installs fixed knot structure. The second capacitor plate is fixedly mounted to the fixed structure. The first capacitor plate includes at least one first sector arc plate. The second capacitor plate includes at least one second sector arc plate. The first sector arc-shaped polar plates and the second sector arc-shaped polar plates are in one-to-one correspondence, and the central angles of each pair of first sector arc-shaped polar plates and the second sector arc-shaped polar plates are the same. Under the condition that the bolts are not loosened, the overlapping angle of the projection of the first sector arc-shaped polar plate on the corresponding second sector arc-shaped polar plate and the corresponding second sector arc-shaped polar plate is equal to the central angle of the first sector arc-shaped polar plate. The central angle here is a sector arc-shaped central angle. Under the condition that the bolt is loosened, the bolt drives the first capacitor plate to rotate, and therefore the overlapping area of the first capacitor plate and the second capacitor plate changes. For example, the first arc-shaped polar plate and the second arc-shaped polar plate are both made of aluminum foil or other conductive materials.

In some embodiments, the at least one first sector arc plate comprises a plurality of first sector arc plates connected in series, having the same center and the same radius, spaced apart from each other. The at least one second arc-shaped polar plate comprises a plurality of second arc-shaped polar plates which are connected in series, have the same circle center and the same radius and are spaced from each other.

The structure of the first capacitor plate having a plurality of first sector arc plates will be described in detail below in conjunction with fig. 2A.

Fig. 2A illustrates a schematic diagram of a first capacitor plate having a plurality of first scalloped plates according to some embodiments of the present disclosure.

As shown in fig. 2A, the first capacitor plate 2 includes a plurality of first fan-shaped plates 21, and the plurality of first fan-shaped plates 21 are connected in series by a wire 22. The first sector arc polar plates 21 have the same circle center a and the same radiuses R and R. The plurality of first arc-shaped polar plates 21 are spaced from each other, so that under the condition that the bolts are completely loosened, after the first capacitor polar plates rotate by a certain angle, any one first arc-shaped polar plate cannot form an overlapping area with other second arc-shaped polar plates except the second arc-shaped polar plates which are in one-to-one correspondence with the any one first arc-shaped polar plate. For example, the central angle of all the first arc-shaped polar plates is set to be 30 degrees, and the included angle of the gap between any two first arc-shaped polar plates is 30 degrees. The first capacitor plate 2 is provided with a first hole 23 at its center, which is adapted to the head of the bolt. For example, the first hole is a regular hexagonal hole.

The second capacitor plate having a plurality of second scalloped plates has a similar structure to the first capacitor plate having a plurality of first scalloped plates as shown in fig. 2. For the second capacitor plate, the second hole has no shape limitation, and only a screw rod which can penetrate through the bolt is needed.

The data processing module 12 is configured to receive the current voltage amplitude signal and determine whether the bolt is loose according to the current voltage amplitude signal.

The following will describe in detail the states of a first capacitor plate having a plurality of first fan-shaped plates and a second capacitor plate having a plurality of second fan-shaped plates with different bolts loosened with reference to fig. 2B, 2C, 2D, 2E, and 2F. I.e., the interlocking relationship of the loose bolt and the parallel plate capacitor. Fig. 2C, 2D, 2E, and 2F are schematic diagrams showing the state after the first capacitor plate is projected onto the second capacitor plate. And the central angles of the first arc-shaped polar plates and the second arc-shaped polar plates are the same.

Fig. 2B illustrates a schematic diagram depicting a correspondence between a waveform diagram of a voltage amplitude signal, a waveform diagram of a voltage amplitude discrete signal, and a digital code for different bolt loosening conditions, according to some embodiments of the present disclosure.

As shown in fig. 2B, the first column is a correspondence relationship between a waveform diagram of a voltage amplitude signal output from the LC resonance circuit, a waveform diagram of a voltage amplitude discrete signal, and a digital code in a case where the LC resonance circuit resonates with the bolt in a fastened state. The waveform diagram shown in the first row and the first column is a waveform diagram of a voltage amplitude signal output by the LC resonance circuit, the waveform diagram shown in the second row and the first column is a waveform diagram of a voltage amplitude discrete signal, and the digital code shown in the third row and the first column is a digital code output by the analog-to-digital conversion circuit after performing analog-to-digital conversion on the voltage amplitude discrete signal. The voltage amplitude discrete signals of the present disclosure are discrete time signals of voltage amplitude.

The second column is the corresponding relation of the waveform diagram of the voltage amplitude signal output by the LC resonance circuit, the waveform diagram of the voltage amplitude discrete signal and the digital code under the condition that the bolt starts to loosen and the LC resonance circuit starts to be detuned. The waveform diagram shown in the first row and the second column is a waveform diagram of a voltage amplitude signal output by the LC resonance circuit, the waveform diagram shown in the second row and the second column is a waveform diagram of a voltage amplitude discrete signal, and the digital code shown in the third row and the second column is a digital code output by the analog-to-digital conversion circuit after performing analog-to-digital conversion on the voltage amplitude discrete signal.

And the third column is the corresponding relation between a waveform diagram of a voltage amplitude signal output by the LC resonance circuit, a waveform diagram of a voltage amplitude discrete signal and digital codes under the conditions that the bolt is continuously loosened and the LC resonance circuit is detuned and emphasized. The waveform diagrams shown in the first row and the third column are waveform diagrams of voltage amplitude signals output by the LC resonance circuit, the waveform diagrams shown in the second row and the third column are waveform diagrams of voltage amplitude discrete signals, and the digital codes shown in the third row and the third column are digital codes output by the analog-to-digital conversion circuit after performing analog-to-digital conversion on the voltage amplitude discrete signals.

And the fourth column is the corresponding relation between a waveform diagram of a voltage amplitude signal output by the LC resonance circuit, a waveform diagram of a voltage amplitude discrete signal and digital codes under the condition that the bolt is continuously loosened and the resonance of the LC resonance circuit stops. The waveform diagram shown in the fourth column of the first row is the waveform diagram of the voltage amplitude signal output by the LC resonant circuit, the waveform diagram shown in the fourth column of the second row is the waveform diagram of the voltage amplitude discrete signal, and the digital code shown in the fourth column of the third row is the digital code output by the analog-to-digital conversion circuit after performing the analog-to-digital conversion on the voltage amplitude discrete signal.

Figure 2C illustrates a state diagram of a parallel plate capacitor with bolts not loosened according to some embodiments of the present disclosure.

As shown in fig. 2C, the first arc-shaped plate and the second arc-shaped plate corresponding to the first capacitor plate and the second capacitor plate of the parallel plate capacitor are completely overlapped at an angle θ₀。θ₀Namely the central angle of the first arc-shaped polar plate or the second arc-shaped polar plate.

In this state of the parallel plate capacitor, the bolt is in a fastened state, the LC resonance circuit resonates, and the waveform diagram of the voltage amplitude signal output from the LC resonance circuit is, for example, the waveform diagram shown in the first row and the first column in fig. 2B. The signal sampling circuit samples the voltage amplitude signal, and the waveform diagram of the output voltage amplitude discrete signal is, for example, the waveform diagram shown in the second row and the first column in fig. 2B. The analog-to-digital conversion circuit performs analog-to-digital conversion on the voltage amplitude discrete signal and outputs a digital code, for example, a digital code as shown in the third row and the first column in fig. 2B. The digital code in this state is a standard digital code.

Figure 2D illustrates a state diagram of a parallel plate capacitor with loose bolts according to some embodiments of the present disclosure.

As shown in fig. 2D, the first arc-shaped plate and the second arc-shaped plate corresponding to the first capacitor plate and the second capacitor plate of the parallel plate capacitor partially overlap each other at an angle θ₁，θ₁＜θ₀。

In this state of the parallel plate capacitor, the bolt starts to loosen, the LC resonance circuit starts to detune, and the waveform diagram of the voltage amplitude signal output from the LC resonance circuit is, for example, the waveform diagram shown in the first row and the second column in fig. 2B. The signal sampling circuit samples the voltage amplitude signal, and the waveform diagram of the output voltage amplitude discrete signal is, for example, the waveform diagram shown in the second row and the second column in fig. 2B. The analog-to-digital conversion circuit performs analog-to-digital conversion on the voltage amplitude discrete signal and outputs a digital code, for example, a digital code as shown in the third row and the second column in fig. 2B.

Figure 2E illustrates a schematic view of a state of a parallel plate capacitor with loose bolts according to other embodiments of the present disclosure.

As shown in fig. 2E, the first arc-shaped plate and the second arc-shaped plate corresponding to the first capacitor plate and the second capacitor plate of the parallel plate capacitor partially overlap each other at an angle θ₂，θ₂＜θ₁。

In this state of the parallel plate capacitor, the bolt continues to loosen, the LC resonant circuit becomes detuned and the waveform of the voltage amplitude signal output from the LC resonant circuit is, for example, as shown in the first row and the third column in fig. 2B. The signal sampling circuit samples the voltage amplitude signal, and the waveform diagram of the output voltage amplitude discrete signal is, for example, the waveform diagram shown in the second row and the third column in fig. 2B. The analog-to-digital conversion circuit performs analog-to-digital conversion on the voltage amplitude discrete signal and outputs a digital code, for example, a digital code shown in the third row and the third column in fig. 2B.

Figure 2F illustrates a state diagram of a parallel plate capacitor with loose bolts according to still further embodiments of the present disclosure.

As shown in fig. 2F, the first arc-shaped plate and the second arc-shaped plate corresponding to the first capacitor plate and the second capacitor plate of the parallel plate capacitor partially overlap each other at an angle θ₃，θ₃＜θ₂And theta₃≈0。

In this state of the parallel plate capacitor, the bolt continues to loosen, the LC resonance circuit stops resonating, and the waveform diagram of the voltage amplitude signal output from the LC resonance circuit is, for example, the waveform diagram shown in the fourth column of the first row in fig. 2B. The signal sampling circuit samples the voltage amplitude signal, and the waveform diagram of the output voltage amplitude discrete signal is, for example, the waveform diagram shown in the fourth column of the second row in fig. 2B. The analog-to-digital conversion circuit performs analog-to-digital conversion on the voltage amplitude discrete signal and outputs a digital code, for example, a digital code as shown in the third row and the fourth column in fig. 2B.

As can be seen from fig. 2B, 2C, 2D, 2E, and 2F, when the first arc-shaped pole plate and the second arc-shaped pole plate are completely aligned, the pole plate overlapping angle is the largest, the pole plate overlapping area is the largest, the input signal generates a resonance phenomenon in the LC circuit, and the output signal amplitude is the largest. After the bolt deviates from a preset position, the overlapping angle of the polar plate is reduced, the overlapping area is reduced, the capacitance value is reduced, the characteristic frequency deviates upwards, the frequency of an input signal is unchanged, a loop is gradually detuned, and the output amplitude is reduced. The bolt continuously deviates, the overlapping angle of the polar plates is continuously reduced, and the output amplitude is continuously reduced. And when the bolt continuously deviates until the pole plate overlapping angle is reduced to about 0, the pole plate overlapping area is reduced to 0, the resonance phenomenon stops, and the output amplitude is the lowest.

The loosening process of the bolt is a phenomenon that threads are gradually loosened from tight engagement in a screw hole due to factors such as external force, vibration, temperature and the like, namely the bolt is loosened in the opposite direction of the tensioning action and is represented as angular rotation change between the bolt and the fixing piece body.

One form of the variable capacitor is to adjust the capacitance value by changing the overlapping area of the two polar plates, so that the loosening degree of the bolt structure can be quantitatively judged by measuring the rotation angle of the bolt and converting the change of the capacitance value and the amplitude value of a circuit output signal.

The bolt looseness monitoring device is designed according to standard tolerance of the bolt, is produced in batches according to the requirements of standard parts, can be installed and disassembled after the bolt is installed and fastened, does not influence the structural stability of the bolt in the process, and provides convenience for installation, replacement and maintenance. For example, the current bolt production standard is GB/T5783-.

Through the bolt looseness monitoring device, bolt looseness monitoring is automatically carried out, and the bolt looseness monitoring efficiency is improved. The utility model discloses a device of all-weather control bolt looseness degree combines the low-power consumption of thing networking, high reliable communication characteristic, forms the full-automatic mechanism of patrolling and examining to the bolt structure, can obtain the bolt gradually not hard up until the process that the fixed action became invalid. Furthermore, the bolt loosening monitoring device can also send out maintenance prompt information in time, and safety risks and economic losses caused by bolt loosening are reduced.

The structure of the data processing module 12 of some embodiments of the present disclosure will be described in detail below in conjunction with fig. 3.

Fig. 3 illustrates a block diagram of a data processing module according to some embodiments of the present disclosure.

As shown in fig. 3, the data processing block 12 includes a signal sampling circuit 121 and an analog-to-digital conversion circuit 122.

The signal sampling circuit 121 is configured to receive the present voltage amplitude signal and sample the present voltage amplitude signal to generate a present voltage amplitude discrete signal. In some embodiments, the signal sampling circuit is further configured to sample the standard voltage amplitude signal, generating a standard voltage amplitude discrete signal.

According to the Nyquist principle, when the signal sampling frequency is 2.5-4 times of the signal working frequency, the waveform characteristics of the original signal can be completely recorded, the typical working frequency of the device is 3-12MHZ calculated by engineering, the sampling at the frequency of 30-50MHZ can meet the requirement, the sampling frequency can be adjusted in the range, and the optimal sampling frequency needs to be determined through actual tests due to component parameter combination difference.

The analog-to-digital conversion circuit 122 is configured to receive the present voltage amplitude discrete signal and perform analog-to-digital conversion on the present voltage amplitude discrete signal to generate a present digital code. In some embodiments, the analog-to-digital conversion circuit is further configured to analog-to-digital convert the standard voltage amplitude discrete signal to generate a standard digital code.

In some embodiments, the data processing module 12 further comprises a communication unit 123 and a monitoring unit 124.

The communication unit 123 is configured to receive and transmit the current digital code. In some embodiments, the data processing module further comprises a signal source 125. The signal source 125 is configured to periodically generate a current signal having a frequency that is a characteristic frequency of the LC resonance circuit and input the current signal to the LC resonance circuit. The communication unit 123 is further configured to periodically trigger the signal source to generate a current signal having a frequency that is a characteristic frequency of the LC resonant circuit. For example, the communication unit is an internet of things communication unit.

In some embodiments, the communication unit 123 is further configured to record the time at which the current data encoding was transmitted and transmit it to the monitoring unit 124 along with the current digital encoding.

The monitoring unit 124 is configured to receive the current digital code and determine whether the bolt is loose according to the current digital code. The digital code obtained by analog-to-digital conversion and representing the graphic features is the code containing the control information necessary for digital communication, and the sequence formats are not completely the same, but the sequence received by the communication unit can be restored to the original digital code output by the analog-to-digital conversion circuit.

For example, the monitoring unit 124 is disposed on a computer device, forming a monitoring platform, and performs information interaction with the communication unit through a wireless connection.

After receiving the digital codes sent by the communication unit of the internet of things, the monitoring platform indexes the bolt numbers according to the communication unit numbers to record, restores the time domain signal characteristics of the output signal values of the LC oscillating circuit by reading the digital codes, and reversely calculates the bolt loosening rotation theta according to the relation among the polar plate rotation angle theta, the polar plate overlapping area S, the variable capacitor capacitance value C, the resonant circuit quality factor Q and the output circuit amplitude U to judge the risk. An unique number is formed through the communication unit of the Internet of things, accurate management on a large number of monitored objects is formed by combining a management mechanism of a monitoring platform, abnormal conditions are found, rapid processing is facilitated, and hidden dangers are eliminated in time. The bolt number is determined by a bolt construction maintainer, the communication unit comprises an International Mobile Subscriber Identity (IMSI) code of an operator, and the IMSI code is used as the communication unit number.

For example, the judgment of whether the bolt is loose or not according to the current numerical code is realized in the following way.

First, according to the current digital code, the sum of the current overlapping angles of each pair of the first sector arc polar plate and the second sector arc polar plate is calculated. The current overlapping angle is the overlapping angle of the projection of the first sector arc-shaped polar plate on the second sector arc-shaped polar plate and the second sector arc-shaped polar plate.

In some embodiments, calculating the sum of the current overlap angles of each pair of first and second fan-shaped plates from the current numerical code is accomplished by.

First, the current peak voltage amplitude is determined according to the peak code in the current digital code. Secondly, according to the standard peak value code in the standard digital code, the standard peak value voltage amplitude is determined. And thirdly, determining the current frequency according to the ratio of the current peak voltage amplitude to the standard peak voltage amplitude. Then, based on the current frequency, a current capacitance value is determined. Then, the current overlapping area is determined according to the current capacitance value. And finally, determining the sum of the current overlapping angles according to the current overlapping area.

For example, given a fixed inductance value L of the inductance element of the LC resonant circuit, the sum of the central angles of the respective first sector arc plates is θ, and the outer and inner diameters of each first sector arc plate and each second sector arc plate are R and R, respectively. The outer diameter and the inner diameter are both the radius of the sector arc, the outer diameter is the long side of the sector arc radius, and the inner diameter is the short side of the sector arc radius.

And under the condition that the overlapping angle of the first sector arc-shaped polar plate and the second sector arc-shaped polar plate which are in one-to-one correspondence is the central angle of each first sector arc-shaped polar plate, the bolt is not loosened. Complete overlapping area S of first and second capacitor plates₀Calculated by the following formula:

wherein, under the condition that the bolt is loosened, the first capacitor plate and the second capacitor plate rotate relatively, theta is reduced, and S₀And decreases in the same proportion.

Calculating the maximum capacitance C of the LC resonance circuit according to the following formula₀：

Where ε r is the dielectric constant, k is the electrostatic force constant, and d is the distance between the capacitor plates. In the present disclosure, the influence of the distance between the capacitor plates caused by the loosening of the bolts with respect to the rotation angle is small, and therefore,can be ignored.

Calculating the characteristic frequency f of the LC resonance circuit according to the following formula₀：

Calculating the quality factor Q of the LC resonance circuit according to the following formula₀：

Wherein R' is a fixed resistance value of the resistive element.

The current peak voltage amplitude is U, and the standard peak voltage amplitude is U₀The current frequency f of the LC resonant circuit is calculated by the following formula:

wherein N (f) is a unit resonance function representing the amplitude I of the output current of the oscillation circuit and the amplitude I of the output current at resonance₀The ratio of N (f) to n (f) is always less than or equal to 1, only the frequency f of the input signal and the loop characteristic f₀And equal to 1 in agreement.

When the input signal is at frequency f₀After the resonance is generated by the circuit, the amplitude of the output voltage is V₀＝I₀R' signal. When the bolt loosens, the polar plate rotates along with the bolt, and the capacitance value C gradually deviates from C₀Resulting in a change of the characteristic frequency to f ═ f₀If the input signal continues to be at frequency f₀And the output voltage after resonance generation by the circuit has a magnitude of V-IR<I₀R＇。

According to the current frequency f, calculating a current capacitance value C by the following formula:

according to the current capacitance value C, calculating the current overlapping area S by the following formula:

according to the current overlapping area S, calculating the sum theta' of the current overlapping angles by the following formula:

then, a difference between the sum of the central angles of the respective first sector arc plates and the sum of the current overlap angles is determined.

And finally, determining the loosening angle of the bolt according to the ratio of the difference value to the number of the first sector arc-shaped polar plates. In some embodiments, the loosening angle of the bolt is determined by the ratio of the difference to the number of first sector arc plates. For example, if the number of the first fan-shaped pole plates is N, the loosening angle of the bolt is θ'/N.

The angle change of the bolt relative to a fixed plane when the bolt is loosened is converted into the change of a capacitance value of a variable capacitor, an LC oscillating circuit is constructed, specific frequency is input, a driving signal is generated by the LC oscillating circuit, the driving signal is transmitted to a monitoring unit through a communication unit after analog-digital conversion, the monitoring unit judges whether the oscillating circuit is in a resonant state, a detuned state or an open-circuit state according to the signal level value, the relative rotation angle of the bolt is calculated, and the structural stability of the bolt is judged.

For example, the judgment of whether the bolt is loose or not according to the current numerical code is realized in the following way.

And comparing the current digital code with the standard digital code, and under the condition that the current digital code is inconsistent with the standard digital code, loosening the bolt. For example, an alarm may be issued after the bolt is loosened.

In some embodiments, the LC resonant circuit further comprises an inductance. The bolt loosening monitoring device further comprises a first packaging piece and a second packaging piece. For example, the first and second packages are cylindrical structures.

The first package includes a first electrode. The second capacitive plate, the inductor, the signal sampling circuit, the analog-to-digital conversion circuit, the communication unit, and the signal source are located inside the first package. The first electrode is respectively connected with the second capacitor plate and the signal source in series.

The second package includes a second electrode. The second electrode is respectively connected with the first capacitor plate and the inductor in series. The first capacitor plate is located inside the second package. In some embodiments, the second electrode is connected in series with the inductor through the conductive contact. For example, the second package includes a protective cap fixedly covering the first hole. In some embodiments, the second enclosure further includes a plurality of retaining buttons that secure the heads of the bolts within the first holes. For example, the first electrode or the second electrode is a stripe-shaped exposed electrode.

By packaging the capacitor plate, the lead, the signal sampling circuit, the analog-to-digital conversion circuit, the Internet of things communication unit, the battery and the signal source, the influence of environmental factors on the test precision is avoided. By adopting the measures, the bolt loosening monitoring device is guaranteed to operate in an all-weather maintenance-free mode, and the manual maintenance cost is reduced.

Bolt loosening monitoring devices according to some embodiments of the present disclosure will be described in detail below with reference to fig. 4.

Fig. 4 illustrates a schematic view of a bolt loosening monitoring device according to some embodiments of the present disclosure.

As shown in fig. 4, the bolt loosening monitoring device 4 includes a first package 41, a second capacitor plate 42, a combined circuit structure 43, a second package 44, and a first capacitor plate 45. The combined circuit structure 43 comprises an inductor, a signal sampling circuit, an analog-to-digital conversion circuit, a communication unit and a signal source.

The first package 41 includes a first electrode 411 and a conductive contact 412. The second capacitor plate 42 and the combined circuit structure 43 are located inside the first package 41. The first electrode 411 and the second capacitor plate 42 are connected in series by a wire. The first electrode 411 and the combined circuit structure 43 are connected in series by a wire. For example, the first electrode 411 is connected in series with the signal source of the combined circuit structure 43.

In some embodiments, the first package 41 further includes a work paste point 413A and a work paste point 413B. The first package 41 passes through the work adhesion point 413A and the work adhesion point 413B.

The second package 44 includes a second electrode 441. The second electrode 441 is connected in series with the combined circuit structure 43 by a conductive contact 412. In particular, the second electrode 441 is connected in series with the inductor through the conductive contact 412. The first capacitor plate 45 is located inside the second package 42. The first capacitor plate 45 is connected in series with the second electrode 441 by a wire.

In some embodiments, second encapsulant 44 includes a protective cap 442 that is secured over the first aperture. The influence of external factors on the bolt can be reduced through the protective cap. It will be appreciated that the first capacitor plate 42 is encapsulated inside the second encapsulation 44, the second encapsulation 44 having a first aperture of the same size and location as the first capacitor plate 42.

In some embodiments, second enclosure 44 further includes retaining buckles 443A and 443B that secure the heads of the bolts within the first void. The bolt head can be more stably fixed to the first hole by the fixing buckle and the protective cap. It should be understood that the retaining buckle of the present embodiment is merely illustrative, and the present disclosure may include more than 3 retaining buckles.

Fig. 5 illustrates a circuit schematic of a bolt loosening monitoring device according to some embodiments of the present disclosure.

As shown in fig. 5, the bolt loosening monitoring device 5 includes a signal source 50, a first electrode 51, a second electrode 52, an LC resonance circuit 53, a signal sampling circuit 54, an analog-to-digital conversion circuit 55, a communication unit 56, an antenna unit 57, and a monitoring unit 58.

The s terminal of the signal source 50 is connected to the first electrode 51, and the s' terminals of the signal source 50 are connected to the c terminal of the LC resonance circuit 53 and the i terminal of the communication unit 56, respectively. The signal source 50 is configured to periodically generate a current signal having a frequency that is a characteristic frequency of the LC resonance circuit 53, and input the LC resonance circuit 53.

The first electrode 51 is connected to the s terminal of the signal source 50 and the a terminal of the LC resonance circuit 53, respectively.

The LC resonance circuit 53 is configured to receive a current signal having a frequency that is a characteristic frequency of the LC resonance circuit 53 input from the signal source 50, and output a voltage amplitude signal. Terminals b and c of the LC resonance circuit 53 are connected to the signal sampling circuit 54.

The LC resonance circuit 53 includes a parallel capacitor C, an inductance L, and a resistance R. A parallel plate capacitor first capacitive plate 531 and second capacitive plate 532. One side of the first capacitor plate 531 is an a' end, and one side of the second capacitor plate 532 is an a end of the LC resonant circuit 53. The a' terminal of the parallel plate capacitor is connected to the L terminal of the inductance L through the second electrode 52. The L' end of the inductor L is connected with the R end of the resistor R. The connection point between the L' terminal of the inductor L and the R terminal of the resistor R is the b terminal of the LC resonant circuit 53. The end c of the LC resonant circuit 53 is the other end of the resistor R.

The signal sampling circuit 54 is configured to receive the voltage amplitude signal output from the LC resonance circuit 53 and output a voltage amplitude discrete signal. The d terminal and the e terminal of the signal sampling circuit 54 are connected to an analog-to-digital conversion circuit 55.

The analog-to-digital conversion circuit 5 is configured to 5 receive the voltage amplitude discrete signal output from the signal sampling circuit 54 and output a digital code. The f terminal and the g terminal of the analog-to-digital conversion circuit 55 are connected to the communication unit 56.

The h-terminal of the communication unit 56 is connected to the antenna unit 57. The communication unit 56 is configured to receive the digital code output from the analog-to-digital conversion circuit 55 and transmit the same to the monitoring unit 58 through the antenna unit 57. In some embodiments, the communication unit encapsulates the digital code and transmits it in packets of a particular form. For example, a header and a trailer are added for digital encoding.

The communication unit 56 is further configured to periodically trigger the signal source 50 to generate a current signal having a frequency that is characteristic of the LC resonant circuit 53.

Fig. 6 illustrates a flow diagram of a bolt loosening monitoring method according to some embodiments of the present disclosure.

As shown in fig. 6, the bolt loosening monitoring method includes steps S110 to S120. The bolt looseness monitoring method is executed by the bolt looseness monitoring device in any embodiment of the disclosure.

In step S110, a present voltage amplitude signal is generated from the current signal having the characteristic frequency of the LC resonance circuit.

In step S120, it is determined whether the bolt is loosened according to the current voltage amplitude signal.

Fig. 7 illustrates a block diagram of a bolt loosening monitoring device, according to some embodiments of the present disclosure.

As shown in fig. 7, the bolt loosening monitoring device 7 includes a memory 71; and a processor 72 coupled to the memory 71. The memory 71 is used for storing instructions for executing the bolt loosening monitoring method according to the corresponding embodiment. The processor 72 is configured to perform the bolt loosening monitoring method in any of the embodiments of the present disclosure based on instructions stored in the memory 71.

FIG. 8 illustrates a block diagram of a computer system for implementing some embodiments of the present disclosure.

As shown in FIG. 8, computer system 80 may take the form of a general purpose computing device. Computer system 80 includes a memory 810, a processor 820, and a bus 800 that connects the various system components.

The memory 810 may include, for example, system memory, non-volatile storage media, and the like. The system memory stores, for example, an operating system, an application program, a Boot Loader (Boot Loader), and other programs. The system memory may include volatile storage media such as Random Access Memory (RAM) and/or cache memory. The non-volatile storage medium stores, for instance, instructions to perform corresponding embodiments of at least one of the bolt loosening monitoring methods. Non-volatile storage media include, but are not limited to, magnetic disk storage, optical storage, flash memory, and the like.

The processor 820 may be implemented as discrete hardware components, such as a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gates or transistors, or the like. Accordingly, each of the modules, such as the judging module and the determining module, may be implemented by a Central Processing Unit (CPU) executing instructions in a memory for performing the corresponding step, or may be implemented by a dedicated circuit for performing the corresponding step.

The bus 800 may use any of a variety of bus architectures. For example, bus structures include, but are not limited to, Industry Standard Architecture (ISA) bus, Micro Channel Architecture (MCA) bus, and Peripheral Component Interconnect (PCI) bus.

The computer system 80 may also include an input-output interface 830, a network interface 840, a storage interface 850, and the like. These interfaces 830, 840, 850 and the connection between the memory 88 and the processor 820 may be via a bus 800. The input/output interface 830 may provide a connection interface for input/output devices such as a display, a mouse, and a keyboard. The network interface 840 provides a connection interface for various networking devices. The storage interface 850 provides a connection interface for external storage devices such as a floppy disk, a usb disk, and an SD card.

Various aspects of the present disclosure are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatus and computer program products according to embodiments of the disclosure. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer-readable program instructions.

These computer-readable program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable apparatus to produce a machine, such that the execution of the instructions by the processor results in an apparatus that implements the functions specified in the flowchart and/or block diagram block or blocks.

These computer-readable program instructions may also be stored in a computer-readable memory that can direct a computer to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instructions which implement the function specified in the flowchart and/or block diagram block or blocks.

The present disclosure may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects.

Through the bolt looseness monitoring device and method and the computer-storable medium in the embodiment, bolt looseness monitoring is automatically carried out, and the bolt looseness monitoring efficiency is improved.

Thus far, bolt loosening monitoring devices and methods, computer-storable media, according to the present disclosure have been described in detail. Some details that are well known in the art have not been described in order to avoid obscuring the concepts of the present disclosure. It will be fully apparent to those skilled in the art from the foregoing description how to practice the presently disclosed embodiments.