阅读说明：本技术 一种非相干直扩系统中的匹配滤波捕获系统及捕获方法 (Matched filtering capture system and capture method in incoherent direct sequence spread spectrum system ) 是由 赵洪林 姜洪涛 张佳岩 马永奎 于 2020-12-23 设计创作，主要内容包括：一种非相干直扩系统中的匹配滤波捕获系统及捕获方法,它属于扩频通信中接收机伪码同步技术领域。本发明解决了非相干直接序列扩频系统中数据跳变对同步捕获产生影响的问题。本发明基于SRL16的并行折叠匹配滤波器作为伪码相位捕获的算法,大大优化了硬件资源的使用；提出的N路缓存方法与匹配滤波器相结合,以此来克服非相干情况下数据信息与伪码相位位置不确定的问题,对数据信息翻转跳变位置的估计变得更加准确。当伪码码型为Gold码,码长为1023,码速率为3.069Mcps,数据信息速率8kbps,调制方式为BPSK的情况时,可以完成对伪码相位的捕获,同时对数据信息翻转跳变位置可以完成误差不大于48个伪码码片长度误差的搜索。本发明可以应用于接收机伪码同步。(A matched filtering capture system and a capture method in a non-coherent direct sequence spread spectrum system belong to the technical field of receiver pseudo code synchronization in spread spectrum communication. The invention solves the problem that the data hopping in the incoherent direct sequence spread spectrum system influences the synchronous acquisition. The parallel folding matched filter based on the SRL16 is used as an algorithm for pseudo code phase capturing, so that the use of hardware resources is greatly optimized; the N-path cache method is combined with the matched filter, so that the problem that the phase positions of the data information and the pseudo code are uncertain under the incoherent condition is solved, and the estimation of the data information flip jump position is more accurate. When the pseudo code is Gold code, the code length is 1023, the code rate is 3.069Mcps, the data information rate is 8kbps, and the modulation mode is BPSK, the pseudo code phase can be captured, and the search of errors not greater than 48 pseudo code chip length errors can be completed on the data information flip jump position. The invention can be applied to receiver pseudo code synchronization.)

1. A matched filtering capture system in a non-coherent direct sequence spread spectrum system is characterized by comprising a down-conversion module, a pseudo code buffer module, a matched filter module, a non-coherent accumulation module and a decision module; wherein:

the down-conversion module is used for processing the received BPSK intermediate frequency signal to obtain an in-phase signal and an orthogonal signal;

the pseudo code caching module is used for caching the local pseudo codes by N paths to obtain N paths of local pseudo code sequences;

the matched filter module is used for performing correlation accumulation processing on the N local pseudo code sequences and the in-phase signal and the orthogonal signal obtained by the down-conversion module to obtain a correlation accumulation processing result corresponding to each local pseudo code sequence;

the incoherent accumulation module is used for carrying out incoherent accumulation on a correlation accumulation processing result corresponding to each path of local pseudo code sequence to obtain an incoherent accumulation result corresponding to each path of local pseudo code sequence;

the judgment module is used for processing the maximum value of the incoherent accumulation result corresponding to the N paths of local pseudo code sequences, comparing the maximum value with a set threshold value until the maximum value is greater than the threshold value, and proving that the capturing of the pseudo code phase is finished.

2. The matched filter acquisition system of claim 1, wherein the down-conversion module is configured to process the received BPSK intermediate frequency signal to obtain an in-phase signal and a quadrature signal; the specific process comprises the following steps:

the received BPSK intermediate frequency signal is multiplied by a cos signal generated by a local oscillator to obtain an in-phase signal, and the received BPSK intermediate frequency signal is multiplied by a sin signal generated by the local oscillator to obtain an orthogonal signal.

3. The matched filter capturing system of claim 2, wherein the pseudo code buffer module buffers two adjacent local pseudo code sequences with different initial phasesT_DThe length of the baseband data information bit is N, and the number of the buffer branches is N.

4. The matched filter acquisition system of claim 3, wherein the matched filter module is a parallel folded matched filter based on SRL 16.

5. The matched filter capture system of claim 4, wherein the SRL 16-based parallel folded matched filter comprises M SRL16 primitives,wherein, T_CIs the pseudo code symbol length, P is the folding rate, and Q is the oversampling rate.

6. The matched filter acquisition system of claim 5, wherein the matched filter module is configured to perform correlation accumulation processing on the N local pseudo code sequences and the in-phase signal and the quadrature signal obtained by the down-conversion module to obtain a correlation accumulation processing result corresponding to each local pseudo code sequence; the specific process comprises the following steps:

for any local pseudo code sequence of the cache, carrying out correlation accumulation operation on the in-phase signal and the local pseudo code sequence of the cache to obtain an in-phase signal correlation accumulation operation result, carrying out correlation accumulation operation on the orthogonal signal and the local pseudo code sequence of the cache to obtain an orthogonal signal correlation accumulation operation result, and carrying out square taking and adding processing on the in-phase signal correlation accumulation operation result and the orthogonal signal correlation accumulation operation result to obtain a correlation accumulation processing result corresponding to the local pseudo code sequence of the cache;

and after traversing each path of local pseudo code sequence, obtaining a relevant accumulation processing result corresponding to each path of local pseudo code sequence.

7. The method for capturing the matched filter capturing system in the incoherent direct sequence spread spectrum system according to claim 1, wherein the method is specifically realized by the following steps:

step one, after a received BPSK intermediate frequency signal is processed by a down-conversion module, an in-phase signal and an orthogonal signal are obtained;

step two, storing local pseudo codes in a ROM, then outputting the local pseudo codes in a reverse order, and caching the local pseudo codes output in the reverse order into an N-path local pseudo code sequence through a pseudo code caching module;

performing correlation accumulation processing on the N local pseudo code sequences and the in-phase signals and the orthogonal signals obtained by the down-conversion module by using a matched filter module to respectively obtain a correlation accumulation processing result corresponding to each local pseudo code sequence;

performing incoherent accumulation on a correlation accumulation processing result corresponding to each path of local pseudo code sequence by using an incoherent accumulation module to obtain an incoherent accumulation result corresponding to each path of local pseudo code sequence;

and fifthly, selecting a maximum value from the incoherent accumulation results corresponding to each path of local pseudo code sequence, sending the selected maximum value to a judgment module, and comparing the maximum value with a set threshold value by the judgment module to realize the capturing of the pseudo code phase.

8. The method according to claim 7, wherein the specific process of the step one is as follows:

the received BPSK intermediate frequency signal is multiplied by a cos signal generated by a local oscillator to obtain an in-phase signal, and the received BPSK intermediate frequency signal is multiplied by a sin signal generated by the local oscillator to obtain an orthogonal signal.

9. The method as claimed in claim 8, wherein the N local pseudo-code sequences have different initial phases between two adjacent local pseudo-code sequencesT_DThe length of the baseband data information bit is N, and the number of the buffer branches is N.

10. The method of claim 9, wherein the matched filter module is a parallel folding matched filter based on SRL 16.

11. The acquisition method of the matched filter acquisition system in the incoherent direct sequence spread spectrum system according to claim 10, wherein the SRL 16-based parallel folding matched filter comprises M SRL16 primitives,wherein, T_CIs the pseudo code symbol length, P is the folding rate, and Q is the oversampling rate.

12. The method according to claim 11, wherein the specific process of step three is as follows:

for any local pseudo code sequence of the cache, carrying out correlation accumulation operation on the in-phase signal and the local pseudo code sequence of the cache to obtain an in-phase signal correlation accumulation operation result, carrying out correlation accumulation operation on the orthogonal signal and the local pseudo code sequence of the cache to obtain an orthogonal signal correlation accumulation operation result, and carrying out square taking and adding processing on the in-phase signal correlation accumulation operation result and the orthogonal signal correlation accumulation operation result to obtain a correlation accumulation processing result corresponding to the local pseudo code sequence of the cache;

and after traversing each path of local pseudo code sequence, obtaining a relevant accumulation processing result corresponding to each path of local pseudo code sequence.

13. The method of claim 12, wherein the operation of the SRL 16-based parallel folding matched filter is as follows:

for cached N-path local pseudo code sequence Respectively folded at a folding rate of P, wherein C₀Is the first code element of the first path local pseudo code sequence,is the last code element of the first local pseudo code sequence,is the first code element of the second path of local pseudo code sequence,for the last symbol of the second path of local pseudo-code sequence,is the first code element of the Nth local pseudo code sequence,the last code element of the Nth path of local pseudo code sequence;

for any path of local pseudo code sequence, loading a corresponding folded code word in each time slot of the path of local pseudo code sequence, and controlling a control logic to zero at an initial value of a 1 st time slot adder, wherein the initial value of a 2 nd time slot adder is a correlation accumulation sum of the 1 st time slot adder, …, and the initial value of a P th time slot adder is a correlation accumulation sum of a P-1 th time slot adder, and then extracting and accumulating the correlation accumulation sum of the P th time slot adder to obtain a correlation accumulation result corresponding to the path of local pseudo code sequence;

and in the same way, obtaining the correlation accumulation results corresponding to the N local pseudo code sequences respectively.

Technical Field

The invention belongs to the technical field of receiver pseudo code synchronization in spread spectrum communication, and particularly relates to a pseudo code synchronization acquisition method suitable for an incoherent direct sequence spread spectrum communication system.

Background

With the continuous progress of modern communication technology and aerospace measurement and control technology, aerospace measurement and control communication systems gradually develop towards the direction of being compatible with various data information rates, pseudo code rates and higher anti-interference performance, and a direct sequence spread spectrum technology is widely applied to good performances such as simultaneous measurement and control of a plurality of measurement and control targets or different measurement and control signals of the same measurement and control target, high-resolution ranging and the like by utilizing a code division multiple access technology due to excellent anti-interference performance, confidentiality and anti-interception performance. However, since the clocks generated by the baseband data and the pseudo code under the incoherent direct sequence spread spectrum system are non-homologous, the phase is not synchronized, and when the baseband data information is flipped and hopped at different positions in the pseudo code period, the correlation peak value under the conventional synchronization method is reduced to different degrees, so that the conventional direct sequence spread spectrum receiver is not applicable to the pseudo code synchronization operation method.

In the process of synchronous capture of a receiver, overcoming the influence of data information flip-flop is one of key technologies of synchronous processing of a non-coherent direct sequence spread spectrum communication system, common delay phase multiplication multiplies a received signal by a signal which is delayed by a certain code word and then conjugated to obtain a new signal to be processed, the influence of data information flip-flop can be eliminated, but noise power is increased after noise is processed in the same way, and the signal-to-noise ratio in the receiver is reduced. Another common method is a half-bit method, which performs correlation accumulation synchronization processing on adjacent received signals with a length of half baseband data, and because a segment of information is not affected by data information flip-flop, the influence can be overcome, but because the correlation accumulation length is half of the entire baseband data length, there is a processing loss of 3dB, and the correlation peak value is reduced by about half. Therefore, the problem of data information flip hopping is solved, and the problem is one of key problems of synchronous acquisition in the non-coherent direct sequence spread spectrum communication system.

Disclosure of Invention

The invention aims to solve the problem that data hopping in an incoherent direct sequence spread spectrum system influences synchronous acquisition, and provides a matched filtering acquisition system and an acquisition method in the incoherent direct sequence spread spectrum system.

The technical scheme adopted by the invention for solving the technical problems is as follows:

based on one aspect of the invention, a matched filtering capture system in an incoherent direct sequence spread spectrum system comprises a down-conversion module, a pseudo code cache module, a matched filter module, an incoherent accumulation module and a decision module; wherein:

the down-conversion module is used for processing the received BPSK intermediate frequency signal to obtain an in-phase signal and an orthogonal signal;

the pseudo code caching module is used for caching the local pseudo codes by N paths to obtain N paths of local pseudo code sequences;

the matched filter module is used for performing correlation accumulation processing on the N local pseudo code sequences and the in-phase signal and the orthogonal signal obtained by the down-conversion module to obtain a correlation accumulation processing result corresponding to each local pseudo code sequence;

the incoherent accumulation module is used for carrying out incoherent accumulation on a correlation accumulation processing result corresponding to each path of local pseudo code sequence to obtain an incoherent accumulation result corresponding to each path of local pseudo code sequence;

the number of the incoherent accumulation sections is selected to meet the requirement that the incoherent accumulation total length at least comprises a complete pseudo code period;

the judgment module is used for processing the maximum value of the incoherent accumulation result corresponding to the N paths of local pseudo code sequences, comparing the maximum value with a set threshold value until the maximum value is greater than the threshold value, and proving that the capturing of the pseudo code phase is finished.

Only when the initial position of the matched filtering correlation accumulation operation is close to the data information flip hopping position, a larger correlation result can be obtained, so that the maximum value can be selected from the corresponding N-path results obtained by incoherent accumulation to be sent to a judgment module and a threshold value for judgment, and whether the acquisition of the pseudo code phase of the received signal and the search of the data flip hopping position are finished or not can be judged.

Further, the down-conversion module is configured to process the received BPSK intermediate frequency signal to obtain an in-phase signal and an orthogonal signal; the specific process comprises the following steps:

the received BPSK intermediate frequency signal is multiplied by a cos signal generated by a local oscillator to obtain an in-phase signal, and the received BPSK intermediate frequency signal is multiplied by a sin signal generated by the local oscillator to obtain an orthogonal signal.

Furthermore, the initial phase difference of each two adjacent local pseudo code sequences cached by the pseudo code caching moduleT_DThe length of the baseband data information bit is N, and the number of the buffer branches is N.

Further, the matched filter module is a parallel folding matched filter based on the SRL 16.

Further, the SRL 16-based parallel folding matched filter comprises M SRL16 primitives,wherein, T_CIs the pseudo code symbol length, P is the folding rate, and Q is the oversampling rate.

Furthermore, the matched filter module is configured to perform correlation accumulation processing on the N local pseudo code sequences and the in-phase signal and the orthogonal signal obtained by the down-conversion module to obtain a correlation accumulation processing result corresponding to each local pseudo code sequence; the specific process comprises the following steps:

for any local pseudo code sequence of the cache, carrying out correlation accumulation operation on the in-phase signal and the local pseudo code sequence of the cache to obtain an in-phase signal correlation accumulation operation result, carrying out correlation accumulation operation on the orthogonal signal and the local pseudo code sequence of the cache to obtain an orthogonal signal correlation accumulation operation result, and carrying out square taking and adding processing on the in-phase signal correlation accumulation operation result and the orthogonal signal correlation accumulation operation result to obtain a correlation accumulation processing result corresponding to the local pseudo code sequence of the cache;

and after traversing each path of local pseudo code sequence, obtaining a relevant accumulation processing result corresponding to each path of local pseudo code sequence.

Based on another aspect of the present invention, a method for capturing a matched filter capture system in a non-coherent direct sequence spread spectrum system is specifically implemented by the following steps:

step one, after a received BPSK intermediate frequency signal is processed by a down-conversion module, an in-phase signal and an orthogonal signal are obtained;

step two, storing local pseudo codes in a ROM, then outputting the local pseudo codes in a reverse order, and caching the local pseudo codes output in the reverse order into an N-path local pseudo code sequence through a pseudo code caching module;

performing correlation accumulation processing on the N local pseudo code sequences and the in-phase signals and the orthogonal signals obtained by the down-conversion module by using a matched filter module to respectively obtain a correlation accumulation processing result corresponding to each local pseudo code sequence;

performing incoherent accumulation on a correlation accumulation processing result corresponding to each path of local pseudo code sequence by using an incoherent accumulation module to obtain an incoherent accumulation result corresponding to each path of local pseudo code sequence;

and fifthly, selecting a maximum value from the incoherent accumulation results corresponding to each path of local pseudo code sequence, sending the selected maximum value to a judgment module, and comparing the maximum value with a set threshold value by the judgment module to realize the capturing of the pseudo code phase.

Further, the specific process of the first step is as follows:

the received BPSK intermediate frequency signal is multiplied by a cos signal generated by a local oscillator to obtain an in-phase signal, and the received BPSK intermediate frequency signal is multiplied by a sin signal generated by the local oscillator to obtain an orthogonal signal.

Furthermore, in the N local pseudo code sequences, the initial phase difference between every two adjacent local pseudo code sequencesT_DThe length of the baseband data information bit is N, and the number of the buffer branches is N.

Further, the matched filter module is a parallel folding matched filter based on the SRL 16.

Further, the SRL 16-based parallel folding matched filter comprises M SRL16 primitives,wherein, T_CIs the pseudo code symbol length, P is the folding rate, and Q is the oversampling rate.

Further, the specific process of the third step is as follows:

for any local pseudo code sequence of the cache, carrying out correlation accumulation operation on the in-phase signal and the local pseudo code sequence of the cache to obtain an in-phase signal correlation accumulation operation result, carrying out correlation accumulation operation on the orthogonal signal and the local pseudo code sequence of the cache to obtain an orthogonal signal correlation accumulation operation result, and carrying out square taking and adding processing on the in-phase signal correlation accumulation operation result and the orthogonal signal correlation accumulation operation result to obtain a correlation accumulation processing result corresponding to the local pseudo code sequence of the cache;

and after traversing each path of local pseudo code sequence, obtaining a relevant accumulation processing result corresponding to each path of local pseudo code sequence.

In order to utilize the good correlation characteristic of the pseudo code, a reasonable number of non-coherent accumulation sections is set so that the total length after the non-coherent accumulation contains at least one pseudo code period.

Furthermore, the working process of the parallel folding matched filter based on the SRL16 is as follows:

for cached N-path local pseudo code sequence Respectively folded at a folding rate of P, wherein C₀Is the first code element of the first path local pseudo code sequence,is the end of the first local pseudo-code sequenceOne of the symbols is a symbol that is,is the first code element of the second path of local pseudo code sequence,for the last symbol of the second path of local pseudo-code sequence,is the first code element of the Nth local pseudo code sequence,the last code element of the Nth path of local pseudo code sequence;

for any path of local pseudo code sequence, loading a corresponding folded code word in each time slot of the path of local pseudo code sequence, and controlling a control logic to zero at an initial value of a 1 st time slot adder, wherein the initial value of a 2 nd time slot adder is a correlation accumulation sum of the 1 st time slot adder, …, and the initial value of a P th time slot adder is a correlation accumulation sum of a P-1 th time slot adder, and then extracting and accumulating the correlation accumulation sum of the P th time slot adder to obtain a correlation accumulation result corresponding to the path of local pseudo code sequence;

and in the same way, obtaining the correlation accumulation results corresponding to the N local pseudo code sequences respectively.

The invention has the beneficial effects that: the invention has proposed a matching filter in the incoherent direct sequence spread spectrum system and caught the system and catches the method, the invention is directed against Xilinx's hardware platform, adopt the parallel folding matched filter based on SRL16 as the algorithm that the pseudo-code phase catches, has greatly optimized the use of the hardware resource; the N-path cache method is combined with the matched filter, so that the problem that the phase positions of the data information and the pseudo code are uncertain under the incoherent condition is solved, compared with the current half-bit method, the correlation peak value is improved, and meanwhile, the estimation of the flip jump position of the data information is more accurate. When the algorithm of the invention is applied to the condition that the pseudo code is Gold code, the code length is 1023, the code rate is 3.069Mcps, the data information rate is 8kbps, and the modulation mode is BPSK, the acquisition of the pseudo code phase can be completed, and the search of the error which is not more than 48 pseudo code chip length errors can be completed on the data information flip jump position.

Drawings

FIG. 1 is a schematic diagram of an incoherent direct sequence spread spectrum process;

FIG. 2 is an overall framework diagram of the pseudo code acquisition method in a non-coherent direct sequence spread spectrum system of the present invention;

FIG. 3 is a block diagram of an SRL 16-based matched filter module with an N-way cache according to the present invention;

FIG. 4 is a timing diagram of the SRL16 based matched filter module process with N-way cache according to the present invention;

in the figure, clk _ sys: system operating clock, clk _ samp: sampling clock, clk _ data: data information generation clock, srl _ in: input data of 1 st SRL16 primitive, SRL _ out 1: output data of 1 st SRL16 primitive, SRL _ out 95: output data of 95 th SRL16 primitive;

fig. 5 is a schematic diagram of the whole capturing process of the matched filter with N-way cache according to the present invention.

Detailed Description

For the incoherent direct sequence spread spectrum system, the biggest difference with the conventional direct sequence spread spectrum system is that the baseband data information generating clock at the transmitting end is non-homologous with the pseudo code generating clock, the spreading diagram is shown in fig. 1, and no definite relation exists between the baseband data information and the pseudo code phase.

Fig. 2 presents an overall block diagram of the synchronization acquisition at the receiver end of the invention. The device mainly comprises a down-conversion module, a pseudo code cache module, a matched filter capturing module, a non-coherent accumulation module and a judgment module.

The down-conversion module is used for carrying out down-conversion processing on the received BPSK intermediate frequency signal, and multiplying the received intermediate frequency signal by a local carrier and a carrier of which the phase is shifted by 90 degrees respectively to obtain an in-phase signal and an orthogonal signal.

The down-conversion module is used for multiplying the intermediate frequency signal obtained after the down-conversion of the digital signal in the radio frequency chip by the local carrier and then combining the multiplication with the subsequent accumulation process to change the intermediate frequency signal into the baseband signal.

The pseudo code caching module is used for caching the local pseudo code by N paths, and the length of each path is the length T of transmitting baseband data_DDifference between two adjacent initial phases

The matched filtering module is used for respectively carrying out the same-phase and orthogonal signals obtained by the down-conversion module and the cached N paths with the length of T_DThe pseudo code is subjected to correlation accumulation operation, and the two paths of correlation results are subjected to square-taking and adding processing.

The incoherent accumulation module is used for obtaining the length T_DThe correlation results are accumulated to control the total accumulated operation length of each time to include at least one pseudo code period, so as to achieve the purpose of utilizing the good correlation property of the pseudo code.

And the judgment module is used for carrying out maximum value taking processing on the correlation result obtained after the incoherent accumulation, and judging the maximum value and the set threshold value.

The method of the invention realizes the capture of the pseudo code by the receiving end in the incoherent direct sequence spread spectrum system through the following steps:

firstly, multiplying the received intermediate frequency signal by a carrier generated by a local oscillator and the carrier with 90-degree phase shift thereof through a down-conversion module to obtain an in-phase signal and an orthogonal signal.

Step two, because the length of the baseband data information of the transmitting terminal is T_DTherefore, N-path cache is carried out on the local pseudo code, and the initial phase difference of every two adjacent paths

Step three, the invention adopts the parallel folding matched filter based on SRL16 with N-path cache as shown in figure 3 to carry out local folding matched filter for the cached N-pathPseudo codeWherein T is_DFor data information bit length, T_CFor code element length, respectively making folding with folding rate P, utilizing time division multiplexing idea to load correspondent code element in every time slotAnd the control logic controls the first time slot adder to clear, and the initial values of other time slot adders are the accumulated sum of the last time slot.

In addition, due to the existence of the over-sampling rate, the corresponding time slots contributing to the correlation value are extracted and accumulated again to obtain the final correlation accumulation result corresponding to each path. As an example to illustrate the process, if the number of buffer branches is 4, the folding rate of the SRL 16-based parallel folding matched filter is set to 4, and the oversampling rate is set to 4, so that 4 × 4 is required to be 16 delays, the resource of SRL16 can be utilized to the maximum extent, in case of 8kbps baseband data information rate, 1023 Gold code length, 3.069Mbps code rate, and T correlation accumulation length is T_DIf the width of the pseudo code word is 384, the first local pseudo code sequence is C₀～C₃₈₃The second path of local pseudo code sequence is C₉₆～C₄₇₉The third local pseudo code sequence is C₁₉₂～C₅₇₅The fourth local pseudo code sequence is C₂₈₈～C₆₇₁. The working sequence of the parallel folding matched filter based on the SRL16 is shown in fig. 4, because the folding rate is 4, the oversampling rate is 4, the selected working clock (clk _ sys) is 16 times of the baseband data information generating clock (clk _ data), after each data comes in and is delayed, correlation operation is respectively carried out with the local pseudo code of the 4-way cache, and because the folding rate is 4, in the 1 st time slot, the C in the local pseudo code word of the 4-way cache is respectively related with the C in the 1 st time slot₀～C₉₅/C₉₆～C₁₉₁/C₁₉₂～C₂₈₇/C₂₈₈～C₃₈₃Performing correlation operation, and performing correlation operation on C in the local pseudo code word cached in 4 ways at the 2 nd time slot₉₆～C₁₉₁/C₁₉₂～C₂₈₇/C₂₈₈～C₃₈₃/C₃₈₄～C₄₇₉Performing correlation operation, and performing correlation operation on the 3 rd time slot and C in the local pseudo code word cached in the 4 ways₁₉₂～C₂₈₇/C₂₈₈～C₃₈₃/C₃₈₄～C₄₇₉/C₄₈₀～C₅₇₅Performing correlation operation, and performing correlation operation with C in the local pseudo code word of the 4-way cache in the 4 th time slot₂₈₈～C₃₈₃/C₃₈₄～C₄₇₉/C₄₈₀～C₅₇₅/C₅₇₆～C₆₇₁And performing correlation operation, and extracting and accumulating the corresponding correlation accumulation sum of each sampling point to obtain a correlation value because the oversampling rate is 4.

The accumulation process plays a role of a low-pass filter, and high-frequency components in signals obtained by multiplying the received signals and the two local paths of carriers are filtered. In physical implementation, a Slice (Slice) composed of a lookup table (LUT) in an FPGA can be divided into two logic units (LCs), and when delay shift processing is performed, if a structure based on a D flip-flop (DFF) is adopted, one Slice can only be synthesized into two DFFs, so as to implement two delay units. And by adopting the SRL16 primitive provided by Xilinx, one Slice can be integrated into two SRLs 16, and at most 32 delay units can be realized, and in consideration of the above-mentioned optimization of SRLs 16 on resources, the design is realized by using a matched filter based on the SRL 16.

Step four, because the number of the pseudo code elements corresponding to the length of the data information does not contain a complete pseudo code period, the correlation accumulation processing performed in this way cannot utilize good correlation characteristics of the pseudo codes (m sequence, gold sequence, etc.), therefore, the correlation accumulation result obtained by the matched filter needs to be subjected to incoherent accumulation processing, the number of incoherent accumulation sections needs to meet the requirement that the final accumulated total length at least contains a complete period of the pseudo code, then the maximum value of the correlation results corresponding to the N paths is selected to be compared with the threshold value, as shown in fig. 5, if the maximum value is greater than the threshold value, the capturing of the pseudo code phase is proved to be completed, and meanwhile, only when the initial phase of the ith (i is greater than or equal to 1 and less than or equal to N) path in the N-path cache is close to the data information flip jump position, the correlation peak value obtained by the correlation accumulation is the maximum at this moment, the search for the data information flip transition position is also completed.

The above-described calculation examples of the present invention are merely to explain the calculation model and the calculation flow of the present invention in detail, and are not intended to limit the embodiments of the present invention. It will be apparent to those skilled in the art that other variations and modifications of the present invention can be made based on the above description, and it is not intended to be exhaustive or to limit the invention to the precise form disclosed, and all such modifications and variations are possible and contemplated as falling within the scope of the invention.