阅读说明：本技术 一种用于制造金属电极的制造方法 (Method for manufacturing metal electrode ) 是由 宋晓辉 许欣 翁志坤 于 2020-12-17 设计创作，主要内容包括：本发明提供一种用于制造金属电极的制造方法,包括：在压电材料衬底上形成第一光刻胶层；形成第一图形；基于所述第一图形,对所述压电材料衬底进行蚀刻,以形成填埋沟；去除所述第一光刻胶层；在所述压电材料衬底上沉积金属材料以形成电极金属层；使得所述压电材料衬底的暴露表面与所述电极金属层的暴露表面齐平；形成第一介质层；在所述第一介质层上形成第二光刻胶层；形成第二图形；基于所述第二图形,对所述第一介质层进行蚀刻,以形成电极保护层图形；去除所述第二光刻胶层；以及在所述电极保护层图形和所述压电材料衬底上形成第二介质层。(The present invention provides a manufacturing method for manufacturing a metal electrode, comprising: forming a first photoresist layer on a piezoelectric material substrate; forming a first pattern; etching the piezoelectric material substrate based on the first pattern to form a filling groove; removing the first photoresist layer; depositing a metal material on the piezoelectric material substrate to form an electrode metal layer; making an exposed surface of the piezoelectric material substrate flush with an exposed surface of the electrode metal layer; forming a first dielectric layer; forming a second photoresist layer on the first dielectric layer; forming a second pattern; etching the first dielectric layer based on the second pattern to form an electrode protection layer pattern; removing the second photoresist layer; and forming a second dielectric layer on the electrode protection layer pattern and the piezoelectric material substrate.)

1. A manufacturing method for manufacturing a metal electrode, characterized by comprising:

coating photoresist on a piezoelectric material substrate to form a first photoresist layer;

patterning the first photoresist layer to form a first pattern;

etching the piezoelectric material substrate based on the first pattern to form a filling groove;

removing the first photoresist layer;

depositing a metal material on the piezoelectric material substrate, so that the metal material fills the filling groove to form an electrode metal layer;

grinding the piezoelectric material substrate and the electrode metal layer so that an exposed surface of the piezoelectric material substrate is flush with an exposed surface of the electrode metal layer;

forming a first dielectric layer on the exposed surface of the piezoelectric material substrate and the exposed surface of the electrode metal layer;

coating photoresist on the first dielectric layer to form a second photoresist layer;

patterning the second photoresist layer to form a second pattern;

etching the first dielectric layer based on the second pattern to form an electrode protection layer pattern;

removing the second photoresist layer; and

and forming a second dielectric layer on the electrode protection layer pattern and the piezoelectric material substrate.

2. The method of manufacturing of claim 1, wherein the second dielectric layer overlies the electrode metal layer and is trapezoidal in cross-section.

3. The manufacturing method according to claim 1, wherein a width of the first pattern is the same as a width of the second pattern.

4. The manufacturing method according to claim 1, wherein the piezoelectric material substrate is formed of lithium tantalate or lithium lithiate.

5. The manufacturing method according to claim 1, wherein the electrode metal layer is an Al layer, a combined Al/Cu layer, a combined Ti/Al/Cu layer, or a Pt layer.

6. The method of manufacturing of claim 1, wherein the first photoresist layer and the second photoresist layer have a thickness of 1um to 2 um.

7. The method of manufacturing of claim 1, wherein the first dielectric layer and the second dielectric layer are formed of SiO₂And (4) forming.

8. The method of claim 1, wherein the depth of the buried trench is 20nm to 100 nm.

9. The method of manufacturing of claim 1, wherein the first dielectric layer has a thickness of 100nm to 500 nm.

10. A metal electrode produced by the production method according to any one of claims 1 to 9.

Technical Field

The present invention relates to the manufacture of metal electrodes, and more particularly to the manufacture of metal electrodes in filters.

Background

Surface Acoustic Wave (SAW) filters are widely used in signal receiver front-ends as well as duplexers and receive filters. The SAW filter integrates low insertion loss and good suppression performance, and can realize wide bandwidth and small volume. In a conventional SAW filter, an electrical input signal is converted into an acoustic wave by an interposed metal interdigital transducer (IDT) formed on a piezoelectric substrate.

In the conventional method of manufacturing an interdigital transducer structure for a surface acoustic wave filter, a LIFT-OFF process (LIFT-OFF) is generally used, in which a negative photoresist is patterned (e.g., by exposure, development, etc.) on a substrate, a metal film is then deposited thereon, and the photoresist is removed using a solvent that does not attack the metal film. And stripping the metal on the photoresist along with the removal of the photoresist, thereby leaving the metal structure with a preset pattern.

The adjustment frequency of the SAW filter is mainly adjusted depending on the line width of the IDT electrode, i.e., the line width becomes smaller as the frequency becomes higher, e.g., a line width of 1.9G is generally 0.5 μm, and a line width of 3.5G is generally 0.25 μm. With the development of technology, the application frequency of the SAW filter at high frequency, especially in the future 5G era, will become higher and higher, and the requirement for line width is more severe.

Disclosure of Invention

Technical problem to be solved by the invention

However, in the existing SAW filter manufacturing method, due to the limitation of negative glue and stripping process, when the line width of the IDT electrode is less than 0.5 μm, the exposure and stripping process cannot be completed basically, and the morphology of the electrode is difficult to control, which limits the application of the SAW filter product in the high frequency field.

In addition, because the interaction force among atoms in the piezoelectric material of the existing SAW filter generally shows negative temperature characteristics, namely, the interaction force among atoms is weakened along with the increase of temperature, which causes the elastic coefficient of the piezoelectric material to be reduced. The resonant frequency of the SAW filter is proportional to the elastic coefficient of the piezoelectric material, and therefore, as the temperature increases, the resonant frequency of the SAW filter decreases. This temperature-frequency drift characteristic affects the application of SAW filters in rf terminals, and thus in electrical applications, the SAW filter needs to be correspondingly temperature compensated to improve its frequency stability.

The present invention has been made in view of the above-mentioned conventional problems, and an object of the present invention is to provide a method for manufacturing a metal electrode, which can complete an exposure and lift-off process when an IDT electrode line is wide, and can control the shape of an electrode to obtain a metal electrode having a trapezoidal SiO layer formed on the surface thereof₂The dielectric layer is in a novel fully-buried IDT electrode form covering the electrodes, thereby reducing the temperature coefficient of frequency and suppressing frequency drift.

Technical scheme for solving technical problem

In one embodiment of the present invention for solving the above problems, there is provided a manufacturing method for manufacturing a metal electrode, comprising:

coating photoresist on a piezoelectric material substrate to form a first photoresist layer;

patterning the first photoresist layer to form a first pattern;

etching the piezoelectric material substrate based on the first pattern to form a filling groove;

removing the first photoresist layer;

depositing a metal material on the piezoelectric material substrate, so that the metal material fills the filling groove to form an electrode metal layer;

grinding the piezoelectric material substrate and the electrode metal layer so that an exposed surface of the piezoelectric material substrate is flush with an exposed surface of the electrode metal layer;

forming a first dielectric layer on the exposed surface of the piezoelectric material substrate and the exposed surface of the electrode metal layer;

coating photoresist on the first dielectric layer to form a second photoresist layer;

patterning the second photoresist layer to form a second pattern;

etching the first dielectric layer based on the second pattern to form an electrode protection layer pattern;

removing the second photoresist layer; and

and forming a second dielectric layer on the electrode protection layer pattern and the piezoelectric material substrate.

In one embodiment of the present invention, in the manufacturing method, the second dielectric layer covers the electrode metal layer and has a trapezoidal cross section.

In one embodiment of the present invention, in the manufacturing method, a width of the first pattern is the same as a width of the second pattern.

In one embodiment of the present invention, in the manufacturing method, the piezoelectric material substrate is formed of lithium tantalate or lithium lithiate.

In one embodiment of the present invention, in the manufacturing method, the electrode metal layer is an Al layer, an Al/Cu combined layer, a Ti/Al/Cu combined layer, or a Pt layer.

In one embodiment of the present invention, in the manufacturing method, the thickness of the first photoresist layer and the thickness of the second photoresist layer are 1um to 2 um.

In one embodiment of the present invention, in the manufacturing method, the first dielectric layer and the second dielectric layer are made of SiO₂And (4) forming.

In one embodiment of the present invention, in the manufacturing method, the depth of the buried trench is 20nm to 100 nm.

In one embodiment of the present invention, in the manufacturing method, the thickness of the first dielectric layer is 100nm to 500 nm.

In one embodiment of the present invention, there is provided a metal electrode manufactured by any one of the above manufacturing methods.

Effects of the invention

According to the invention, the exposure and stripping process can be completed when the width of the IDT electrode wire is small, and the appearance of the electrode can be controlled.

In addition, according to the invention, a layer of SiO is added on the periphery of the IDT metal layer through step-by-step coating₂To suppress temperature drift and thereby reduce the frequency temperature coefficient of the IDT electrode.

In addition, according to the present invention, a novel method for manufacturing a fully-buried IDT electrode structure can be obtained, which improves the electromechanical coupling coefficient and Q value (also referred to as quality factor) and effectively suppresses noise by forming a trapezoidal structure when a dielectric layer is plated on the surface thereof through a dielectric layer plating film.

Drawings

So that the manner in which the above recited features of the present invention can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings, where like reference numerals have been used, where possible, to designate like elements that are common to the figures. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments, wherein:

fig. 1 is a schematic view of a IDT copper process manufacturing method of a high-frequency SAW according to a comparative example of the related art.

Fig. 2 is a schematic diagram of a method of manufacturing a metal electrode of a temperature compensation type SAW (TC-SAW) filter according to an embodiment of the present invention.

Fig. 3 is a process flow diagram of a method of manufacturing a metal electrode of a TC-SAW filter according to an embodiment of the present invention.

It is contemplated that elements of one embodiment of the present invention may be beneficially utilized on other embodiments without further recitation.

Detailed Description

Other advantages and technical effects of the present invention will be apparent to those skilled in the art from the disclosure of the present specification, which is described in the following detailed description. The present invention is not limited to the following embodiments, and various other embodiments may be implemented or applied, and various modifications and changes may be made in the details of the present description without departing from the spirit of the present invention.

Hereinafter, a detailed description will be given of a specific embodiment of the present invention based on the drawings. The drawings are for simplicity and clarity and are not intended to be drawn to scale, reflecting the actual dimensions of the structures described. To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. The figures are not drawn to scale and may be simplified for clarity. Elements and features of one embodiment may be advantageously incorporated in other embodiments without further recitation.

Comparative example (Prior Art)

Hereinafter, a method of manufacturing an IDT copper process of a high-frequency SAW filter of the related art as a comparative example of the related art will be described with reference to fig. 1.

Fig. 1 is a schematic diagram of an IDT copper process manufacturing method of a high-frequency SAW filter according to a comparative example of the related art.

The process starts in step a of fig. 1. In step a, a piezoelectric material substrate 1 is provided.

Next, in step b, a dielectric material (e.g., SiO) is deposited on the substrate 1₂) To form a first dielectric layer 2.

In step c, a positive photoresist is coated to form a positive photoresist layer, and after the positive photoresist layer is patterned (e.g., by exposure, development, etc.), an IDT pattern is formed. For example, the first dielectric layer 2 is etched using a dry etching process to form a film topography corresponding to the IDT pattern, and the positive photoresist is removed.

In step d, deposition of IDT metal layer 3 is performed, wherein at least the top layer of IDT metal layer 3 is Cu.

In step e, the IDT metal layer 3 is polished using a Chemical Mechanical Polishing (CMP) process. Grinding is performed until the IDT metal layer 3 is flush with the first dielectric layer 2, thereby forming discrete IDT metal structures 3a corresponding to the IDT pattern, and the thickness of the IDT metal structures 3a is the same as that of the first dielectric layer 2, as shown by e in fig. 1. The main process principle of CMP is that chemical substances react with substances on the surface of a wafer to form new compounds, and then the chemical compounds are removed by mechanical polishing using fine particles in slurry.

In step f, a positive photoresist is applied to form a second positive photoresist layer, and the second positive photoresist layer is patterned (e.g., by exposure, development, etc.) on the basis of the IDT pattern, thereby forming a lifted-off region of the first dielectric layer 2. Wherein the stripped region of the first dielectric layer 2 is limited to a certain distance outside the side wall of the IDT metal structure 3 a. And stripping the dielectric material in the stripping area by adopting a dry process or a wet process so as to leave a reserved layer 2a on the side wall of the metal structure 3a, and then removing the positive photoresist.

In step g, a second deposition of the above-mentioned dielectric material is performed on the surface of the structure formed in step f, thereby forming a second dielectric layer 4. The second dielectric layer 4 covers the surface of the IDT metal structure 3a for adjusting the frequency.

In step h, the second dielectric layer 4 of a predetermined region (e.g., the top of a portion of the IDT metal structure) is opened to obtain a connection hole 5, thereby forming a final pattern.

At this point, the final structure is formed and the method ends.

< embodiment of the invention >

Hereinafter, a method for manufacturing a metal electrode according to the present invention will be specifically described with reference to fig. 2 and 3.

Fig. 2 is a schematic diagram of a method of manufacturing a metal electrode of the TC-SAW filter according to the present embodiment. Fig. 3 is a process flow chart of a method of manufacturing a metal electrode of a TC-SAW filter according to the present embodiment. In the present embodiment, the IDT metal electrode used in the manufacturing method for manufacturing the TC-SAW filter is described as an example, but the manufacturing method of the present invention is not limited to this, and the manufacturing method of the present invention may be used to manufacture other types of electrodes having a structure similar to that of the IDT metal electrode in the present embodiment in other types of devices.

The method for manufacturing the metal electrode of the TC-SAW filter of the present embodiment starts at step S302. In this step S302, as shown in a in fig. 2, the piezoelectric material substrate 1 may be provided. The piezoelectric material substrate 1 may be formed of, for example, lithium tantalate or a lithium tantalate wafer or the like.

Next, in step S304, a positive photoresist may be coated on the piezoelectric material substrate 1 to form a first positive photoresist layer 2, as shown in b of fig. 2. As a non-limiting example, the positive photoresist may include a novolac resin. The thickness of the first positive photoresist layer 1 can range from 1um to 2um, for example, 1.2um, which can be adjusted according to the product design requirement.

In step S306, the first positive photoresist layer 1 may be patterned (e.g., by exposure, development, etc.) to form a first pattern 2a, as shown in c of fig. 2. The line width of the first pattern 2a (which is equivalent to the finger electrode width) can be adjusted according to the actual product requirement, and the line width can range from 200nm to 500nm, for example, 300 nm.

In step S308, as shown in d in fig. 2, an etching process, such as a dry etching process, may be used to form a buried trench 1a on the piezoelectric material substrate 1 according to the first pattern 2a, and the depth of the buried trench 1a may be in a range of 20 to 100nm, for example, 50nm, which may be adjusted according to product design requirements.

In step S310, the first positive photoresist layer 1 may be removed, as shown by e in fig. 2. As an example, the first positive photoresist layer 1 may be dissolved by a wet process.

In step S312, a metal material (e.g., Al, Cu, Ti, Pt) may be deposited on the piezoelectric material substrate 1 until the metal material fills the buried trenches 1a on the piezoelectric material substrate 1 (alternatively, the metal material may be deposited until the buried trenches 1a overflow) to form the electrode metal layer 3, as shown by f in fig. 2. The electrode metal layer 3 can be deposited by sputtering or evaporation. The electrode metal layer 3 may be Al or a combination of metal layers with a top layer comprising Al, such as Al, Al/Cu, Ti/Al/Cu, Pt, etc. The thickness of the electrode metal layer 3 may be about 50nm to 200nm, for example, 100nm, to facilitate precise control of the thickness of the IDT electrode structure. The material and/or thickness of the electrode metal layer 3 may be adjusted according to product design requirements.

In step S314, as shown in g in fig. 2, a polishing process such as a CMP (chemical mechanical polishing) process may be employed to polish the portion of the electrode metal layer 3 that overflows the filling trench 1a flat so that the exposed surface of the piezoelectric material substrate 2 is flush with the exposed surface of the IDT metal layer 3 to form IDT metal structures 3a (i.e., IDT metal electrodes 3a) that are separated from each other corresponding to the first pattern 2 a.

In step S316, a dielectric material may be deposited on the exposed surface of the piezoelectric material substrate 1 and the exposed surface of the electrode metal layer 3 to form a first dielectric layer 4 for protecting the electrodes, as shown by h in fig. 2. The dielectric material constituting the first dielectric layer 4 may for example comprise SiO₂. The first dielectric layer 4 may be deposited by a deposition method such as Chemical Vapor Deposition (CVD), Physical Vapor Deposition (PVD), and/or PECVD (plasma enhanced chemical vapor deposition). The thickness of the first dielectric layer 4 may be in the range of 100nm to 500nm, for example, 200nm, which can be adjusted according to the product design requirement.

In step S318, a positive photoresist may be coated on the first dielectric layer 4 to form a second positive photoresist layer 5, as shown by i in fig. 2. The thickness of the second positive photoresist layer 5 can range from 1um to 2um, for example, 1.2um, which can be adjusted according to the product design requirements.

In step S320, the second positive photoresist layer 5 may be patterned (e.g., by exposure, development, etc.) to form a lift-off pattern 5a (hereinafter, referred to as a second pattern 5a) of the first dielectric layer 4, as indicated by j in fig. 2. The width of the second pattern 5a may be the same as the width of the IDT metal electrode 3 a. Accordingly, the width of the second pattern 5a may be the same as the width of the first pattern 2 a.

In step S322, the first dielectric layer 4 may be etched by using an etching process, such as a dry etching process, to etch the electrode protection layer pattern 4a according to the second pattern 5a, as shown by k in fig. 2. The width of the electrode protection layer pattern 4a may be the same as the width of the IDT metal electrode 3 a. Accordingly, the width of the electrode protection layer pattern 4a may be the same as the width of the first pattern 2 a.

In step S324, the second positive photoresist layer 5 may be removed, as indicated by l in fig. 2. As an example, the second positive photoresist layer 5 may be dissolved by a wet process.

In step S326, a second dielectric layer 6 may be deposited on the electrode protection layer pattern 4a and the piezoelectric material substrate 1, as indicated by m in fig. 2Shown in the figure. The dielectric material constituting the second dielectric layer 6 is preferably SiO₂. The second dielectric layer 6 may be deposited by a deposition method such as Chemical Vapor Deposition (CVD), Physical Vapor Deposition (PVD) and/or PECVD (plasma enhanced chemical vapor deposition).

At this point, the final structure is formed and the method ends.

In some embodiments, the operations included in the methods in the embodiments described above may occur simultaneously, substantially simultaneously, or in a different order than shown in the figures.

In some embodiments, all or part of the operations included in the methods in the above embodiments may optionally be performed automatically by a program. In one example, the present invention may be implemented as a program product stored on a computer-readable storage medium for use with a computer system. The program(s) of the program product comprise functions of the embodiments (including the methods described herein). Illustrative computer-readable storage media include, but are not limited to: (i) non-writable storage media (e.g., read-only memory devices within a computer such as CD-ROM disks readable by a CD-ROM machine, flash memory, ROM chips or any type of solid-state non-volatile semiconductor memory) on which information is permanently stored; and (ii) writable storage media (e.g., disk storage or hard disk drives or any type of solid-state random-access semiconductor memory) on which alterable information is stored. Such computer-readable storage media, when carrying computer-readable instructions that direct the functions of the methods described herein, are embodiments of the present invention.

< comparison between the present invention and comparative example >

A dielectric layer (e.g., SiO) is added to the periphery of the IDT electrode₂) The invention further suppresses the temperature drift by utilizing the formed dielectric layer with the trapezoidal structure through step-by-step film coating (namely, step-by-step forming of the trapezoidal structure on the metal electrode). Therefore, the invention realizes the technical effects of reducing the temperature coefficient of the frequency and restraining the frequency drift.

In addition, the dielectric layer formed by the electrode manufacturing method of the invention has a trapezoidal structure, and the trapezoidal structure can effectively inhibit Rayleigh-mode spurious responses (Rayleigh-mode spurious responses), thereby effectively inhibiting clutter.

In addition, in the TC-SAW filter, stray waves such as lateral modes are generated when the electrodes are buried in silicon oxide. Embedding the electrodes in the piezoelectric layer as described herein suppresses the lateral modes and increases the Q of the TC-SAW filter. Also, embedding the electrodes in the piezoelectric layer as described herein can effectively suppress waveguide modes in the transducer and reduce resistive losses, improve high frequency switching, and increase the electromechanical coupling coefficient.

Alternative embodiments of the present invention are described in detail above. It will, however, be appreciated that various embodiments and modifications may be made thereto without departing from the broader spirit and scope of the invention. Many modifications and variations will be apparent to those of ordinary skill in the art in light of the above teachings without undue experimentation. Therefore, the technical solutions available to those skilled in the art through logic analysis, reasoning and limited experiments based on the prior art according to the concept of the present invention should fall within the scope of protection defined by the claims of the present invention.