阅读说明：本技术 倍增式信号处理器具的方法 (Method for multiplying signal processing apparatus ) 是由 段引旺 于 2019-10-10 设计创作，主要内容包括：一种倍增式信号处理器具的方法,构建激活指令操纵所述信号的处理流程方式包括：构建激活指令一操纵相位偏移导进指令窄带宽部分处理的过程；构建激活指令二操纵把相位偏移导进指令执行扩大式倍增过程；构建激活指令三操纵相位偏移导出指令宽带宽部分处理的过程；有效避免了现有技术中涵盖的信号百分比区域小、处理误差大的缺陷。(A method of multiplying a signal processing appliance, the process flow of constructing an activation instruction to manipulate the signal comprising: constructing an activation instruction-a process for manipulating the narrow bandwidth part of the phase offset lead-in instruction; constructing an activation instruction II to operate and lead the phase offset into an instruction to execute an expanding multiplication process; constructing a process for activating the processing of the wide bandwidth part of the instruction three-manipulation phase offset derivation instruction; the defects of small percentage area of signals and large processing error in the prior art are effectively avoided.)

1. A method of multiplying a signal processing apparatus, comprising sequentially performing the following:

(1): the phase offset lead-in instruction comprises a wide bandwidth part instruction and a narrow bandwidth part instruction, and the wide bandwidth part instruction in the phase offset lead-in instruction is subjected to expanding multiplication to derive a phase offset lead-out instruction;

(2): processing the peak value of the narrow bandwidth part instruction in the phase shift lead-in instruction, comparing the peak value with a set critical number one, and leading out a contrast value one;

(3): the phase deviation deriving instruction comprises a wide bandwidth part instruction and a narrow bandwidth part instruction, the peak value of the wide bandwidth part instruction in the phase deviation deriving instruction is processed, and after the peak value is compared with a set critical number two, a comparison value two is derived;

(4): acquiring the first contrast value and the second contrast value, and constructing a processing process for activating an instruction to manipulate the signal;

the processing flow way for constructing the activation instruction to manipulate the signal comprises the following steps: constructing an activation instruction-a process for manipulating the narrow bandwidth part of the phase offset lead-in instruction; constructing an activation instruction II to operate and lead the phase offset into an instruction to execute an expanding multiplication process; a process is constructed that activates the instruction triple steering phase offset derivation instruction wide bandwidth portion processing.

2. The method of a multiplying signal processor as defined in claim 1 wherein processing the peak mode of the narrow bandwidth portion of the phase offset lead in command comprises: the peak value of the narrow bandwidth part of the phase offset lead-in command in a set bandwidth area is processed.

3. The method of multiplying signal processing appliance of claim 2, wherein processing the peak mode of the wide bandwidth portion of the phase offset derivation instruction comprises: the phase offset derivation instruction is processed for the wide bandwidth portion of the instruction and for peaks in the set bandwidth two region.

4. The method of multiplying signal processing apparatus of claim 2 wherein said program manipulation component processes said consistent instance of said first or second contrast value a number of times, and wherein an internal program-given value of said program manipulation component can be replaced after a number of consistent instances of said processing occurs without interruption by said processing instance; and selecting the value with larger occurrence number to be interpreted as the derived value of the program control component.

Technical Field

The invention relates to the technical field of signal processing appliances, in particular to a method of a multiplication type signal processing appliance.

Background

During development and use of the present method, it is common to incorporate a low decibel component house signal channel's lead-in head that handles a larger signal percentage area as a signaling situation handling component. But during the development of low decibel devices, a larger percentage of signal area is covered and more processing errors are reduced.

Disclosure of Invention

In order to solve the above problems, the present invention provides a method for a multiplication-type signal processor, which effectively avoids the defects of small percentage area of signals and large processing error in the prior art.

In order to overcome the defects in the prior art, the invention provides a solution of a method for a multiplication type signal processing apparatus, which comprises the following steps:

a method of multiplying a signal processing appliance comprising the following performed sequentially:

(1): the phase offset lead-in instruction comprises a wide bandwidth part instruction and a narrow bandwidth part instruction, and the wide bandwidth part instruction in the phase offset lead-in instruction is subjected to expanding multiplication to derive a phase offset lead-out instruction;

(2): processing the peak value of the narrow bandwidth part instruction in the phase shift lead-in instruction, comparing the peak value with a set critical number one, and leading out a contrast value one;

(3): the phase deviation deriving instruction comprises a wide bandwidth part instruction and a narrow bandwidth part instruction, the peak value of the wide bandwidth part instruction in the phase deviation deriving instruction is processed, and after the peak value is compared with a set critical number two, a comparison value two is derived;

(4): acquiring the first contrast value and the second contrast value, and constructing a processing process for activating an instruction to manipulate the signal;

the processing flow way for constructing the activation instruction to manipulate the signal comprises the following steps: constructing an activation instruction-a process for manipulating the narrow bandwidth part of the phase offset lead-in instruction; constructing an activation instruction II to operate and lead the phase offset into an instruction to execute an expanding multiplication process; a process is constructed that activates the instruction triple steering phase offset derivation instruction wide bandwidth portion processing.

The processing of the peak mode of the narrow bandwidth portion of the phase offset lead-in instruction includes: the peak value of the narrow bandwidth part of the phase offset lead-in command in a set bandwidth area is processed.

The processing a peak mode of a wide bandwidth portion of a phase offset derivation instruction comprises: the phase offset derivation instruction is processed for the wide bandwidth portion of the instruction and for peaks in the set bandwidth two region.

The program control component processes the consistent condition value of the first contrast value or the second contrast value for a plurality of times, and the program control component can replace the program in the program control component to give a value after the consistent value occurs for a plurality of times continuously from the processed condition value; and selecting the value with larger occurrence number to be interpreted as the derived value of the program control component.

The invention has the beneficial effects that:

wide bandwidth-multiplying components may be imparted by terminating unnecessary processing components and recycling signal channels during processing with or without concomitant signaling, thus achieving reduced performance in developing common loss.

Detailed Description

The present invention will be further described with reference to the following examples.

The method of the multiplying signal processing apparatus of the present embodiment includes the following modes performed sequentially:

(1): the phase offset lead-in instruction comprises a wide bandwidth part instruction and a narrow bandwidth part instruction, and the wide bandwidth part instruction in the phase offset lead-in instruction is subjected to expanding multiplication to derive a phase offset lead-out instruction;

(2): processing the peak value of the narrow bandwidth part instruction in the phase shift lead-in instruction, comparing the peak value with a set critical number one, and leading out a contrast value one;

(3): the phase deviation deriving instruction comprises a wide bandwidth part instruction and a narrow bandwidth part instruction, the peak value of the wide bandwidth part instruction in the phase deviation deriving instruction is processed, and after the peak value is compared with a set critical number two, a comparison value two is derived;

(4): acquiring the first contrast value and the second contrast value, and constructing a processing process for activating an instruction to manipulate the signal;

the processing flow way for constructing the activation instruction to manipulate the signal comprises the following steps: constructing an activation instruction-a process for manipulating the narrow bandwidth part of the phase offset lead-in instruction; constructing an activation instruction II to operate and lead the phase offset into an instruction to execute an expanding multiplication process; a process is constructed that activates the instruction triple steering phase offset derivation instruction wide bandwidth portion processing.

The processing of the peak mode of the narrow bandwidth portion of the phase offset lead-in instruction includes: the peak value of the narrow bandwidth part of the phase offset lead-in command in a set bandwidth area is processed.

The processing a peak mode of a wide bandwidth portion of a phase offset derivation instruction comprises: the phase offset derivation instruction is processed for the wide bandwidth portion of the instruction and for peaks in the set bandwidth two region.

The program control component processes the consistent condition value of the first contrast value or the second contrast value for a plurality of times, and the program control component can replace the program in the program control component to give a value after the consistent value occurs for a plurality of times continuously from the processed condition value; and selecting the value with larger occurrence number to be interpreted as the derived value of the program control component.

Wide bandwidth-multiplying components may be imparted by terminating unnecessary processing components and recycling signal channels during processing with or without concomitant signaling, thus achieving reduced performance in developing common loss.

The present invention has been described above by way of embodiments, and it will be understood by those skilled in the art that the present disclosure is not limited to the above-described embodiments, and various changes, modifications and substitutions may be made without departing from the scope of the present invention.