Three-phase solid-state switch test circuit and test method

文档序号:734111 发布日期:2021-04-20 浏览:2次 中文

阅读说明:本技术 三相固态开关测试电路及测试方法 (Three-phase solid-state switch test circuit and test method ) 是由 张烨 李子欣 高范强 徐飞 李耀华 于 2020-12-14 设计创作,主要内容包括:本发明属于双向晶闸管固态开关领域,具体涉及了一种三相固态开关测试电路及测试方法,旨在解决现有的单相LC谐振电路的测试结果无法精确描述三相固态开关的关断电流特性的问题。本发明包括:时序发生器控制每一条支路上的双向晶闸管的触发时刻;触发B相开关滞后A相开关1/3个谐振周期导通、C相开关滞后B相开关1/3个谐振周期导通;三相支路依次谐振产生高电压、高电流后,使中线开关关断;控制三相开关的触发信号最后同时复位为低电平,当三相电流全部为零后,三相开关全部关断。本发明能够测试高电压、高电流应用场合下的双向晶闸管三相固态开关整机的关断电流特性,测试结果更加准确,测试过程简单、高效。(The invention belongs to the field of bidirectional thyristor solid-state switches, particularly relates to a three-phase solid-state switch test circuit and a test method, and aims to solve the problem that the turn-off current characteristic of a three-phase solid-state switch cannot be accurately described by the test result of an existing single-phase LC resonance circuit. The invention comprises the following steps: the time sequence generator controls the trigger time of the bidirectional thyristor on each branch circuit; the B-phase switch is triggered to be switched on after the A-phase switch is switched on for 1/3 resonance periods, and the C-phase switch is triggered to be switched on after the B-phase switch is switched on after 1/3 resonance periods; after the three-phase branch circuits sequentially resonate to generate high voltage and high current, the neutral switch is turned off; and finally, simultaneously resetting the trigger signals for controlling the three-phase switches to be low level, and turning off all the three-phase switches when the three-phase currents are all zero. The invention can test the turn-off current characteristic of the complete machine of the bidirectional thyristor three-phase solid-state switch in high-voltage and high-current application occasions, the test result is more accurate, and the test process is simple and efficient.)

1. A three-phase solid-state switch test circuit is characterized by comprising an A-phase branch, a B-phase branch, a C-phase branch, a neutral line branch and a time sequence generator;

the A-phase branch is used for connecting an A-phase switch in a tested three-phase solid-state switch and providing a current flowing path for testing the A-phase switch;

the B-phase branch is used for connecting a B-phase switch in the tested three-phase solid-state switch and providing a current flowing path for testing the B-phase switch;

the C-phase branch is used for connecting a C-phase switch in the tested three-phase solid-state switch and providing a current flowing path for testing the C-phase switch;

the neutral line branch circuit is a path for generating resonant current for the phase A branch circuit, the phase B branch circuit and the phase C branch circuit to provide current circulation;

the time sequence generator is used for sending out a time sequence trigger signal according to the test requirement; the time sequence trigger signals comprise an A-phase trigger signal P1, a B-phase trigger signal P2, a C-phase trigger signal P3 and a neutral line trigger signal P4, and the A-phase trigger signal P1, the B-phase trigger signal P2, the C-phase trigger signal P3 and the neutral line trigger signal P4 are respectively used for controlling the on-off of a corresponding phase switch of the tested three-phase solid-state switch and the on.

2. The three-phase solid state switch test circuit of claim 1, wherein the a-phase leg comprises a resonant capacitor C1, a resistive-inductive load RL1, and a current measurement module Ia;

the negative electrode of the resonant capacitor C1 is connected to the point m, and the negative electrode of the current measurement module Ia is connected to the point n;

the anode of the resonant capacitor C1 is connected to the anode of the A-phase switch of the tested three-phase solid-state switch;

the anode of the resistive load RL1 is connected to the cathode of the A-phase switch of the tested three-phase solid-state switch, and the cathode of the resistive load RL1 is connected to the anode of the current measurement module Ia.

3. The three-phase solid state switch test circuit of claim 1, wherein the B-phase leg comprises a resonant capacitor C2, a resistive-inductive load RL2, and a current measurement module Ib;

the negative electrode of the resonant capacitor C2 is connected to the point m, and the negative electrode of the current measurement module Ib is connected to the point n;

the anode of the resonant capacitor C2 is connected to the anode of the B-phase switch of the tested three-phase solid-state switch;

the positive electrode of the resistance-inductance load RL2 is connected to the negative electrode of the B-phase switch of the tested three-phase solid-state switch, and the negative electrode of the resistance-inductance load RL2 is connected to the positive electrode of the current measurement module Ib.

4. The three-phase solid state switch test circuit of claim 1, wherein the C-phase branch comprises a resonant capacitor C3, a resistive-inductive load RL3, and a current measurement module Ic;

the negative electrode of the resonant capacitor C3 is connected to the point m, and the negative electrode of the current measurement module Ic is connected to the point n;

the anode of the resonant capacitor C3 is connected to the anode of the C-phase switch of the tested three-phase solid-state switch;

the anode of the resistive load RL3 is connected to the cathode of the C-phase switch of the tested three-phase solid-state switch, and the cathode of the resistive load RL3 is connected to the anode of the current measurement module Ic.

5. The three-phase solid state switch test circuit of claim 1, wherein the neutral leg comprises a neutral switch and a current measurement module In;

the anode of the neutral line switch is connected to a point m, and the anode of the current measurement module In is connected to a point n;

the negative pole of the neutral line switch is connected to the negative pole of the current measurement module In.

6. A three-phase solid-state switch test method, based on the three-phase solid-state switch test circuit of any one of claims 1 to 6, the test method comprising an on-timing control process and an off-timing control process.

7. The method of claim 6, wherein the turn-on timing control process comprises:

step A10, connecting a tested three-phase solid-state switch with the three-phase solid-state switch test circuit;

step A20, controlling a neutral line trigger signal P4 of a neutral line switch to be at a high level at the initial test time;

in step a30, the a-phase trigger signal P1 is set to a high level, the B-phase trigger signal P2 is set to a high level at a time point which lags 1/3 resonance cycles of the a-phase trigger signal P1, and the C-phase trigger signal P3 is set to a high level at a time point which lags 1/3 resonance cycles of the B-phase trigger signal P2, so that the a-phase switch is triggered to turn on, the B-phase switch is triggered to turn on for a lag of 1/3 resonance cycles, and the C-phase switch is triggered to turn on for a lag of 1/3 resonance cycles.

8. The three-phase solid-state switch testing method of claim 6, wherein the turn-off timing control process comprises:

step B10, after the three-phase switches of the tested three-phase solid-state switch are all turned on and the three-phase currents start to vibrate respectively at intervals of 1/3 resonance periods, resetting the neutral line trigger signal P4 for controlling the neutral line switch to be at a low level, and after the current flowing through the neutral line branch passes zero, turning off the neutral line switch;

step B20, after the neutral switch is turned off, the A-phase trigger signal P1, the B-phase trigger signal P2 and the C-phase trigger signal P3 are reset to low level at the same time, and when one phase of branch current in the three-phase branch current passes through zero, the phase switch is turned off;

and step B30, after the other two-phase current is attenuated to zero, the other two-phase switch is turned off.

Technical Field

The invention belongs to the field of bidirectional thyristor solid-state switches, and particularly relates to a three-phase solid-state switch test circuit and a test method.

Background

Compared with the traditional mode of switching on and off a circuit by adopting a mechanical Switch, the Solid State Switch (SSS) based on the power electronic technology has the advantages of no metal contact, no breaking electric arc, high switching speed, long service life and the like, and has great application value in occasions with high requirements on the switching-off current speed.

At present, the theoretical research and industrial application of the solid-state switch using the thyristor as the switching device are well developed. Because thyristors have the strongest current breaking and breaking capability in semiconductor devices, thyristor solid state switches are often used to break high voltage, high current, high power circuits. Before the solid-state switch leaves a factory, a test circuit is required to test the technical indexes of the solid-state switch. Considering the application occasions of high voltage and high current, the adopted more mature test circuit for the test circuit of the single-phase solid-state switch of the bidirectional thyristor is a single-phase LC resonance circuit [1], and the test circuit for the three-phase solid-state switch of the bidirectional thyristor has no practical and feasible test circuit at present. After the trigger signal of the trigger thyristor is removed, the thyristor can be turned off only after the current flowing through the thyristor crosses zero. The zero-crossing moments of the three-phase currents are different, the three-phase solid-state switch is influenced by the other two-phase currents when the current of each phase is switched off, and the current switching-off process is different from that of a single-phase solid-state switch. Therefore, the test result of the turn-off current of the solid-state switch of the bidirectional thyristor of each phase is respectively tested through the single-phase LC resonance circuit, so that the test result of the turn-off current of the three-phase solid-state switch is incomplete, and the turn-off current characteristic of the whole three-phase solid-state switch cannot be accurately described.

In view of the above problems, there is still a need in the art for a test circuit that can be used to test the turn-off current characteristics of a triac three-phase solid-state switch under high voltage and high current applications.

The following documents are background information related to the present invention:

[1] bang, tanglingfu, zhao, mudong, lou, a hybrid dc breaker and a dc, CN111585258A, 20200706.

Disclosure of Invention

In order to solve the problems in the prior art, namely the problem that the test result of the existing single-phase LC resonance circuit cannot accurately describe the turn-off current characteristic of the whole three-phase solid-state switch, the invention provides a three-phase solid-state switch test circuit, which comprises an A-phase branch, a B-phase branch, a C-phase branch, a neutral-line branch and a time sequence generator;

the A-phase branch is used for connecting an A-phase switch in a tested three-phase solid-state switch and providing a current flowing path for testing the A-phase switch;

the B-phase branch is used for connecting a B-phase switch in the tested three-phase solid-state switch and providing a current flowing path for testing the B-phase switch;

the C-phase branch is used for connecting a C-phase switch in the tested three-phase solid-state switch and providing a current flowing path for testing the C-phase switch;

the neutral line branch circuit is a path for generating resonant current for the phase A branch circuit, the phase B branch circuit and the phase C branch circuit to provide current circulation;

the time sequence generator is used for sending out a time sequence trigger signal according to the test requirement; the time sequence trigger signals comprise an A-phase trigger signal P1, a B-phase trigger signal P2, a C-phase trigger signal P3 and a neutral line trigger signal P4, and the A-phase trigger signal P1, the B-phase trigger signal P2, the C-phase trigger signal P3 and the neutral line trigger signal P4 are respectively used for controlling the on-off of a corresponding phase switch of the tested three-phase solid-state switch and the on;

in some preferred embodiments, the a-phase branch comprises a resonant capacitor C1, a resistive-inductive load RL1 and a current measurement module Ia;

the negative electrode of the resonant capacitor C1 is connected to the point m, and the negative electrode of the current measurement module Ia is connected to the point n;

the anode of the resonant capacitor C1 is connected to the anode of the A-phase switch of the tested three-phase solid-state switch;

the anode of the resistive load RL1 is connected to the cathode of the A-phase switch of the tested three-phase solid-state switch, and the cathode of the resistive load RL1 is connected to the anode of the current measurement module Ia.

In some preferred embodiments, the B-phase branch comprises a resonant capacitor C2, a resistive-inductive load RL2 and a current measurement module Ib;

the negative electrode of the resonant capacitor C2 is connected to the point m, and the negative electrode of the current measurement module Ib is connected to the point n;

the anode of the resonant capacitor C2 is connected to the anode of the B-phase switch of the tested three-phase solid-state switch;

the positive electrode of the resistance-inductance load RL2 is connected to the negative electrode of the B-phase switch of the tested three-phase solid-state switch, and the negative electrode of the resistance-inductance load RL2 is connected to the positive electrode of the current measurement module Ib.

In some preferred embodiments, the C-phase branch comprises a resonant capacitor C3, a resistive-inductive load RL3 and a current measurement module Ic;

the negative electrode of the resonant capacitor C3 is connected to the point m, and the negative electrode of the current measurement module Ic is connected to the point n;

the anode of the resonant capacitor C3 is connected to the anode of the C-phase switch of the tested three-phase solid-state switch;

the anode of the resistive load RL3 is connected to the cathode of the C-phase switch of the tested three-phase solid-state switch, and the cathode of the resistive load RL3 is connected to the anode of the current measurement module Ic.

In some preferred embodiments, the neutral branch comprises a neutral switch and a current measurement module In;

the anode of the neutral line switch is connected to a point m, and the anode of the current measurement module In is connected to a point n;

the negative pole of the neutral line switch is connected to the negative pole of the current measurement module In.

In another aspect of the present invention, a three-phase solid-state switch testing method is provided, which includes a turn-on timing control process and a turn-off timing control process based on the three-phase solid-state switch testing circuit.

In some preferred embodiments, the turn-on timing control process includes:

step A10, connecting a tested three-phase solid-state switch with the three-phase solid-state switch test circuit;

step A20, controlling a neutral line trigger signal P4 of a neutral line switch to be at a high level at the initial test time;

in step a30, the a-phase trigger signal P1 is set to a high level, the B-phase trigger signal P2 is set to a high level at a time point which lags 1/3 resonance cycles of the a-phase trigger signal P1, and the C-phase trigger signal P3 is set to a high level at a time point which lags 1/3 resonance cycles of the B-phase trigger signal P2, so that the a-phase switch is triggered to turn on, the B-phase switch is triggered to turn on for a lag of 1/3 resonance cycles, and the C-phase switch is triggered to turn on for a lag of 1/3 resonance cycles.

In some preferred embodiments, the turn-off timing control process includes:

step B10, after the three-phase switches of the tested three-phase solid-state switch are all turned on and the three-phase currents start to vibrate respectively at intervals of 1/3 resonance periods, resetting the neutral line trigger signal P4 for controlling the neutral line switch to be at a low level, and after the current flowing through the neutral line branch passes zero, turning off the neutral line switch;

step B20, after the neutral switch is turned off, the A-phase trigger signal P1, the B-phase trigger signal P2 and the C-phase trigger signal P3 are reset to low level at the same time, and when one phase of branch current in the three-phase branch current passes through zero, the phase switch is turned off;

and step B30, after the other two-phase current is attenuated to zero, the other two-phase switch is turned off.

The invention has the beneficial effects that:

(1) the invention relates to a three-phase solid-state switch test circuit, which directly designs a bidirectional thyristor three-phase solid-state switch complete machine working characteristic test circuit under high-voltage and high-current application occasions, aiming at the problem that the shut-off current characteristic of a complete machine of a three-phase solid-state switch cannot be accurately described in the test result of the three-phase solid-state switch equivalently by respectively testing the test result of each phase solid-state switch in the traditional technology, thereby improving the accuracy of the test result.

(2) The three-phase solid-state switch test circuit of the invention tests the working characteristics of the whole machine of the bidirectional thyristor three-phase solid-state switch under the application occasions of high voltage and high current through the whole circuit, and does not need to test each phase of switch by three times, thereby reducing the connection times in the test process, reducing the operation complexity, having simple test circuit and easy control method, and further improving the test efficiency.

Drawings

Other features, objects and advantages of the present application will become more apparent upon reading of the following detailed description of non-limiting embodiments thereof, made with reference to the accompanying drawings in which:

FIG. 1 is a schematic diagram of a three-phase solid state switch test circuit of the present invention;

FIG. 2 is a waveform diagram of a trigger signal of a timing generator according to an embodiment of the three-phase solid-state switch test circuit of the present invention;

FIG. 3 is a diagram of current waveforms of the phase A, B and C legs of a three-phase solid state switch test circuit according to an embodiment of the present invention;

fig. 4 is a current waveform diagram of a neutral branch of a three-phase solid-state switch test circuit according to an embodiment of the present invention.

Detailed Description

The present application will be described in further detail with reference to the following drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the relevant invention and not restrictive of the invention. It should be noted that, for convenience of description, only the portions related to the related invention are shown in the drawings.

It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the embodiments with reference to the attached drawings.

The invention provides a three-phase solid-state switch test circuit, which is characterized in that on the basis of the circuit topology, a three-phase LC resonance circuit sequentially resonates to generate high voltage and high current by controlling the conduction of bidirectional thyristor solid-state switches on four branches, and then a neutral switch is turned off. And finally, the three trigger signals for controlling the three-phase switch are simultaneously reset to be low level, so that the test of the turn-off current characteristic of the whole three-phase switch is completed, the test circuit is simple, the control method is easy to implement, and the method is suitable for engineering practice.

The invention discloses a three-phase solid-state switch test circuit, which comprises an A-phase branch, a B-phase branch, a C-phase branch, a neutral line branch and a time sequence generator:

the A-phase branch is used for connecting an A-phase switch in a tested three-phase solid-state switch and providing a current flowing path for testing the A-phase switch;

the B-phase branch is used for connecting a B-phase switch in the tested three-phase solid-state switch and providing a current flowing path for testing the B-phase switch;

the C-phase branch is used for connecting a C-phase switch in the tested three-phase solid-state switch and providing a current flowing path for testing the C-phase switch;

the neutral line branch circuit is a path for generating resonant current for the phase A branch circuit, the phase B branch circuit and the phase C branch circuit to provide current circulation;

the time sequence generator is used for sending out a time sequence trigger signal according to the test requirement; the time sequence trigger signals comprise an A-phase trigger signal P1, a B-phase trigger signal P2, a C-phase trigger signal P3 and a neutral line trigger signal P4, and the A-phase trigger signal P1, the B-phase trigger signal P2, the C-phase trigger signal P3 and the neutral line trigger signal P4 are respectively used for controlling the on-off of a corresponding phase switch of the tested three-phase solid-state switch and the on.

In order to more clearly describe the three-phase solid-state switch test circuit of the present invention, the following describes each module in the embodiment of the present invention in detail with reference to fig. 1.

The three-phase solid-state switch test circuit of the first embodiment of the invention comprises an A-phase branch, a B-phase branch, a C-phase branch, a neutral line branch and a time sequence generator, wherein each module is described in detail as follows:

the A-phase branch is used for connecting an A-phase switch of a tested three-phase solid-state switch and providing a current flowing path for testing the A-phase switch, and comprises a resonant capacitor C1, a resistance-inductance load RL1 and a current measuring module Ia:

the negative electrode of the resonant capacitor C1 is connected to the point m, and the negative electrode of the current measurement module Ia is connected to the point n; the anode of the resonant capacitor C1 is connected to the anode of the A-phase switch of the tested three-phase solid-state switch; the anode of the resistive load RL1 is connected to the cathode of the A-phase switch of the tested three-phase solid-state switch, and the cathode of the resistive load RL1 is connected to the anode of the current measurement module Ia.

The B-phase branch is used for connecting a B-phase switch of a tested three-phase solid-state switch and providing a current flowing path for testing the B-phase switch, and comprises a resonant capacitor C2, a resistance-inductance load RL2 and a current measurement module Ib:

the negative electrode of the resonant capacitor C2 is connected to the point m, and the negative electrode of the current measurement module Ib is connected to the point n; the anode of the resonant capacitor C2 is connected to the anode of the B-phase switch of the tested three-phase solid-state switch; the anode of the resistance-inductance load RL2 is connected to the cathode of the B-phase switch of the tested three-phase solid-state switch, and the cathode of the resistance-inductance load RL2 is connected to the anode of the current measurement module Ib.

The C-phase branch is used for connecting a C-phase switch of a tested three-phase solid-state switch and providing a current flowing path for testing the C-phase switch, and comprises a resonant capacitor C3, a resistance-inductance load RL3 and a current measurement module Ic:

the cathode of the resonant capacitor C3 is connected to the point m, and the cathode of the current measurement module Ic is connected to the point n; the anode of the resonant capacitor C3 is connected to the anode of the C-phase switch of the tested three-phase solid-state switch; the anode of the resistive load RL3 is connected to the cathode of the C-phase switch of the tested three-phase solid-state switch, and the cathode of the resistive load RL3 is connected to the anode of the current measurement module Ic.

The neutral line branch circuit is used for generating a path for providing current circulation for the A-phase branch circuit, the B-phase branch circuit and the C-phase branch circuit, and comprises a neutral line switch and a current measurement module In:

the anode of the neutral line switch is connected to the point m, and the anode of the current measurement module In is connected to the point n; the negative pole of the neutral switch is connected to the negative pole of the current measuring module In.

The time sequence generator is used for sending out a time sequence trigger signal according to the test requirement; the time sequence trigger signals comprise an A-phase trigger signal P1, a B-phase trigger signal P2, a C-phase trigger signal P3 and a neutral line trigger signal P4, and the A-phase trigger signal P1, the B-phase trigger signal P2, the C-phase trigger signal P3 and the neutral line trigger signal P4 are respectively used for controlling the on-off of a corresponding phase switch of the tested three-phase solid-state switch and the on.

The three-phase solid-state switches tested included an a-phase switch, a B-phase switch, and a C-phase switch:

the A-phase switch is a bidirectional thyristor formed by reversely connecting a thyristor T1 and a thyristor T2 in parallel, an A-phase trigger signal P1 is simultaneously connected with gate poles of the thyristors T1 and T2, and the thyristors T1 and T2 are triggered and controlled to be conducted;

the B-phase switch is a bidirectional thyristor formed by reversely connecting a thyristor T3 and a thyristor T4 in parallel, a B-phase trigger signal P2 is simultaneously connected with gate poles of the thyristors T3 and T4, and triggers and controls the conduction of the thyristors T3 and T4;

the C-phase switch is a bidirectional thyristor formed by reversely connecting the thyristor T5 and the thyristor T6 in parallel, and the C-phase trigger signal P3 is simultaneously connected with the gates of the thyristors T5 and T6 to trigger and control the conduction of the thyristors T5 and T6.

The neutral switch is a bidirectional thyristor formed by reversely connecting the thyristor T7 and the thyristor T8 in parallel, and a neutral trigger signal P4 is simultaneously connected with the gates of the thyristors T7 and T8 to trigger and control the conduction of the thyristors T7 and T8.

The resonance capacitor C1 in the A-phase branch, the inductor in the resistance-inductance load RL1 and the neutral line branch form an A-phase resonance network; a resonant capacitor C2 in the B-phase branch, an inductor in the resistance-inductance load RL2 and a neutral line branch form a B-phase resonant network; and a resonant capacitor C3 in the C-phase branch, an inductor in the resistance-inductance load RL3 and a neutral line branch form a C-phase resonant network.

The three-phase solid-state switch testing method according to the second embodiment of the present invention is based on the three-phase solid-state switch testing circuit, and includes a turn-on timing control process and a turn-off timing control process.

The on-timing control process includes:

step A10, connecting a tested three-phase solid-state switch with the three-phase solid-state switch test circuit;

step A20, controlling a neutral line trigger signal P4 of a neutral line switch to be at a high level at the initial test time;

in step a30, the a-phase trigger signal P1 is set to a high level, the B-phase trigger signal P2 is set to a high level at a time point which lags 1/3 resonance cycles of the a-phase trigger signal P1, and the C-phase trigger signal P3 is set to a high level at a time point which lags 1/3 resonance cycles of the B-phase trigger signal P2, so that the a-phase switch is triggered to turn on, the B-phase switch is triggered to turn on for a lag of 1/3 resonance cycles, and the C-phase switch is triggered to turn on for a lag of 1/3 resonance cycles.

The shutdown sequence control process includes:

step B10, after the three-phase switches of the tested three-phase solid-state switch are all turned on and the three-phase currents start to vibrate respectively at intervals of 1/3 resonance periods, resetting the neutral line trigger signal P4 for controlling the neutral line switch to be at a low level, and after the current flowing through the neutral line branch passes zero, turning off the neutral line switch; because the off-state impedance of the bidirectional thyristor is very large, after the neutral switch is turned off, the neutral branch is equivalent to an open circuit, the connection mode of m points of the A-phase branch, the B-phase branch and the C-phase branch is equivalent to the mode that three-phase Y is connected with a neutral point-free outgoing line, and the connection mode of n points of the A-phase branch, the B-phase branch and the C-phase branch is equivalent to the mode that three-phase Y is connected with a neutral point-free outgoing line.

Step B20, after the neutral switch is turned off, the A-phase trigger signal P1, the B-phase trigger signal P2 and the C-phase trigger signal P3 are reset to low level at the same time, and when one phase of branch current in the three-phase branch current passes through zero, the phase switch is turned off;

and step B30, after the other two-phase current is attenuated to zero, the other two-phase switch is turned off.

In the embodiment, the capacitance values of the selected resonant capacitor C1, the selected resonant capacitor C2 and the selected resonant capacitor C3 are all 0.2274mF, and the pre-charging voltage is all 14.14 kV; the resistance values of the resistive load RL1, the resistive load RL2 and the resistive load RL3 are all 20m Ω, and the inductance values are all 0.2274 mH.

As shown in fig. 2, a waveform diagram of trigger signals of a timing generator according to an embodiment of the three-phase solid-state switch testing circuit of the present invention is shown, wherein the abscissa represents time in units of s (seconds), the ordinate represents level states of the timing trigger signals P1, P2, P3 and P4, 1 represents high level, and 0 represents low level; at t1At the moment, the neutral line trigger signal P4 for controlling the neutral line switch is firstly set to high level, and then the A-phase trigger signal P1 for controlling the A-phase switch is set at t2B-phase trigger signal P2 set to high level at time and controlling B-phase switch at lag t2Time 1/3TrT of3Set the moment asHigh level C-phase trigger signal P3 for controlling C-phase switch at lag t3Time 1/3TrT of4Set high at the moment of time, thereby delaying the B-phase switch by the a-phase switch 1/3TrTriggering conduction, C phase switch lagging B phase switch 1/3TrTriggering and conducting; after the three-phase switches are all turned on, the neutral trigger signal P4 for controlling the neutral switch is at t5Resetting to a low level at all times, waiting for the current flowing through the neutral line branch to pass zero, and turning off the neutral line switch; an A-phase trigger signal P1 for controlling the A-phase switch, a B-phase trigger signal P2 for the B-phase switch, and a C-phase trigger signal P3 for the C-phase switch at t6Reset to low level, T, at the same timerIs the resonance period.

FIG. 3 is a diagram showing current waveforms of the A-phase branch, the B-phase branch and the C-phase branch of the three-phase solid-state switch testing circuit according to an embodiment of the present invention, at t1At that moment, no current flows in the three-phase branch. At t2、t3、t4At this time, the phase a current, the phase B current, and the phase C current start to rise in order. At t5Time of day, trigger signal P4Resetting to zero, waiting for the zero crossing of the current flowing through the neutral line branch, turning off the neutral line switch, and enabling the neutral line branch to be equivalent to an open circuit. At t6Time of day, trigger signal P1Trigger signal P2And a trigger signal P3And meanwhile, resetting to be a low level, and waiting for the zero crossing of one phase current in the three-phase current to turn off the phase switch. In this embodiment, the phase B current in the three-phase current first crosses zero, and the phase B switch is turned off first. And the A-phase current and the C-phase current are temporarily attenuated to zero, so that the A-phase switch and the C-phase switch are turned off, and finally, the three-phase switch is turned off completely.

FIG. 4 is a diagram of a current waveform of a neutral line branch of a three-phase solid-state switch test circuit according to an embodiment of the present invention, at t1At that moment, no current flows in the neutral line. At t2At this time, phase A current oscillates and flows through the neutral line. At t3At the moment, the phase B current starts to oscillate, and the superposed current of the phase A and the phase B flows through the neutral line. At t4At the moment, the C-phase current starts to oscillate, and the superposed currents of the A-phase, the B-phase and the C-phase flow through the neutral line. At t5Time of day, trigger signal P4Reset to zero, etcWhen the current flowing through the neutral line branch passes zero, the neutral line switch is turned off, and no current flows through the neutral line branch.

The current in the testing method is the resonance current generated by the three-phase LC resonance network, and the frequency f of the resonance currentrThe calculation method is shown as formula (1):

wherein, TrIs the resonance period; ciI is 1,2, and 3 are capacitance values of the resonant capacitor C1, the resonant capacitor C2, and the resonant capacitor C3, respectively, C1=C2=C3;LiI is the inductance values of the resistance-inductance load RL1, the resistance-inductance load RL2, and the resistance-inductance load RL3, respectively, L is 1,2, and 31=L2=L3

Maximum value of resonant current amplitude ImThe calculation method is shown as formula (2):

wherein, UiWhere i is 1,2,3 is resonance capacitor CiI is 1,2,3 precharge voltage, U1=U2=U3. It should be noted that the above calculation method is a calculation method in a theoretical model, and the resistance influence of the resistive load is not included. When the influence of the resistance is considered, the maximum value of the actual resonance current amplitude may be smaller than the result calculated by equation (2).

It can be clearly understood by those skilled in the art that, for convenience and brevity of description, the specific working process and related descriptions of the method described above may refer to the corresponding process in the foregoing system embodiment, and are not described herein again.

It should be noted that, the three-phase solid-state switch test circuit and the test method provided in the foregoing embodiments are only illustrated by the division of the functional modules, and in practical applications, the functions may be distributed by different functional modules according to needs, that is, the modules or steps in the embodiments of the present invention are further decomposed or combined, for example, the modules in the foregoing embodiments may be combined into one module, or may be further split into a plurality of sub-modules, so as to complete all or part of the functions described above. The names of the modules and steps involved in the embodiments of the present invention are only for distinguishing the modules or steps, and are not to be construed as unduly limiting the present invention.

A storage device according to a third embodiment of the present invention stores a plurality of programs therein, the programs being adapted to be loaded and executed by a processor to implement the three-phase solid-state switch testing method described above.

A processing apparatus according to a fourth embodiment of the present invention includes a processor, a storage device; a processor adapted to execute various programs; a storage device adapted to store a plurality of programs; the program is adapted to be loaded and executed by a processor to implement the three-phase solid-state switch testing method described above.

It can be clearly understood by those skilled in the art that, for convenience and brevity of description, the specific working processes and related descriptions of the storage device and the processing device described above may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.

Those of skill in the art would appreciate that the various illustrative modules, method steps, and modules described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that programs corresponding to the software modules, method steps may be located in Random Access Memory (RAM), memory, Read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. To clearly illustrate this interchangeability of electronic hardware and software, various illustrative components and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as electronic hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.

The terms "first," "second," and the like are used for distinguishing between similar elements and not necessarily for describing or implying a particular order or sequence.

The terms "comprises," "comprising," or any other similar term are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.

So far, the technical solutions of the present invention have been described in connection with the preferred embodiments shown in the drawings, but it is easily understood by those skilled in the art that the scope of the present invention is obviously not limited to these specific embodiments. Equivalent changes or substitutions of related technical features can be made by those skilled in the art without departing from the principle of the invention, and the technical scheme after the changes or substitutions can fall into the protection scope of the invention.

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