阅读说明：本技术 集成封装结构 (Integrated packaging structure ) 是由 林耀剑 史海涛 陈雪晴 陈建 周莎莎 刘硕 于 2019-09-25 设计创作，主要内容包括：本发明涉及的一种集成封装结构,所述集成封装结构包括主基板、第一模组、第二模组、空腔元件及大尺寸器件,所述主基板包括相对设置的主基板第一表面与主基板第二表面,所述第一模组与所述第二模组堆叠,堆叠后的所述第一模组及所述第二模组与所述空腔元件、所述大尺寸器件水平排布于所述主基板第一表面且分别与所述主基板电性连接。通过上述设置,可解决目前集成封装结构需要进一步高密度、小型化、多维化、多需求排布设计的需求。(The invention relates to an integrated packaging structure which comprises a main substrate, a first module, a second module, a cavity element and a large-size device, wherein the main substrate comprises a main substrate first surface and a main substrate second surface which are oppositely arranged, the first module and the second module are stacked, and the stacked first module, the stacked second module, the cavity element and the large-size device are horizontally arranged on the main substrate first surface and are respectively and electrically connected with the main substrate. Through the arrangement, the requirements of further high-density, miniaturization, multi-dimension and multi-requirement arrangement design of the conventional integrated packaging structure can be met.)

1. An integrated packaging structure comprises a main substrate, a first module, a second module, a cavity element and a large-size device, wherein the main substrate comprises a main substrate first surface and a main substrate second surface which are oppositely arranged, the integrated packaging structure is characterized in that the first module and the second module are stacked, and the stacked first module, the stacked second module, the cavity element and the large-size device are horizontally arranged on the main substrate first surface and are respectively electrically connected with the main substrate.

2. The integrated package structure of claim 1, further comprising a molding compound layer covering the first surface of the main substrate and encapsulating the first module, the second module, the cavity element and the large-sized device, wherein the molding compound layer comprises a first surface of the molding compound layer away from the main substrate and a second surface of the molding compound layer close to the main substrate, the first surface of the molding compound layer is provided with an open slot extending toward the cavity element, and at least a portion of the open slot is located opposite to the cavity element.

3. The integrated package structure of claim 2, wherein the open slots are inverted trapezoidal open slots, and the inverted trapezoidal open slots are symmetrically distributed along a central axis of the cavity element.

4. The integrated package structure of claim 2, wherein the open slot is a stepped open slot located at a lobe of the molding layer.

5. The integrated package structure of claim 1, further comprising a first shielding layer covering the first module and a second shielding layer covering the first module, the second module, the cavity element, the large-scale device, and the main substrate;

the first shielding layer and the second shielding layer are made of different materials, or the first shielding layer and the second shielding layer are different in structure, or the first shielding layer and the second shielding layer are both different in material and structure.

6. The integrated package structure of claim 5, further comprising a hollow interposer stacked between the first module and the main substrate and electrically connecting the first module and the main substrate, wherein the second module is located in a hollow portion of the interposer.

7. The integrated package structure of claim 6, wherein one end of the interposer is electrically connected to the first shielding layer and the other end is electrically connected to a ground terminal of the main substrate.

8. The integrated package structure of claim 6, wherein the interposer is an organic substrate-based interposer or an encapsulation-based interposer or a heterogeneous stack-based interposer with redistribution layers stacked.

9. The ic package structure as claimed in claim 1, further comprising a third module disposed on the second surface of the main substrate, wherein at least a portion of the third module is located opposite to the second module.

10. The integrated package structure of claim 9, wherein the second module is an SOC chip and the third module is a memory module, the integrated package structure further comprising a third shielding layer covering the SOC chip and a fourth shielding layer covering the memory module.

11. The integrated package structure of claim 1, wherein the host substrate is an organic substrate, or a homogenous or heterogeneous stack of wafer and board level stack rewiring using a film or paste.

Technical Field

The invention relates to the technical field of packaging, in particular to an integrated packaging structure.

Background

With the development of semiconductor technology, especially in the coming of 5G communication era, the demand for electronic devices is becoming more and more miniaturized, light and thin, and the demand for heterogeneous integration of different elements is becoming more and more, so that the semiconductor heterogeneous integration package is becoming a packaging trend.

In order to meet the application of multiple frequencies and multiple bandwidths, the heterogeneous integrated packaging structure needs to be further high-density, small-sized and multidimensional. The packaging structure has large-size packaging devices with higher height, one is a large-value inductance device, QFN, LGA or BGA and the like, and meanwhile, cavity elements such as a filter and the like which are sensitive to stress exist; in addition, the module assembly including various chips is also large in area and volume, so that the integrated packaging structure needs to be reasonably arranged to meet the requirements of various devices and improve the overall integration level.

Disclosure of Invention

The invention aims to provide an integrated packaging structure to solve the problem that the conventional integrated packaging structure needs further high-density, small-sized, multi-dimensional and multi-requirement arrangement design.

In order to achieve one of the above objectives, an embodiment of the present invention provides an integrated package structure, including a main substrate, a first module, a second module, a cavity element, and a large-sized device, wherein the main substrate includes a first surface of the main substrate and a second surface of the main substrate, the first module and the second module are stacked, and the stacked first module, second module, the cavity element, and the large-sized device are horizontally arranged on the first surface of the main substrate and electrically connected to the main substrate respectively.

As a further improvement of an embodiment of the present invention, the integrated package structure further includes a plastic package layer covering the first surface of the main substrate and encapsulating the first module, the second module, the cavity element and the large-sized device, the plastic package layer includes a plastic package layer first surface far away from the main substrate and a plastic package layer second surface close to the main substrate, the plastic package layer first surface is provided with an open slot extending toward the cavity element, and at least a portion of the open slot is located opposite to the cavity element.

As a further improvement of an embodiment of the present invention, the open slots are inverted trapezoidal open slots, and the inverted trapezoidal open slots are symmetrically distributed along a central axis of the cavity element.

As a further improvement of an embodiment of the present invention, the open slot is a step-shaped open slot located at a convex corner of the plastic package layer.

As a further improvement of an embodiment of the present invention, the integrated package structure further includes a first shielding layer and a second shielding layer, the first shielding layer covers the first module, the second module, the cavity element, the large-sized device, and the main substrate; the first shielding layer and the second shielding layer are made of different materials, or the first shielding layer and the second shielding layer are different in structure, or the first shielding layer and the second shielding layer are both different in material and structure.

As a further improvement of the embodiment of the present invention, the integrated package structure further includes a hollow interposer stacked between the first module and the main substrate and electrically connecting the first module and the main substrate, and the second module is located in a hollow portion of the interposer.

As a further improvement of the embodiment of the present invention, one end of the interposer is electrically connected to the first shielding layer, and the other end of the interposer is electrically connected to the ground terminal of the main substrate.

As a further improvement of an embodiment of the present invention, the interposer is an organic substrate interposer, an encapsulation interposer, or a heterogeneous stacked interposer with stacked and rewired layers.

As a further improvement of the embodiment of the present invention, the integrated package structure further includes a third module disposed on the second surface of the main substrate, and at least a portion of the third module is opposite to the second module.

As a further improvement of the embodiment of the present invention, the second module is an SOC chip, the third module is a memory module, and the integrated package structure further includes a third shielding layer covering the SOC chip and a fourth shielding layer covering the memory module.

As a further improvement of an embodiment of the present invention, the main substrate is an organic substrate, or a homogenous or heterogeneous stack of wafer and board level stack rewiring using a film or paste.

Compared with the prior art, the invention has the beneficial effects that: on the main substrate of the integrated packaging structure, the module assemblies are stacked and then horizontally arranged with large-size devices, cavity elements and the like, and the integrated packaging structure is further miniaturized and densified through overall reasonable layout and can meet the packaging requirements of various packaging devices.

Drawings

Fig. 1 is a schematic diagram of an integrated package structure in embodiment 1 of the present invention;

fig. 2 is a schematic structural diagram of a first module and a first shielding layer in embodiment 1 of the present invention;

fig. 3 is a schematic structural diagram of a second module and a third shielding layer in embodiment 1 of the invention;

FIG. 4 is a schematic structural diagram of a cavity device in example 1 of the present invention;

FIG. 5 is a schematic view of a large-sized device in example 1 of the present invention;

FIG. 6 is a schematic structural view of a transfer board in embodiment 1 of the present invention;

fig. 7 is a schematic diagram of an integrated package structure in embodiment 2 of the present invention;

fig. 8 is a schematic diagram of an integrated package structure in embodiment 3 of the present invention;

fig. 9 is a schematic structural diagram of a third module and a fourth shielding layer in embodiment 3 of the present invention;

fig. 10 is a schematic diagram of an integrated package structure in embodiment 4 of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present application more clear, the technical solutions of the present application will be clearly and completely described below with reference to the detailed description of the present application and the accompanying drawings. It should be apparent that the described embodiments are only some embodiments of the present application, and not all embodiments. All other embodiments obtained by a person of ordinary skill in the art without any inventive work based on the embodiments in the present application are within the scope of protection of the present application.

Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.

The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly. As in the present invention, for convenience of description, in the package structure, a side of the substrate close to the chip is a front side of the substrate, and a side far from the chip is a back side of the substrate; the direction of the plane of the substrate is the horizontal direction, and the thickness direction of the substrate is the vertical direction or the vertical direction.

As shown in fig. 1 to 8, an embodiment of the present invention provides an integrated package structure, which includes a main substrate 2, a first module 11, a second module 12, a cavity element 14, and a large-sized device 15, wherein the main substrate 2 includes a main substrate first surface 21 and a main substrate second surface 22 that are oppositely disposed, the first module 11 and the second module 12 are stacked, and the stacked first module 11, the stacked second module 12, the cavity element 14, and the large-sized device 15 are horizontally arranged on the main substrate first surface 21 and are electrically connected to the main substrate 2, respectively.

Specifically, in the integrated package structure, the main substrate 2 includes a main substrate first surface 21 and a main substrate second surface 22 arranged oppositely, the main substrate first surface 21 is mainly used for arranging various package components, and the opposite main substrate first surface 21 is mainly used for connecting devices such as a PCB below the integrated package structure; on the first surface 21 of the main substrate, the first module 11 and the second module 12 are stacked to form a stacked module assembly, the cavity element 14 and the large-sized device 15 are horizontally arranged with the stacked module assembly, and the cavity element 14 and the large-sized device 15 and the stacked module assembly are respectively electrically connected with the main substrate 2; therefore, the occupied area and the occupied space of two or more modules in the integrated packaging structure are reduced by stacking at least once, and meanwhile, the large-size device 15 with higher height, the cavity element 14 sensitive to stress and the stacked modules are horizontally arranged in a combined mode, so that the overall height of the integrated packaging structure after the internal packaging elements are combined can be reasonably reduced, and the integrated packaging structure is more compact in overall space and more integrated in internal structure.

Optionally, the stacking form of the first module 11 and the second module 12 is not limited, and the first module 11 may be disposed on the first surface 21 of the main substrate, and the second module 12 may be stacked above the first module 11; the second module 12 may be disposed on the first surface 21 of the main substrate, and the first module 11 is stacked on the second module 12. Meanwhile, the horizontal arrangement form of the cavity elements 14 and the large-sized devices 15 and the stacking module combination is not limited, and the cavity elements 14 and the large-sized devices 15 may be respectively horizontally arranged on two sides of the stacking module combination or simultaneously horizontally arranged on one side of the stacking module combination.

Optionally, the large-size device 15 may be one or more of a large-value inductor, a QFN, an LGA, a BGA, or other large-size package devices with a relatively high height, and is not limited specifically; the cavity member 14 may be a packaged device such as a filter.

Further, the integrated package structure further includes a molding layer 4 covering the main substrate first surface 21 and encapsulating the first module 11, the second module 12, the cavity element 14 and the large-sized device 15, where the molding layer 4 includes a molding layer first surface 41 far away from the main substrate 2 and a molding layer second surface 42 close to the main substrate 2, the molding layer first surface 41 is provided with an open slot 6 extending toward the cavity element 14, and at least a portion of the open slot 6 is opposite to the cavity element 14.

Further, the open slot 6 is an inverted trapezoid open slot 6, and the inverted trapezoid open slot 6 is symmetrically distributed along the central axis of the cavity element 14.

Specifically, the plastic package layer 4 covers the first surface 21 of the main substrate, and simultaneously completely encapsulates all the package components on the first surface 21 of the main substrate, including the first module 11, the second module 12, the cavity component 14 and the large-sized device 15; the upper surface of the plastic package layer 4 away from the main substrate 2 is a plastic package layer first surface 41, and the lower surface adjacent to the main substrate 2 is the plastic package layer first surface 41.

The cavity of cavity component 14 generally sets up upwards, in order to prevent that plastic envelope layer 4 from producing great stress failure to cavity component 14 under the effect of expend with heat and contract with cold, open slot 6 has been seted up to the position department that corresponds cavity component 14 at plastic envelope layer first surface 41, and at least partial open slot 6 is directly over cavity component 14, make the plastic envelope layer 4 of cavity component 14 top hollowed out, thereby reduce the stress action of plastic envelope layer 4 to cavity component 14 cavity under the effect of expend with heat and contract with cold, avoid cavity component 14 to receive adverse stress and destroy.

In this embodiment, the open slots 6 are completely located above the cavity element 14 and correspond to the cavity, that is, the open slots 6 are symmetrically distributed along the central axis of the cavity element 14, so that the stress applied to the cavity element 14 can be uniformly reduced, and the stress relief effect is optimal; meanwhile, the open slot 6 is in the shape of an inverted trapezoid, and after the plastic package layer 4 is formed in a plastic package mode, the open slot 6 of the inverted trapezoid enables the demolding process to be fast and convenient.

Optionally, the shape of the open slot 6 is not limited as long as it is set to facilitate the demolding operation, and the open slot 6 may also be formed by laser grooving after the plastic package layer 4 is formed. Alternatively, the open grooves 6 may be provided in a multi-well array.

Further, the opening groove 6 is a step-shaped opening groove 6 located at the convex angle of the plastic package layer 4.

Specifically, a convex angle of the plastic packaging layer 4 can be cut to form an opening groove 6 in a step shape; the height of the step surface of the step-shaped open slot 6 is not limited, and the step-shaped open slot 6 can be positioned above the cavity element 14, so that the height of the step surface is higher than the height of the primary packaging surface in the cavity element 14; the stepped open slot 6 may also be provided outside the cavity member 14 in an avoiding manner such that the height of the stepped surface is lower than the height of the primary package surface in the cavity member 14.

Further, the integrated package structure further includes a first shielding layer 81 and a second shielding layer 82, the first shielding layer 81 covers the first module 11, and the second shielding layer 82 covers the first module 11, the second module 12, the cavity element 14, the large-sized device 15, and the main substrate 2; the first shielding layer 81 and the second shielding layer 82 are made of different materials, or the first shielding layer 81 and the second shielding layer 82 are made of different structures, or both the first shielding layer 81 and the second shielding layer 82 are made of different materials and different structures.

Further, the integrated package structure further includes a hollow interposer 16, the interposer 16 is stacked between the first module 11 and the main substrate 2 and electrically connects the first module 11 and the main substrate 2, and the second module 12 is located in a hollow portion of the interposer 16.

Specifically, a first shielding layer 81 is disposed on the periphery of the first module 11, and the first shielding layer 81 covers the first module 11 to prevent interference; the integrated package structure is provided with a second shielding layer 82 on the whole periphery, and the second shielding layer 82 covers all the package elements on the main substrate 2. Meanwhile, the second shielding layer 82 is electrically connected to the ground terminal of the main substrate 2, so as to achieve the electromagnetic shielding and protecting effects on the packaged device on the main substrate 2. According to the specific application of various frequencies, the structure of the shielding layer is not limited, and the shielding layer can be single-layer metal, multiple metal layers, conductive adhesive or a metal cover and the like; the materials of the two shielding layers are also not limited, and can be one or more combinations of aluminum, copper, chromium, tin, gold, silver, nickel or stainless steel. The first shielding layer 81 and the second shielding layer 82 are not limited in structure type and material type, may be made of different materials, may be made of different structures, or may be made of different materials and structures, so as to achieve the best EMI shielding effect and the best cost.

As shown in fig. 6, the integrated package structure further includes an interposer 16, where the interposer 16 is a hollow structure; the first module 11 and the adapter plate 16 are stacked on the main substrate 2, the second module 12 is arranged at the position of the hollow part of the adapter plate 16, namely, on the first surface 21 of the main substrate, the adapter plate 16 is nested in the second module 12, and the first module 11 is stacked on the nested structure; meanwhile, the interposer 16 is provided with a conductive structure for electrically connecting the first module 11 and the main substrate 2.

Therefore, the interposer 16 with a hollow structure can not only nest the second module 12 and support the first module 11, but also electrically connect the first module 11 with the main substrate 2 and integrally arrange on the first surface 21 of the main substrate, so that the package structure is integrated compactly and has complete electrical functions.

Optionally, the adapter plate 16 is not limited in form, and may be a frame-shaped adapter plate, a U-shaped adapter plate, or an I-shaped adapter plate; when the interposer 16 is an I-type interposer, the number is not limited, and may be two or more.

Further, one end of the adapting 16 board is electrically connected to the first shielding layer 81, and the other end is electrically connected to the ground terminal of the main substrate 2.

Specifically, the interposer 16 may also be a component of the EMI shielding and protecting structure; when the interposer 16 is stacked on the first module 11 and electrically connects the first module 11 with the main substrate 2, the interposer 16 can be electrically connected with the first shielding layer 81, and the interposer 16 is electrically connected with the ground terminal on the main substrate 2; therefore, the first shielding layer 81 can be electrically connected to the ground terminal on the main substrate 2, so that the first shielding layer 81 can effectively perform EMI electromagnetic shielding on the first module 11 to achieve a protection function.

Further, the interposer 16 is an organic substrate-based interposer, an encapsulation-based interposer, or a heterogeneous stacked interposer with stacked and rewired layers.

Specifically, the type of the interposer 16 is not limited, and may be one of the three types described above. The packaging material adopted by the packaging adapter plate can be a composite material containing fillers, such as epoxy resin, phenolic resin base and the like.

Alternatively, when the number of the interposer 16 is two or more, the type thereof may be one or a combination of more than one of the three types.

Optionally, the three-dimensional adapter structure in the adapter plate may be designed according to actual situations, and may be an i-type or T-type; the adapter plate can be designed to only have electrical switching wiring, and can also embed devices.

Further, the integrated package structure further includes a third module 13 disposed on the second surface 22 of the main substrate, and at least a portion of the third module 13 is opposite to the second module 12.

Further, the second module 12 is an SOC chip, the third module 13 is a storage module, and the integrated package structure further includes a third shielding layer 83 covering the SOC chip and a fourth shielding layer 84 covering the storage module.

As shown in fig. 7 to 8, the third module 13 is further disposed on the second surface 22 of the main substrate, and the position of the third module 13 at least partially corresponds to the position of the second module 12, so that a plurality of packaged chips can be arranged on two sides of the main substrate 2, not only on one side, and the area and size of the integrated package structure can be further reduced.

In the embodiment of the present invention, the second module 12 and the third module 13 are the SOC chip 12 and the memory module 13, respectively. The SOC chip stacked on the main substrate first surface 21 is further covered with a third shielding layer 83, and the memory module disposed on the main substrate second surface 22 is further covered with a fourth shielding layer 84.

In order to meet the application of the integrated package structure with multiple frequencies and multiple bandwidths, the materials and structures of the first shielding layer 81, the second shielding layer 82, the third shielding layer 83 and the fourth shielding layer 84 covering the first module, the main module, the SOC chip and the memory module are not limited, and can be specifically selected according to the application and actual situation of the multiple frequencies, so that the same or different materials or structures or various combination forms are adopted to achieve the best EMI effect and cost of the whole integrated package structure.

In addition, the arrangement positions of the SOC chip 12 and the memory module 13 may be adjusted according to the sizes of the two, the actual space size inside the integrated package structure, the specific process, the optimal cost, and other factors. Similarly, the arrangement positions of the first module 11 and the memory module 13 may be adjusted according to the sizes of the first module and the memory module, the actual size of the internal space of the integrated package structure, the specific process, the optimal cost, and other factors.

Optionally, the second surface 22 of the main substrate may further be provided with a connecting portion 9 for connecting to a PCB below, and the connecting portion 9 may be a solder ball 9A or an interposer 9B, so as to electrically connect the main substrate 2 with the PCB; the connection parts 9 may be horizontally arranged at both sides of the third module 13 to support the main substrate 2 and all the package components above the main substrate 2. Meanwhile, the main substrate second surface 22 may be further provided with a main substrate second surface plastic package layer, and this plastic package layer may encapsulate at least all sides of the third module 13 and all sides of the connecting portion 9.

Further, the main substrate 2 is an organic substrate, or a homogenous or heterogeneous stack of a wafer and a board-level stack rewiring using a film or glue.

Specifically, the type of the main substrate 2 is not limited, and may be an organic substrate, the organic substrate is formed by laminating a plurality of copper layers and resin, and then the required circuit pattern can be obtained by processing such as drilling, electroless copper plating, electro-coppering, etching and the like; the main substrate 2 may be a homogeneous or heterogeneous laminate composed of homogeneous or heterogeneous organic dielectric materials and metal lines, and the lines may be re-wired layer by layer to realize a circuit pattern.

For ease of understanding, examples are described in detail below:

example 1

As shown in fig. 1 to 6, in the integrated package structure of the present embodiment, the main substrate 2 includes a main substrate first surface 21 and a main substrate second surface 22 disposed opposite to the main substrate first surface.

The frame-shaped interposer 16 is nested in the second module 12 and then stacked with the first module 11, and the cavity elements 14 and the large-sized devices 15 are horizontally arranged on two sides of the stacked first module 11 and second module 12.

The first shielding layer 81 covers the first module 11, and the second shielding layer 82 covers the main substrate 2 and all the package elements on the main substrate 2; meanwhile, the second shielding layer 82 is electrically connected to the ground terminal of the main substrate 2, and the first shielding layer 81 is also electrically connected to the ground terminal of the main substrate 2 through the interposer 16.

The molding layer 4 covers the main substrate first surface 21 and encapsulates all the package elements on the main substrate first surface 21. The first surface 41 of the molding layer is formed with an open slot 6 located at least partially opposite the cavity member 14.

The large-sized device 15 is a large-value inductor, the cavity element 14 is a filter element, the second module 12 is an SOC chip, and two or more package elements are disposed in the first module 11.

Example 2

As shown in fig. 7, the integrated package structure in this embodiment is different from that in embodiment 1, in that the open slot 6 is a stepped open slot, and the stepped open slot 6 is located in two convex corners of the plastic package layer 4, that is, the two stepped open slots 6 may be formed by cutting two convex corners of the plastic package layer 4.

The upper surface of the cavity element 14 is a primary packaging surface, the step-shaped open slot 6 arranged close to the cavity element 14 is positioned above the primary packaging surface, and the height of the step surface is higher than that of the upper surface of the cavity element 14, so that the plastic package material above the primary packaging surface in the cavity element 14 is reduced, and the stress influence of the plastic package layer on the cavity element 14 under the action of thermal expansion and cold contraction is reduced.

In addition, a step-shaped opening groove 6 is also arranged at a position close to the large-size device 15, the step-shaped opening groove 6 is positioned at the outer side of the large-size device 15, and the height of the step surface is lower than that of the upper surface of the large-size device 15, so that plastic packaging materials at the outer side of the large-size device 15 are reduced, and the influence of stress action is reduced.

Example 3

As shown in fig. 8 to 9, the integrated package structure in this embodiment is different from that in embodiment 1, a third module 13 is further disposed on the second surface 22 of the main substrate, the third module 13 corresponding to the second module 12, and the connecting portions 9 for connecting to the lower PCB are horizontally disposed on two sides of the third module 13. Meanwhile, the first surface 41 of the plastic package layer is not provided with the open slot 6.

The connecting portion 9 is a solder ball 9A, and the third module 13 is a memory chip.

Meanwhile, the main substrate second surface 22 may be further provided with a main substrate second surface molding layer (not shown), and the molding layer may encapsulate at least all sides of the third module 13 and all sides of the connecting portion 9.

Example 4

As shown in fig. 10, the integrated package structure in this embodiment is different from that in embodiment 3 in that the connection portion 9 is an interposer 9B.

In summary, in the integrated package structure provided by the present invention, the main substrate 2 includes the main substrate first surface 21 and the main substrate second surface 22 disposed opposite to the main substrate first surface 21, and the first module 11 and the second module 12 are stacked and then horizontally arranged on the main substrate first surface 21 together with the cavity element 14 and the large-sized device 15, so that the integrated package structure can have a more compact overall space and a more integrated internal structure through reasonable stacking and horizontal arrangement.

It should be understood that although the present description refers to embodiments, not every embodiment contains only a single technical solution, and such description is for clarity only, and those skilled in the art should make the description as a whole, and the technical solutions in the embodiments can also be combined appropriately to form other embodiments understood by those skilled in the art.

The above-listed detailed description is only a specific description of a possible embodiment of the present invention and is not intended to limit the scope of the present invention, and equivalent embodiments or modifications made without departing from the technical spirit of the present invention are included in the scope of the present invention.