阅读说明：本技术 T型三电平变流器仿真方法、装置、电子设备及存储介质 (T-type three-level converter simulation method and device, electronic equipment and storage medium ) 是由 张芮 宋炎侃 于智同 陈颖 黄少伟 沈沉 于 2021-03-04 设计创作，主要内容包括：本申请提供了一种T型三电平变流器仿真方法、装置、电子设备及存储介质,涉及暂态仿真技术领域。首先获取开关组在上一时步中的状态、驱动信号、端电压、支路电流、桥臂电流、桥臂电压以及主路电流,其中,开关组包括开关管与二极管,然后依据在上一时步中的状态、驱动信号、端电压以及支路电流对开关组在当前时步的初始状态进行初步确定；再依据上一时步中的状态、初始状态以及桥臂电流、桥臂电压以及主路电流确定开关组在当前时步是否发生同步开关事件；如果是,则依据同步开关事件与开关组状态的对应关系更新开关组在当前时步的状态；最后依据开关组在当前时步的状态进行电磁暂态仿真。本申请具有仿真耗时更短,且效率更高的优点。(The application provides a simulation method and device for a T-type three-level converter, electronic equipment and a storage medium, and relates to the technical field of transient simulation. Firstly, acquiring the state, the driving signal, the terminal voltage, the branch current, the bridge arm voltage and the main circuit current of a switch group in the previous time step, wherein the switch group comprises a switching tube and a diode, and then preliminarily determining the initial state of the switch group in the current time step according to the state, the driving signal, the terminal voltage and the branch current in the previous time step; determining whether a synchronous switching event occurs in the switch group at the current time step according to the state and the initial state in the previous time step, the bridge arm current, the bridge arm voltage and the main circuit current; if so, updating the state of the switch group at the current time step according to the corresponding relation between the synchronous switch event and the state of the switch group; and finally, performing electromagnetic transient simulation according to the state of the switch group in the current time step. The method and the device have the advantages of shorter simulation time consumption and higher efficiency.)

1. A simulation method for a T-type three-level converter is characterized by comprising the following steps:

acquiring the state, a driving signal, a terminal voltage, a branch current, a bridge arm voltage and a main circuit current of a switch group in the last time step, wherein the switch group comprises a switch tube and a diode, and the switch tube is connected with the diode in an anti-parallel manner;

preliminarily determining the initial state of the switch group in the current time step according to the state, the driving signal, the terminal voltage and the branch current in the previous time step;

determining whether a synchronous switching event occurs in the switch group at the current time step according to the state and the initial state in the previous time step, the bridge arm current, the bridge arm voltage and the main circuit current;

if so, updating the state of the switch group at the current time step according to the corresponding relation between the synchronous switch event and the state of the switch group;

and performing electromagnetic transient simulation according to the state of the switch group at the current time step.

2. The simulation method of a T-type three-level converter as claimed in claim 1, wherein the step of preliminarily determining the initial state of the switch group at the present time step based on the state at the previous time step, the driving signal, the terminal voltage and the branch current comprises:

when the last time step is in the first state, the terminal voltage is positive and the grid electrode inputs a high level signal,

determining the state of the current time step as a third state;

when the last time step is in a first state and the terminal voltage is negative, determining that the state of the current time step is in a second state;

when the previous time step is in a second state, the branch current is positive and a high level signal is input to the grid electrode of the switching tube, determining that the current time step is in a third state;

when the previous time step is in the second state, a low level signal is input to the grid electrode of the switching tube, and the branch current is positive, determining that the current time step is in the first state;

when the state of the previous time step is the third state and the branch current is negative, determining that the state of the current time step is the second state;

when the state of the previous time step is the third state, a low level signal is input to the grid electrode of the switching tube, and the branch current is positive, determining that the state of the current time step is the first state;

when the switch group is in a first state, the switch tube is closed, and the diode is closed; when the switch group is in the second state, the switch tube is closed, the diode is conducted, and when the switch group is in the third state, the switch tube is conducted, and the diode is closed.

3. The simulation method of the T-type three-level converter according to claim 1, wherein the T-type three-level converter comprises a first switch group, a second switch group, a third switch group and a fourth switch group, the first switch group is located in an upper bridge arm, the second switch group is located in a lower bridge arm, the third switch group and the fourth switch group are located in a main circuit, and the step of updating the states of the switch groups in the current time step according to the corresponding relationship between the synchronous switch events and the states of the switch groups comprises:

when the first switch group is in the third state in the last time step, the first switch group is in the first state in the current time step and the main circuit current is positive, determining that the state of the second switch group in the current time step is the second state; at this time, the process of the present invention,

when a driving signal of a fourth switch group at the current time step is a high-level signal and the lower bridge arm voltage is positive, determining that the state of the third switch group at the current time step is a second state, the state of the fourth switch group at the current time step is a third state, and the state of the second switch group at the current time step is a first state;

when the main circuit current is negative, determining that the state of the third switch group at the current time step is a third state, and the state of the fourth switch group at the current time step is a second state;

when the driving signal of the fourth switch group at the current time step is a high-level signal and the upper bridge arm voltage is negative, determining that the state of the third switch group at the current time step is a second state, the state of the fourth switch group at the current time step is a third state, and the state of the first switch group at the current time step is a second state;

when the fourth switch group is in a third state in the last time step, the fourth switch group is in a first state in the current time step and the main circuit current is positive, determining that the state of the second switch group in the current time step is in a second state;

when the switch group is in a first state, the switch tube is closed, and the diode is closed; when the switch group is in the second state, the switch tube is closed, the diode is conducted, and when the switch group is in the third state, the switch tube is conducted, and the diode is closed.

4. The simulation method of the T-type three-level converter according to claim 1, wherein the T-type three-level converter comprises a first switch group, a second switch group, a third switch group and a fourth switch group, the first switch group is located in an upper bridge arm, the second switch group is located in a lower bridge arm, the third switch group and the fourth switch group are located in a main circuit, and the step of updating the states of the switch groups in the current time step according to the corresponding relationship between the synchronous switch events and the states of the switch groups comprises:

when the second switch group is in the third state in the last time step, the second switch group is in the first state in the current time step and the main circuit current is negative, determining that the state of the first switch group in the current time step is the second state; at this time, the process of the present invention,

when the driving signal of the third switch group at the current time step is a high level signal and the upper bridge arm voltage is positive, determining that the state of the third switch group at the current time step is a third state, the state of the fourth switch group at the current time step is a second state, and the state of the first switch group at the current time step is a first state;

when the voltage of the upper bridge arm is negative, determining that the state of the third switch group at the current time step is a second state, and determining that the state of the fourth switch group at the current time step is a third state;

when the driving signal of the third switch group at the current time step is a high-level signal and the lower bridge arm voltage is negative, determining that the state of the third switch group at the current time step is a third state, the state of the fourth switch group at the current time step is a second state, and the state of the second switch group at the current time step is a second state;

when the third switch group is in a third state at the last time step, the third switch group is in a first state at the current time step and the main circuit current is negative, determining that the state of the first switch group at the current time step is a second state;

when the switch group is in a first state, the switch tube is closed, and the diode is closed; when the switch group is in the second state, the switch tube is closed, the diode is conducted, and when the switch group is in the third state, the switch tube is conducted, and the diode is closed.

5. The simulation method of the T-type three-level converter according to claim 1, wherein the T-type three-level converter comprises a first switch group, a second switch group, a third switch group and a fourth switch group, the first switch group is located in an upper bridge arm, the second switch group is located in a lower bridge arm, the third switch group and the fourth switch group are located in a main circuit, and the step of updating the states of the switch groups in the current time step according to the corresponding relationship between the synchronous switch events and the states of the switch groups comprises:

when the first switch group is not in the third state at the previous time step, the first switch group is in the third state at the current time step, and the upper bridge arm voltage is positive, determining that the third switch group is in the first state, and the fourth switch group is in the second state;

when the first switch group is not in the third state at the previous time step, the first switch group is in the third state at the current time step, and the sum of the voltages of the upper bridge arm and the lower bridge arm is positive, determining that the second switch group is in the first state;

when the first switch group is not in the third state at the current time step, the fourth switch group is not in the third state at the last time step, the fourth switch group is in the third state at the current time step and the voltage of the upper bridge arm is negative, determining that the first switch group is in the second state;

when the first switch group is not in the third state at the current time step, the fourth switch group is not in the third state at the last time step, the fourth switch group is in the third state at the current time step and the lower bridge arm voltage is positive, determining that the third switch group is in the second state and the second switch group is in the first state;

when the switch group is in a first state, the switch tube is closed, and the diode is closed; when the switch group is in the second state, the switch tube is closed, the diode is conducted, and when the switch group is in the third state, the switch tube is conducted, and the diode is closed.

6. The simulation method of the T-type three-level converter according to claim 1, wherein the T-type three-level converter comprises a first switch group, a second switch group, a third switch group and a fourth switch group, the first switch group is located in an upper bridge arm, the second switch group is located in a lower bridge arm, the third switch group and the fourth switch group are located in a main circuit, and the step of updating the states of the switch groups in the current time step according to the corresponding relationship between the synchronous switch events and the states of the switch groups comprises:

when the second switch group is not in the third state in the last time step, the second switch group is in the third state in the current time step and the lower bridge arm voltage is positive, determining that the third switch group is in the second state and the fourth switch group is in the first state;

when the second switch group is not in the third state at the previous time step, the second switch group is in the third state at the current time step, and the sum of the voltages of the lower bridge arm and the upper bridge arm is positive, determining that the first switch group is in the first state;

when the second switch group is not in the third state at the current time step, the third switch group is in the third state at the last time step, the third switch group is in the third state at the current time step, and the lower bridge arm voltage is negative, determining that the second switch group is in the second state;

when the second switch group is not in the third state at the current time step, the third switch group is in the third state at the last time step, the third switch group is in the third state at the current time step and the upper bridge arm voltage is positive, determining that the fourth switch group is in the second state and the first switch group is in the first state;

when the switch group is in a first state, the switch tube is closed, and the diode is closed; when the switch group is in the second state, the switch tube is closed, the diode is conducted, and when the switch group is in the third state, the switch tube is conducted, and the diode is closed.

7. A T-type three-level converter simulation device is characterized by comprising:

the data acquisition unit is used for acquiring the state, the driving signal, the terminal voltage, the branch current and the bridge arm current of a switch group in the last time step, wherein the switch group comprises a switch tube and a diode, and the switch tube is connected with the diode in an anti-parallel mode;

the preliminary state determining unit is used for preliminarily determining the state of the switch group in the current time step according to the state, the driving signal, the terminal voltage and the branch current in the previous time step;

the event determining unit is used for determining whether a synchronous switching event occurs in the switch group at the current time step according to the state in the previous time step, the initial state and the bridge arm current;

the state updating unit is used for updating the state of the switch group at the current time step according to the corresponding relation between the synchronous switch event and the state of the switch group when the synchronous switch event occurs at the current time step;

and the simulation unit is used for performing electromagnetic transient simulation according to the state of the switch group in the current time step.

8. The T-type three-level converter simulation apparatus according to claim 7, wherein the preliminary state determining unit is configured to determine that the state of the current time step is the second state when the state of the previous time step is the third state and the branch current is negative;

when the state of the previous time step is the third state, a low level signal is input to the grid electrode of the switching tube, and the branch current is positive, determining that the state of the current time step is the first state;

when the previous time step is in a second state, the branch current is negative and a high level signal is input to the grid electrode of the switching tube, determining that the current time step is in a third state;

when the previous time step is in the second state, a low level signal is input to the grid electrode of the switching tube, and the branch current is in the first state, determining that the current time step is in the first state;

when the last time step is in the first state, the terminal voltage is positive and the grid electrode inputs a high level signal,

determining the state of the current time step as a third state;

when the last time step is in a first state and the terminal voltage is negative, determining that the state of the current time step is in a second state;

when the switch group is in a first state, the switch tube is closed, and the diode is closed; when the switch group is in the second state, the switch tube is closed, the diode is conducted, and when the switch group is in the third state, the switch tube is conducted, and the diode is closed.

9. An electronic device, comprising:

a memory for storing one or more programs;

a processor;

the one or more programs, when executed by the processor, implement the method of any of claims 1-6.

10. A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the method according to any one of claims 1-6.

Technical Field

The application relates to the technical field of transient simulation, in particular to a T-type three-level converter simulation method and device, electronic equipment and a storage medium.

Background

The T-type three-level converter is a novel three-level topology provided by Congery corporation in 2007, and has the advantages of high-frequency step wave of output voltage, small capacity of a required filter, small voltage change rate, high efficiency and the like. Compared with the traditional diode neutral point clamped three-level converter, two clamping diodes are saved in each phase of the T-shaped three-level structure, and therefore the size and the cost of the converter can be reduced. With the development of switch manufacturing and control technologies, T-type three-level converters are increasingly applied to applications such as multiphase motor drives, ac/dc/ac converters, and energy storage systems.

In order to study the transient steady-state characteristics and the control protection strategy of the T-type three-level converter, the working state of the T-type three-level converter needs to be simulated and analyzed by a digital electromagnetic transient simulation tool. At present, the commercially available off-line electromagnetic transient simulation software mainly comprises simpower system, ADPSS, cloudbs and the like of PSCAD and Matlab. However, the circuit topology of the T-type three-level converter includes a large number of switching tubes and diode elements, for example, 120 switching tubes and 120 diode elements are adopted in a fifteen-phase motor dragging system based on a full-bridge T-type three-level converter, and there is a problem of serious computation time consumption when a traditional electromagnetic transient modeling method is adopted for simulating the converter, which is mainly because: (1) the switching frequency of the T-type three-level converter is usually kilohertz, and in order to accurately simulate the switching process, the simulation step length needs to be set to be 1/20-1/100 of the switching period, namely 10 us-50 us. The smaller the simulation step length is, the higher the simulation time consumption is; (2) in the process of simulation calculation, the T-shaped three-level converter acts according to a certain switching sequence. In a certain step of calculation, some switching actions may result in a series of interlocked switching actions at the same time. At this time, an iterative method is required to solve the stable switching state of the current time step. As the number of switches of the circuit increases, the iterative process time consumption will increase dramatically.

In summary, the existing simulation method of the T-shaped three-level converter has the problems of long time consumption and low efficiency.

Disclosure of Invention

The application aims to provide a simulation method and device of a T-type three-level converter, electronic equipment and a storage medium, and aims to solve the problems of long time consumption and low efficiency of the simulation method of the T-type three-level converter in the prior art.

In order to achieve the above purpose, the embodiments of the present application employ the following technical solutions:

in a first aspect, the present application provides a simulation method for a T-type three-level converter, where the method includes:

acquiring the state, a driving signal, a terminal voltage, a branch current, a bridge arm voltage and a main circuit current of a switch group in the last time step, wherein the switch group comprises a switch tube and a diode, and the switch tube is connected with the diode in an anti-parallel manner;

preliminarily determining the initial state of the switch group in the current time step according to the state, the driving signal, the terminal voltage and the branch current in the previous time step;

determining whether a synchronous switching event occurs in the switch group at the current time step according to the state and the initial state in the previous time step, the bridge arm current, the bridge arm voltage and the main circuit current;

if so, updating the state of the switch group at the current time step according to the corresponding relation between the synchronous switch event and the state of the switch group;

and performing electromagnetic transient simulation according to the state of the switch group at the current time step.

In a second aspect, an embodiment of the present application further provides a T-type three-level converter simulation apparatus, where the apparatus includes:

the data acquisition unit is used for acquiring the state, the driving signal, the terminal voltage, the branch current and the bridge arm current of a switch group in the last time step, wherein the switch group comprises a switch tube and a diode;

the preliminary state determining unit is used for preliminarily determining the state of the switch group in the current time step according to the state, the driving signal, the terminal voltage and the branch current in the previous time step;

the event determining unit is used for determining whether a synchronous switching event occurs in the switch group at the current time step according to the state in the previous time step, the initial state and the bridge arm current;

the state updating unit is used for updating the state of the switch group at the current time step according to the corresponding relation between the synchronous switch event and the state of the switch group when the synchronous switch event occurs at the current time step;

and the event determination unit simulation unit is used for performing electromagnetic transient simulation according to the state of the switch group in the current time step.

In a third aspect, an embodiment of the present application provides an electronic device, including: a memory for storing one or more programs; a processor; the one or more programs, when executed by the processor, implement the methods described above.

In a fourth aspect, the present application further provides a computer-readable storage medium, on which a computer program is stored, where the computer program is executed by a processor, and the method is described above.

Compared with the prior art, the method has the following beneficial effects:

the application provides a simulation method and device of a T-type three-level converter, electronic equipment and a storage medium, wherein the simulation method comprises the steps of firstly obtaining the state, a driving signal, terminal voltage, branch current, bridge arm voltage and main circuit current of a switch group in the last time step, wherein the switch group comprises a switch tube and a diode, and the switch tube and the diode are connected in anti-parallel; then, preliminarily determining the initial state of the switch group in the current time step according to the state, the driving signal, the terminal voltage and the branch current in the previous time step; determining whether a synchronous switching event occurs in the switch group at the current time step according to the state and the initial state in the previous time step, the bridge arm current, the bridge arm voltage and the main circuit current; if so, updating the state of the switch group at the current time step according to the corresponding relation between the synchronous switch event and the state of the switch group; and finally, performing electromagnetic transient simulation according to the state of the switch group in the current time step. According to the method and the device, the electromagnetic transient simulation is carried out by acquiring the state of each switch group in the current time step and updating the state, so that an iteration method is not required to be introduced for solving, the iteration process is reduced, the simulation time is shortened, and the efficiency is higher.

In order to make the aforementioned objects, features and advantages of the present application more comprehensible, preferred embodiments accompanied with figures are described in detail below.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and it will be apparent to those skilled in the art that other related drawings can be obtained from the drawings without inventive effort.

Fig. 1 is a circuit topology diagram of a T-type three-level converter in the prior art.

Fig. 2 is a norton equivalent circuit diagram of a T-type three-level converter provided in the prior art.

Fig. 3 is a module schematic diagram of an electronic device according to an embodiment of the present application.

Fig. 4 is an exemplary flowchart of a simulation method of a T-type three-level converter according to an embodiment of the present application.

Fig. 5a is a schematic diagram of a switching tube according to an embodiment of the present application, and fig. 5b is a schematic diagram of a diode according to an embodiment of the present application.

Fig. 6 is a schematic diagram of a first switching state change provided in the embodiment of the present application.

Fig. 7 is a schematic diagram of a second switching state change provided in the embodiment of the present application.

Fig. 8 is a block schematic diagram of a T-type three-level converter simulation apparatus according to an embodiment of the present application.

In the figure: 100-an electronic device; 101-a processor; 102-a memory; 103-a communication interface; 300-T type three-level converter simulation device; 310-a data acquisition unit; 320-preliminary state determination unit; 330-an event determination unit; 340-a state update unit; 350-simulation unit.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations.

Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

Some embodiments of the present application will be described in detail below with reference to the accompanying drawings. The embodiments described below and the features of the embodiments can be combined with each other without conflict.

Fig. 1 shows a minimum circuit network including a half-bridge T-type three-level converter, and the circuit is taken as an example to illustrate transient simulation of the T-type three-level converter in the prior art. Wherein, the prior art mainly comprises the following three steps:

step 1, discretization of network elements. Neglecting the forward conduction voltage drop of the switch tube and the diode, the switch tube and the diode in the figure are respectively replaced by two-state variable resistors RT and RD. When the switching tube or diode is conducting, the resistance takes a very small "on" value (typically 0.01 Ω), otherwise it takes a very large "off" value (typically 1e8 Ω). Then, by using a Dommel algorithm, the capacitor and the inductor are dispersed into a norton equivalent form in which a resistor is connected with a historical current source in parallel, and an equivalent circuit is shown in fig. 2.

And 2, generating a network node voltage equation. Constructing a network node voltage equation according to the equivalent circuit:

in the formula: v (t) is a node voltage vector, I (t) is an external current vector (E/Rs), I_h(t) is the history term current source vector (IhL and IhC) [ G (t)]Is the conductance matrix of the network. For a power network comprising n switches, the switch state vector is recorded as，(0 for off and 1 for on). When the switch state changes in the network, the conductance matrix will change, that is:

and 3, solving a node voltage equation. In the calculation of each time step, firstly, the control system is solved, the switching state is judged according to the branch current/voltage relation and the gate signal of the switching element and is marked as Xi-1(t), and then the conductance matrix of the system is solved. And then, calculating a node voltage vector according to the external current vector and the historical current source vector, solving the internal electrical quantity of each branch according to the branch information, and updating the historical current source vector. And finally entering the next time step. It is noted that a change in some switches in the circuit network may cause a change in the state of other switches at the same time, referred to as synchronous switches. At this time, iterative calculation is required to obtain the stable switch state at the current moment.

Specifically, the inside is calculatedAfter the variables are changed, the states of the switches are judged again to form a new switch state vector which is recorded as xi (t). If the switch state vectors obtained by the two previous and subsequent calculations are different () And if the partial switching action further causes synchronous switching action, using Xi (t) for updating the system conductance matrix and solving again to obtain a switching state vector Xi +1 (t). Until the switch state vector does not change after a number of iterations () Indicating xi (t) is a stable switch state combination at the time t, and then the calculation process of the next time step can be entered.

It can be seen that, as described in the background, when a simulation network includes a large number of switch elements, the iterative process caused by synchronous switching requires a plurality of global factorizations of the system, which directly results in a large increase in simulation time.

In view of this, the present application provides a T-type three-level converter simulation method, so as to solve the problem in the prior art that the time consumption is high when a T-type three-level converter is simulated.

It should be noted that the T-type three-level converter simulation method provided by the present application can be applied to an electronic device 100, and fig. 3 illustrates a schematic structural block diagram of the electronic device 100 provided by the embodiment of the present application, where the electronic device 100 includes a memory 102, a processor 101, and a communication interface 103, and the memory 102, the processor 101, and the communication interface 103 are electrically connected to each other directly or indirectly to implement data transmission or interaction. For example, the components may be electrically connected to each other via one or more communication buses or signal lines.

The memory 102 may be configured to store a software program and a module, such as a program instruction or a module corresponding to the T-type three-level converter simulation apparatus provided in the embodiment of the present application, and the processor 101 executes the software program and the module stored in the memory 102 to execute various functional applications and data processing, so as to execute the steps of the T-type three-level converter simulation method provided in the embodiment of the present application. The communication interface 103 may be used for communicating signaling or data with other node devices.

The Memory 102 may be, but is not limited to, a Random Access Memory (RAM), a Read Only Memory (ROM), a Programmable Read-Only Memory (PROM), an Erasable Read-Only Memory (EPROM), an electrically Erasable Programmable Read-Only Memory (EEPROM), and the like.

The processor 101 may be an integrated circuit chip having signal processing capabilities. The Processor 101 may be a general-purpose Processor, including a Central Processing Unit (CPU), a Network Processor (NP), and the like; but also Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) or other Programmable logic devices, discrete Gate or transistor logic devices, discrete hardware components.

It will be appreciated that the configuration shown in fig. 3 is merely illustrative and that electronic device 100 may include more or fewer components than shown in fig. 3 or have a different configuration than shown in fig. 3. The components shown in fig. 3 may be implemented in hardware, software, or a combination thereof.

The T-type three-level converter simulation method provided by the embodiment of the present application is exemplarily described below with the electronic device 100 as a schematic execution subject.

As an implementation manner, referring to fig. 4, the simulation method of the T-type three-level converter includes:

s102, acquiring the state, the driving signal, the terminal voltage, the branch current, the bridge arm voltage and the main circuit current of a switch group in the previous time step, wherein the switch group comprises a switch tube and a diode, and the switch tube and the diode are connected in anti-parallel;

and S104, preliminarily determining the initial state of the switch group in the current time step according to the state, the driving signal, the terminal voltage and the branch current in the previous time step.

And S106, determining whether the synchronous switching event occurs in the switch group in the current time step according to the state and the initial state in the previous time step, the bridge arm current, the bridge arm voltage and the main circuit current, and executing S108 if the synchronous switching event occurs in the switch group in the current time step.

And S108, updating the state of the switch group at the current time step according to the corresponding relation between the synchronous switch event and the state of the switch group.

And S110, performing electromagnetic transient simulation according to the state of the switch group in the current time step.

The data acquisition is generally performed in time steps, each time step corresponding to a time period. Meanwhile, in the switch group, the switch tube and the diode are connected in an anti-parallel mode, namely, only one of the switch tube and the diode in the switch tube can be conducted at any time step. Alternatively, the switch tube described herein may adopt an IGBT (Insulated Gate Bipolar Transistor), and of course, the switch tube also adopts other transistors, such as a MOS Transistor, etc., which is not limited in this application.

Taking a switch tube as an IGBT as an example, describing the anti-parallel connection described in the present application, please refer to fig. 1, in fig. 1, the switch tube T1 and the diode D1 form a switch group, the anti-parallel connection described in the present application means that an emitter of the IGBT is connected to an anode of the diode, and a collector of the IGBT is connected to a cathode of the diode, so that the anti-parallel connection is realized. Similarly, for other switch groups, the anti-parallel connection is realized in the same way.

It can be understood that in the working process of the T-type three-level converter, the states of the plurality of switch groups are actually changed continuously, so if the states of all the switch tubes in each time step are determined, the stable switch state can be solved in the ground simulation process, the process of solving the stable switch state is not needed, and the time consumption is shorter.

As an implementation manner, the step of S102 satisfies the logic expression:

wherein the content of the first and second substances,represents the state of the last time step, S (t) represents the state of the current time step, S (t) =0, 1, 2 andnumber 0 in =0, 1, 2 indicates a state where the switching tube is off and the diode is off; 1 represents that the switching tube is closed, the diode is in a conducting state, 2 represents that the switching tube is in a conducting state, the diode is in a closed state, G =0 represents that a low-level signal is input to the grid electrode of the switching tube, and G =1 represents that a high-level signal is input to the grid electrode of the switching tube; i.e. i_ceRepresenting the branch current, V_ceRepresenting terminal voltage.

Fig. 5 shows a circuit diagram of the switching tube and the diode, where fig. 5a is a schematic diagram of the switching tube provided in the embodiment of the present application, and fig. 5b is a schematic diagram of the diode provided in the embodiment of the present application. The switch tube and the diode respectively have two states of 'ON' and 'OFF'. For a switch tube, assuming that the initial switch state is "OFF", when the external condition occurs the gate drive signal is "1" and the terminal voltage v_ceIf the voltage is larger than 0, the switch state of the switch is changed to 'ON'; assuming that the initial switching state is "ON", when an external condition occurs, the gate drive signal is "0" or the branch current i_ceWhen the value is less than 0, the switching state changes to "OFF". For a diode, assume its initial state is "OFF", when its terminal voltage v is_ceWhen the voltage is less than 0, the switch state of the switch is changed to 'ON'; assuming that its initial switch state is "ON", when its branch current i_ceIf it exceeds 0, the switching state changes to "OFF".

Moreover, since it is impossible for any switch group to conduct the switch tube and the diode in the switch group at the same time, there are only three combined switch states, which are respectively defined as:

state 0: the switch tube is closed, and the diode is closed;

state 1: the switch tube is closed, and the diode is conducted;

state 2: the switch tube is conducted, and the diode is closed.

Therefore, for any switch group, after the state, the driving signal, the terminal voltage and the branch current in the previous time step are obtained, the state of the switch group in the current time step can be preliminarily judged.

It is to be understood that the logical expression actually means:

for any switch group, when the state of the last time step is the third state (corresponding to the state 2) and the branch current is negative, the state of the current time step is determined to be the second state (corresponding to the state 1).

When the state of any switching tube in the previous time step is the third state, a low level signal is input to the gate of the switching tube (i.e. the driving signal is a low level signal), and the branch current is positive, the state of the current time step is determined to be the first state (corresponding to the state 0).

And when the last time step is in the second state, the branch current is positive and a high-level signal is input to the grid electrode of the switching tube, determining that the state of the current time step is in the third state.

And when the last time step is in the second state, the grid of the switching tube inputs a low level signal and the branch current is positive, determining that the state of the current time step is in the first state.

When the last time step is in the first state, the terminal voltage is positive and the grid electrode inputs a high level signal,

and determining the state of the current time step as a third state.

And when the last time step is in the first state and the terminal voltage is negative, determining that the state of the current time step is in the second state.

It should be noted that, as shown in fig. 1, the T-type three-level converter includes a plurality of switch groups, and the determination of the initial state of the current time step is applicable to each switch tube. It should be noted that, as shown in fig. 5, the branch current described in the present application is the electricity flowing through the switch groupStream i_ceThe terminal voltage described herein is the voltage v flowing through the switch group_ce。

It should be noted that the process of determining the switching state according to the current branch voltage/current and the driving signal in the above formula is a preliminary judgment, and cannot indicate the current state of the switching tube. The reason for this is that some switches in the circuit may change their states and cause the other switches to interlock, and the above-mentioned judgment logic cannot correctly judge this. Therefore, it is also necessary to pre-determine the synchronous switching event and update the switching state in combination with the circuit operating state, that is, to determine whether the synchronous switching event occurs at the current time step.

In other words, after the initial state of the switch group of the T-type three-level converter at the current time step needs to be determined according to the acquired data, it needs to be determined whether state change occurs in synchronization with other switch groups due to state change of some switch groups, when a synchronous switch event occurs, the state of the switch group needs to be updated, and if no synchronous switch event occurs, it indicates that each switch tube operates according to the initial state at the current time step, and state update is not needed.

In addition, because the switch tube is connected with the diode in anti-parallel connection, the switch tube is actively switched on, and the switch-off is the switch-on of the anti-parallel diode. Therefore, the synchronous switch event of the T-type three-level converter is judged, namely the on-off of all diodes in the T-type three-level converter is judged, and the judgment is based on the forced freewheeling and forced turn-off of the diodes.

The following is an exemplary description:

referring to fig. 6, fig. 6 is a circuit diagram of a T-type three-level converter, where the T-type three-level converter includes a first switch set, a second switch set, a third switch set and a fourth switch set, the first switch set is located on an upper bridge arm, the second switch set is located on a lower bridge arm, and the third switch set and the fourth switch set are located on a main circuit.

On this basis, as one implementation, for the case where the main switch state is changed from the third state to the first state, S108 includes:

when the first switch group is in the third state in the last time step, the first switch group is in the first state in the current time step and the main circuit current is positive, determining that the state of the second switch group in the current time step is the second state; at this time, the process of the present invention,

when the driving signal of the fourth switch group at the current time step is a high level signal and the lower bridge arm voltage is positive, determining that the state of the third switch group at the current time step is a second state, the state of the fourth switch group at the current time step is a third state, and the state of the second switch group at the current time step is a first state;

when the main circuit current is negative, determining that the state of the third switch group at the current time step is a third state, and the state of the fourth switch group at the current time step is a second state;

when the driving signal of the fourth switch group at the current time step is a high-level signal and the upper bridge arm voltage is negative, determining that the state of the third switch group at the current time step is a second state, the state of the fourth switch group at the current time step is a third state, and the state of the first switch group at the current time step is a second state;

and when the fourth switch group is in the third state in the last time step, the fourth switch group is in the first state in the current time step and the main circuit current is positive, determining that the state of the second switch group in the current time step is the second state.

If the main switch providing the forward arm current at the last time step is set as S1, the switch state is "the third state", and then G1=0 and G3= 1. If the switch state of the current step changes to "the first state", it is determined preferentially that the inductor current free-wheeling path is provided by D2. If Vcn >0 and G4=1, the freewheel path is changed to D3T4 and D2 will be shut off while being subjected to back pressure. As shown in path 1 (the path marked 1 after the dotted arrow in fig. 6 is path 1); if Vcn <0, D4T3 will turn on by being subjected to a forward voltage, the capacitor Cp will discharge through D2, D4 and T3, and T4 is in the off state regardless of the gate signal, as shown by path 2 (the path marked 2 after the dashed arrow in FIG. 6 is path 2); if Vcp <0 and G4=1, D1 will turn on by being subjected to a forward voltage, and the capacitor Cp will be discharged through D3, T4 and D1, as shown by path 3 (the path marked 3 after the dashed arrow in fig. 6 is path 3); in addition, when Vcn >0 and G4=0, Vcp <0, and G4=0, Vcp >0, and G4 are arbitrary, switching state transition does not occur in any of the three cases.

Thus, the above switch transfer logic expression can be found as:

wherein S is_{1_1}Indicating the state of the first switch group at the previous time step, S_{4_1}Which represents the state of the first switch set at the previous time step, ia represents the main circuit current, i.e. the current flowing through point a in fig. 6.

Similarly, when the main switch for supplying the reverse arm current is S2 or S4S3, the two cases are symmetrical, and the logical expression of the state transition is directly given here.

The logic expression is as follows:

when the second switch group is in the third state in the last time step, the second switch group is in the first state in the current time step and the main circuit current is negative, the state of the first switch group in the current time step is determined to be the second state; at this time, the process of the present invention,

when the driving signal of the third switch group at the current time step is a high level signal and the upper bridge arm voltage is positive, determining that the state of the third switch group at the current time step is a third state, the state of the fourth switch group at the current time step is a second state, and the state of the first switch group at the current time step is a first state;

when the voltage of the upper bridge arm is negative, determining that the state of the third switch group at the current time step is a second state, and determining that the state of the fourth switch group at the current time step is a third state;

when the driving signal of the third switch group at the current time step is a high-level signal and the lower bridge arm voltage is negative, determining that the state of the third switch group at the current time step is a third state, the state of the fourth switch group at the current time step is a second state, and the state of the second switch group at the current time step is a second state;

and when the third switch group is in the third state in the last time step, the third switch group is in the first state in the current time step and the main circuit current is negative, determining that the state of the first switch group in the current time step is the second state.

In addition, referring to fig. 7, when the state of the main switch changes from the first state or the second state to the third state, the logic expression of the switch transition is:

when the first switch group is not in the third state at the previous time step, the first switch group is in the third state at the current time step and the upper bridge arm voltage is positive, determining that the third switch group is in the first state and the fourth switch group is in the second state;

when the first switch group is not in the third state in the previous time step, the first switch group is in the third state in the current time step, and the sum of the voltages of the upper bridge arm and the lower bridge arm is positive, determining that the second switch group is in the first state;

when the first switch group is not in the third state at the current time step, the fourth switch group is not in the third state at the last time step, the fourth switch group is in the third state at the current time step, and the upper bridge arm voltage is negative, determining that the first switch group is in the second state;

and when the first switch group is not in the third state at the current time step, the fourth switch group is not in the third state at the last time step, the fourth switch group is in the third state at the current time step, and the lower bridge arm voltage is positive, determining that the third switch group is in the second state and the second switch group is in the first state.

In this case, the switching state of the main switch S1 is changed from the non-third state to the third state at this time, and according to the assumed condition of T-type three-level driving, there is only one switching gate signal combination: g1=1, G2=0, G3=0, G4= 1. If Vcp >0, even if the gate signal of T4 is 1, the branches S3 and S4 will be disconnected due to the back pressure; if Vcp <0, D1 must be turned on to provide a discharge path for capacitor Cp, which conflicts with the precondition of T1 being turned on, and therefore this condition is not reasonable; if Vcp + Vcn >0, with T1 turned on, D2 will turn off by being subjected to a reverse voltage; if Vcn <0, since the gate signal of T3 is 0, the capacitor Cp will not discharge through D2, D4, T3, and therefore Vcn is negative and will not cause a switch state transition.

Assuming that the switch state of the present time step S1 is not "state 2", the switch state of the main switch S4 changes from not "third state" to "third state", and the level of G1 may be 1 or 0. If Vcp <0, then the capacitor C1 will discharge through D3, T4, D1 as shown by path 3 (the path marked 5 after the dashed arrow in FIG. 7 is path 5); if Vcp >0, no switching state transitions occur in this case; if Vcn >0, D2 will turn off by being subjected to a reverse voltage. If Vcn <0, since T4 is turned on as a precondition, even if the gate signal of T3 is 1, the capacitor Cn cannot discharge through D2, D4, T3, and therefore the condition is not reasonable.

Similarly, when S2, S3 is used as a main switch, the state from the first state or the second state to the third state is symmetrical to the above two cases, and the logical expression of the state transition is directly given here:

when the second switch group is not in the third state in the previous time step, the second switch group is in the third state in the current time step and the lower bridge arm voltage is positive, determining that the third switch group is in the second state and the fourth switch group is in the first state;

when the second switch group is not in the third state in the previous time step, the second switch group is in the third state in the current time step, and the sum of the voltages of the lower bridge arm and the upper bridge arm is positive, determining that the first switch group is in the first state;

when the second switch group is not in the third state at the current time step, the third switch group is in the third state at the last time step, the third switch group is in the third state at the current time step and the lower bridge arm voltage is negative, determining that the second switch group is in the second state;

and when the second switch group is not in the third state at the current time step, the third switch group is in the third state at the last time step, the third switch group is in the third state at the current time step and the upper bridge arm voltage is positive, determining that the fourth switch group is in the second state and the first switch group is in the first state.

Through two steps of preliminary judgment of the switch state and pre-judgment and updating of the switch state, a stable switch state combination can be directly solved at the current time step, iterative solution is not needed, and the operation is simpler and consumes less time.

In addition, the electromagnetic transient simulation described in the present application refers to determining the admittance matrix after obtaining the switching state combinations of the T-type three-level converter in all time steps, and the specific simulation process is not described herein again.

In addition, when needing to be explained, the T-type three-level converter adopting the simulation method of the application can be packaged and modeled as a variable impedance element triggered by conditions, and the element does not have a process of iteratively solving a stable switch state. In addition, the half-bridge T-type three-level converter shown in fig. 1 can be formed by connecting the dc sides in parallel into a full-bridge type, a three-phase bridge type and a multi-phase bridge type converter, and a fast simulation model of these types of converters can be constructed by stacking the half-bridge type. Therefore, a circuit topology comprising N half-bridge T-type three-level converters can be obtained, then according to the simulation method provided by the application, the switch states of the N T-type three-level converters are sequentially determined to form an admittance matrix, then the system is solved, and further the simulation of the whole system is realized.

Based on the foregoing implementation, the present application further provides a T-type three-level converter simulation apparatus 300, please refer to fig. 8, which includes:

the data obtaining unit 310 is configured to obtain a state, a driving signal, a terminal voltage, a branch current, and a bridge arm current of a switch group in a previous time step, where the switch group includes a switch tube and a diode.

It is understood that step S102 may be performed by the data acquisition unit 310.

The preliminary state determining unit 320 is configured to preliminarily determine the state of the switch group at the current time step according to the state at the previous time step, the driving signal, the terminal voltage, and the branch current.

It is understood that step S104 may be performed by the preliminary state determining unit 320.

And an event determining unit 330, configured to determine whether a synchronous switching event occurs in the switch group at the current time step according to the state in the previous time step, the initial state, and the bridge arm current.

It is understood that step S106 may be performed by the event determination unit 330.

The state updating unit 340 is configured to update the state of the switch group at the current time step according to the corresponding relationship between the synchronous switching event and the state of the switch group when the synchronous switching event occurs at the current time step.

It is understood that step S108 may be performed by the state updating unit 340.

And a simulation unit 350, configured to perform electromagnetic transient simulation according to the state of the switch group at the current time step.

It is understood that step S110 may be performed by the simulation unit 350.

The preliminary state determining unit 320 is specifically configured to determine that the state of the current time step is the second state when the state of the previous time step is the third state and the branch current is negative;

when the state of the previous time step is the third state, a low level signal is input to the grid electrode of the switching tube, and the branch current is positive, determining that the state of the current time step is the first state;

when the previous time step is in a second state, the branch current is negative and a high level signal is input to the grid electrode of the switching tube, determining that the current time step is in a third state;

when the previous time step is in the second state, a low level signal is input to the grid electrode of the switching tube, and the branch current is in the first state, determining that the current time step is in the first state;

when the last time step is in the first state, the terminal voltage is positive and the grid electrode inputs a high level signal,

determining the state of the current time step as a third state;

when the last time step is in a first state and the terminal voltage is negative, determining that the state of the current time step is in a second state;

when the switch group is in a first state, the switch tube is closed, and the diode is closed; when the switch group is in the second state, the switch tube is closed, the diode is conducted, and when the switch group is in the third state, the switch tube is conducted, and the diode is closed.

Naturally, each step in the above implementation manner has a corresponding functional module, and since the above embodiment has been described in detail, no further description is provided herein.

In summary, the present application provides a T-type three-level converter simulation method, an apparatus, an electronic device, and a storage medium, which first obtain a state, a driving signal, a terminal voltage, a branch current, a bridge arm voltage, and a main circuit current of a switch group in a previous time step, where the switch group includes a switch tube and a diode, and the switch tube and the diode are connected in anti-parallel; then, preliminarily determining the initial state of the switch group in the current time step according to the state, the driving signal, the terminal voltage and the branch current in the previous time step; determining whether a synchronous switching event occurs in the switch group at the current time step according to the state and the initial state in the previous time step, the bridge arm current, the bridge arm voltage and the main circuit current; if so, updating the state of the switch group at the current time step according to the corresponding relation between the synchronous switch event and the state of the switch group; and finally, performing electromagnetic transient simulation according to the state of the switch group in the current time step. According to the method and the device, the electromagnetic transient simulation is carried out by acquiring the state of each switch group in the current time step and updating the state, so that an iteration method is not required to be introduced for solving, the iteration process is reduced, the simulation time is shortened, and the efficiency is higher.

In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. The apparatus embodiments described above are merely illustrative and, for example, the flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods and computer program products according to embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s).

It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved.

It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

In addition, the functional modules in the embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.

The functions, if implemented in the form of software functional modules and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: u disk, removable hard disk, read only memory, random access memory, magnetic or optical disk, etc. for storing program codes.

Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.