阅读说明：本技术 扩充插座及其连接销 (Expansion socket and connecting pin thereof ) 是由 李政宪 于 2020-06-23 设计创作，主要内容包括：本发明公开一种扩充插座及其连接销,其中该扩充插座的连接销可用于改善信号(例如降低噪音),以用于高速应用。可以将连接销处理为具有覆盖连接销近端区域的导电镀层。与连接销接触的扩充卡和连接销所连接的电路板之间的电信号可以直接通过近端区域的导电板。然而,可以例如通过用高介电损耗和/或高电阻材料覆盖或通过去除该区域中的导电镀层来将连接销的远端区域视为没有导电镀层。因此,通过连接销的电信号将倾向于通过导电镀层而不是沿着销的远端区域。因此,可以避免信号反射以及其他伪像和噪音。(The invention discloses an expansion socket and a connecting pin thereof, wherein the connecting pin of the expansion socket can be used for improving signals (such as reducing noise) so as to be used for high-speed application. The connecting pin may be treated with a conductive plating covering the proximal region of the connecting pin. Electrical signals between the expansion card in contact with the connector pins and the circuit board to which the connector pins are connected may pass directly through the conductive plates in the proximal region. However, the distal end region of the connecting pin may be considered as being free of conductive plating, for example by covering with a high dielectric loss and/or high resistance material or by removing conductive plating in this region. Thus, electrical signals passing through the connecting pin will tend to pass through the conductive plating rather than along the distal region of the pin. Thus, signal reflections and other artifacts and noise can be avoided.)

1. An expansion outlet for a computing device, comprising:

a housing connectable with a circuit board of a computing device, the housing including an opening for receiving an expansion card;

a plurality of connection pins disposed within the housing and electrically coupled to the circuit board, wherein each of the connection pins comprises:

a distal end extending away from the circuit board;

a contact area spaced from the distal end, wherein the contact area is in electrical contact with the expansion card when the expansion card is inserted into the housing;

a conductive plating covering a proximal region of the connecting pin; and

a distal region of the connecting pin is free of the conductive plating, wherein the distal region of the connecting pin is located between the contact region and the distal end.

2. The expansion outlet of claim 1, wherein the distal region comprises at least 50% of the distance from the distal end to the contact region.

3. The expansion outlet of claim 1 wherein the distal region is covered by a material having a dielectric loss tangent greater than 0.1.

4. The expansion outlet of claim 3 wherein the distal region is coated with a resistive material.

5. The expansion socket of claim 1, wherein the connection pins are electrically coupled to high frequency components of the circuit board.

6. The expansion socket according to claim 5, wherein the high-frequency element is configured to transmit or receive an electrical signal at a frequency of 20GHz or higher through the connection pins.

7. A connector pin for an expansion socket of a circuit board, the connector pin comprising:

a proximal end electrically coupleable to the circuit board;

a distal end extending away from the proximal end;

a contact area spaced from the distal end, wherein the contact area is configured to electrically contact an expansion card when the expansion card is inserted into an expansion socket in which the connection pin is installed;

a conductive plating covering a proximal region of the connecting pin; and

a distal region of the connecting pin is free of the conductive plating, wherein the distal region of the connecting pin is located between the contact region and the distal end.

8. The connecting pin according to claim 7, wherein the distal end region comprises at least 50% of the distance from the distal end to the contact region.

9. The connecting pin according to claim 7, wherein the distal region is covered by a material having a dielectric loss tangent greater than 0.1.

10. The connecting pin according to claim 9, wherein the distal region is coated with an electrically resistive material.

Technical Field

The present invention relates to a computer, and more particularly, to an expansion card connector.

Background

Many computing devices use expansion cards or add-in cards. For example, a peripheral component interconnect express (PCIe) interface may include a PCIe slot coupled to a motherboard, the slot configured to receive a PCIe expansion card. After the expansion card is inserted into the slot, a plurality of connector pins in the slot contact with the connection pads on the expansion card, thereby establishing electrical connection between the components on the motherboard and the components on the expansion card. Such expansion cards may facilitate adding additional functionality (e.g., networking, storage, processing, and other such functionality) to the computer system by simply installing one or more expansion cards.

As the demand for increased computing power grows, these expansion card interfaces continue to rely on higher communication speeds to increase throughput. Current expansion card interface designs are susceptible to significant signal loss, especially when high communication speeds (e.g., in excess of 20GHz) are used.

Disclosure of Invention

The terms embodiment and similar terms are intended to refer broadly to all subject matter of the invention and the appended claims. It is to be understood that statements containing these terms are not intended to limit the subject matter of the present disclosure or the meaning or scope of the appended claims. The embodiments encompassed by the present invention are defined by the appended claims and not by the present disclosure. This summary is a high-level overview of various aspects of the invention and is provided to introduce a selection of concepts that are further described below in the detailed-description section. This summary is not intended to identify key or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter alone. The subject matter should be understood by reference to the entire specification of the invention, any or all of the drawings, and appropriate portions of each claim.

Embodiments of the invention include an expansion outlet for a computing device. The expansion outlet includes a housing connectable to a circuit board of the computing device. The housing includes an opening for receiving an expansion card. The expansion socket further comprises: a plurality of connection pins disposed in the housing for electrical connection with the circuit board, each connection pin including a distal end extending away from the circuit board; a contact region spaced from the distal end; a conductive plating layer; and a distal region of the connecting pin. When the expansion card is inserted into the shell, the contact area is electrically contacted with the expansion card. The conductive plating covers the proximal end region of the connecting pin. The distal region of the connecting pin is free of conductive plating. The distal end region of the connecting pin is located between the contact region and the distal end.

In some cases, the distal region occupies at least 50% of the distance from the distal end to the contact region. In some cases, the distal region is covered by a material having a dielectric tangent greater than 0.1. In some cases, the distal region is coated with a resistive material. In some cases, the plurality of connection pins are electrically coupled to a high frequency component of the circuit board. In some cases, the high-frequency element is configured to transmit or receive an electrical signal at a frequency of 20GHz or more through the plurality of connection pins. In some cases, the expansion socket is a PCIe slot.

Embodiments of the present invention include a connector pin for an expansion socket of a circuit board. The connecting pin includes a proximal end electrically connected to the circuit board; and a distal end extending away from the proximal end; a contact region spaced from the distal end; a conductive plating layer; and a distal region. The contact area is configured to make electrical contact with the expansion card when the expansion card is inserted into the expansion socket in which the connection pin is installed. The conductive plating covers the proximal end region of the connecting pin. The distal region of the connecting pin is free of conductive plating. The distal end region of the connecting pin is located between the contact region and the distal end.

In some cases, the distal region occupies at least 50% of the distance from the distal end to the contact region. In some cases, the distal region is covered by a material having a dielectric tangent greater than 0.1. In some cases, the distal region is coated with a resistive material. In some cases, the connection pins are connection pins of PCIe slots. In some cases, a method may include providing a connection pin and passing an electrical signal through the connection pin at a frequency of 20GHz or greater.

Embodiments of the invention include a method for making a connector pin. The method includes providing a metal connector pin having a proximal end and a distal end. The method also includes preparing a separate conductive plating on the metal connector pin. The separate conductive plating includes a conductive plating covering a proximal region of the metallic connector pin and a distal region free of the conductive plating. The method also includes incorporating metal connector pins into the expansion socket.

In some cases, preparing the separate conductive plating on the metal connector pin includes: applying a temporary covering over the distal region; applying a conductive plating to the metal connector pin while temporarily covering the distal end region; removing the covered temporary from the distal region. In some cases, preparing the separate conductive plating on the metal connector pin includes: applying a material to the distal region, wherein the material has a dielectric tangent greater than 0.1; and plating a conductive plating layer on the connector pin after applying the material to the distal end region. In some cases, preparing the separate conductive plating on the metal connector pin includes: plating a conductive plating layer on the connector pin; the conductive plating is removed from the connector pin in the distal region. In some cases, the method further includes electrically coupling the connection pin to a high frequency component of the circuit board. In some cases, the method further includes passing the electrical signal through the connection pin at a frequency of 20GHz or greater. In some cases, incorporating the metal connector pins into the expansion sockets includes incorporating the metal connector pins into PCIe expansion sockets.

In order that the manner in which the above recited and other aspects of the present invention are obtained can be understood in detail, a more particular description of the invention, briefly summarized below, may be had by reference to the appended drawings, in which:

drawings

FIG. 1 is a schematic side view of a computing system having an expansion card slot in accordance with certain aspects of the present invention;

FIG. 2 is a cross-sectional view of a system having an expansion card slot in accordance with certain aspects of the present invention;

FIG. 3 is a schematic side view of a connection pin of an expansion card slot in accordance with certain aspects of the present invention;

FIG. 4 is a graph comparing insertion loss between a standard connecting pin and a connecting pin according to certain aspects of the present disclosure;

FIG. 5 is a set of eye diagrams of signal quality for a standard connection pin and a connection pin according to certain aspects of the present invention; and

fig. 6 is a flow chart of a process for preparing a connecting pin according to certain aspects of the present invention.

Description of the symbols

100 computing system

102 circuit board

104 expansion card slot

106 expansion card

132,134 component

200 system

202 circuit board

204 expansion card slot

206 expansion card

210 connecting pin

212, distal end

214 distal region

216 proximal end

218 proximal region

220 contact line

310 connecting pin

312 distal end

314 distal region

316 proximal end

317 proximal end area

320 contact area

326 separation position

328 distance

330 distance

332,334 parts

400 graph

402 line

404 line

406,408 region

500 eye diagram

501 eye diagram

536 inner eye height

538 inner eye height

600 process

602,604,608,610,612,614,616,618,620,622 frame

Detailed Description

Certain aspects and features of the present disclosure relate to a connector pin for an expansion socket that is processed to improve signals (e.g., reduce noise) for high speed applications. A plurality of connection pins may be soldered to the circuit board, extend distally from the circuit board, and are received within the housing of the expansion card slot. When the expansion card is inserted into the slot, the pads on the expansion card can be electrically contacted with the connecting pins in the contact areas of the connecting pins. The connection pin as disclosed in the present invention may be treated with a conductive plating covering at least a proximal area of the connection pin extending between the contact area and the circuit board. However, the distal region, which is distal to the contact region, may be free of conductive plating, e.g. covered by a high resistance material. Thus, electrical signals passing through the connecting pin will tend to pass through the conductive plating rather than along the distal region of the pin. Thus, signal reflections and other artifacts and noise can be avoided.

The expansion socket may be used on any suitable circuit board, such as a Printed Circuit Board (PCB), for example a computer motherboard. Typically, the motherboard has a plurality of expansion sockets for receiving expansion cards. One common type of expansion socket is an expansion socket for a PCIe interface, also known as a PCIe slot. Such a slot may include a plurality of opposing connector pins therein that are designed to receive a PCIe expansion card. PCIe expansion cards include a plurality of contact pads on both the front and back of the card at or near the edges of the card. Thus, when the expansion card is inserted into the corresponding slot, the opposing connection pins are pressed against the contact pads of the expansion card at the contact areas of the connection pins. Certain aspects of the present invention may be particularly well suited for use with high speed interfaces such as PCIe interfaces. However, certain aspects of the invention may be useful with other types of interfaces.

In some cases, the length of the connecting pin is greater than the distance from the circuit board to the contact area. In some cases, the portion of the connecting pin distal to the contact region may be used for mechanical and/or structural assistance to secure the connecting pin within the housing of the receptacle. For example, in some cases, the housing of the receptacle may include small notches or openings through which the distal ends of the connecting pins may pass, thus improving mechanical stability. For example, lateral bending or impact to the connection pin may tend to push the connection pin in a lateral direction along the length of the expansion jack, which may otherwise result in damage or misalignment if the distal end of the connection pin is not inside the recess or opening of the housing to help counteract such lateral bending or impact. In addition, it may be difficult to manufacture a socket having a distal end that does not extend further than the contact region. Accordingly, it may be desirable to manufacture a connecting pin having a distal end spaced from the contact region. The portion of the connecting pin extending from the contact area to the distal end may be referred to as a stub (stub).

In normal operation, electrical signals are transmitted through the connection pins that are connected between the proximal end of the circuit board and the contact areas that are electrically connected to the expansion card. Nevertheless, the electrical signal continues to propagate along the stub of the connector pin, which may cause interference, noise, and other undesirable signal problems, thereby reducing the effective signal amplitude.

Typically, the connecting pin is made of metal. The connecting pin may be made of an inexpensive and mechanically strong metal, such as copper, but other metals may also be used. In order to achieve a strong electrical connection and strong signal strength between the expansion card and the circuit board, the connection pins are plated with a highly conductive metal, such as gold or silver. In some cases, the conductive plating can be made of other materials (e.g., metals) that have a higher conductivity than the metal core. Thus, each connecting pin comprises a metal core and a conductive plating. In use, the electrical signal passes primarily through the conductive plating surrounding the metal core, rather than through the metal core.

Certain aspects of the present invention relate to the manner in which connecting pins are manufactured and/or processed in the following manner: the amount of electrical signal passing through the stub is reduced by creating a distal region without conductive plating. Thus, the connection pin may include a metal core, a conductive plating extending to the parting line, and a distal region free of the conductive plating extending from the parting line to the distal end of the connection pin. In some cases, the distal region without the conductive plating extends all the way to the distal end of the connecting pin, but this is not always the case. For example, the distal region may be a distal band (digital band) without conductive plating, and the distal end of the connection pin remains plated with conductive plating.

In some cases, the distal region may be coated, plated, or covered with a material having high dielectric loss. In some cases, the distal region may be coated, plated, or covered with a material having a dielectric loss tangent equal to or greater than 0.07, 0.08, 0.09, 0.1, 0.11, 0.12, or 0.13 (e.g., greater than 0.1). For example, the silicone resin composite may be used to coat (e.g., by painting), plate, or otherwise cover a portion of the stub of the connecting pin. In some cases, the distal region may be coated, plated, or otherwise covered with a resistive material, such as a high resistance material or any other material having a higher resistance than the conductive plating and/or the metal core.

In some cases, the distal region may be coated, plated, or otherwise covered prior to plating the remainder of the connecting pin, thus resulting in the connecting pin having a conductive plating in the proximal region, but no conductive plating in the connecting region. In some cases, such a coating, plating, or covering of the distal region may be temporary (e.g., removable after electroplating the remainder of the connecting pin) or permanent.

In some cases, the distal region may be created by treating or otherwise modifying an already plated connection pin to remove the conductive plating from the distal region. Such processing may include mechanically removing the conductive plating (e.g., by grinding, lapping or polishing), chemically removing the conductive plating, or otherwise.

Accordingly, certain aspects of the present invention create a connector pin having a stub with high signal loss characteristics. Thus, the amplitude of the reflected signal caused by the stub is lower than that of a standard connection pin. Thus, expansion sockets including connection pins as disclosed herein may provide stronger and more powerful signals, especially at high frequency ranges (e.g., at 20GHz or higher).

These illustrative examples are provided to introduce the reader to the general subject matter discussed herein and are not intended to limit the scope of the disclosed concepts. Various additional features and examples are described in the following sections with reference to the figures, in which like numerals represent like elements. The directional descriptions are used to describe illustrative embodiments, but, as with the illustrative embodiments, should not be used to limit the invention. The elements contained in the figures of the present invention may not be drawn to scale. Moreover, approximating words such as "about," almost, "" substantially, "" approximately, "etc. may be used herein to mean" at …, "" near …, "or" near …, "e.g.," within acceptable manufacturing tolerances, "or" within 3-5%, or a logical combination thereof, etc.

FIG. 1 is a schematic side view of a computing system 100 having an expansion card slot 104 in accordance with certain aspects of the present invention. Computing system 100 may be any suitable computing system, such as a home computer, server, or any other suitable computing system. Computing system 100 may include one or more expansion card slots 104. In some cases, one or more such expansion card slots 104 may be used as part of an interface, such as a PCIe interface, although other interfaces may be used.

The expansion card slot 104 may be coupled to the circuit board 102. The circuit board 102 may be any suitable circuit board, such as a Printed Circuit Board (PCB), a computer motherboard, or any other suitable circuit board. The expansion card slot 104 may include a housing and internal connection pins, such as those disclosed in further detail herein. The housing may be mechanically secured to the circuit board 102 by any suitable technique. The internal connection pins may be electrically coupled to the circuit board 102 by any suitable technique (e.g., soldering).

The expansion card slot 104 may be sized to receive a corresponding expansion card 106. As shown in fig. 1, expansion card 106 may be inserted into expansion card slot 104 in a downward direction from the top of the figure to the bottom of the figure (e.g., a direction perpendicular to circuit board 102). However, in some cases, expansion card slot 104 may be configured to receive expansion card 106 in other directions, such as in a direction parallel to circuit board 102.

By inserting the expansion card 106 into the connection established in the expansion card slot 104, an electrical connection may be established to send electrical signals between the components 134 on the expansion card 106 and the components 132 on the circuit board 102. For example, high-speed (e.g., high-frequency) electrical signals may be communicated between component 132 (e.g., a central processing unit) and component 134 (e.g., a graphics processing unit) via connection pins of expansion card slot 104.

FIG. 2 is a cross-sectional view of a system 200 having an expansion card slot 204 in accordance with certain aspects of the present invention. The system 200 may include an expansion card slot 204 coupled to the circuit board 202. The system 200 may be the computing system 100 of fig. 1.

The expansion card slot 204 may include a housing 208 containing a plurality of connection pins 210. The plurality of connecting pins 210 may be arranged in opposing rows, but other arrangements may be used. Each connecting pin 210 may include a proximal end 216 and a distal end 212. The proximal end 216 may be electrically coupled to the circuit board 202, such as via soldering. The distal end 212 may extend away from the circuit board 202. Between the proximal end 216 and the distal end 212, the connection pins 210 may be shaped (e.g., bent) to establish contact areas for electrical contact with contact pads of the expansion piece when the expansion card 206 is inserted into the expansion card slot 204. The expansion card 206 may have a plurality of contact pads on the front and back sides (e.g., left and right sides as shown in fig. 2) of the expansion card 206, respectively. Fig. 2). As shown in fig. 2, the contact area of the connecting pin 210 may be at and/or around the contact line 220. The contact line 220 may be the centerline of the contact area. The contact area may extend several millimeters (mm) beyond the contact line 220 (e.g., approximately 0.05, 0.1, 0.15, 0.2, 0.25, 0.3, 0.35, 0.4, 0.45, 0.5, 0.55, 0.6, 0.65, 0.7, 0.75, 0.8, 0.85, 0.9, 0.95, 1, 1.05, 1.1, 1.15, 1.2, 1.25, 1.3, 1.35, 1.4, 1.45, 1.5, 1.55, 1.6, 1.65, 1.7, 1.75, 1.8, 1.85, 1.9, 1.95, and/or 2 mm).

The connecting pin 210 may include a proximal region 218 and a distal region 214. The proximal end region 218 may extend upwardly from the circuit board 202 and/or the proximal end 216 through the contact region. The proximal region 218 of the connection pin 210 is plated with a conductive plating, which may be any suitable plating material, such as gold or silver. The distal region 214 may be free of conductive plating, which may include no, substantially no, or very little conductive plating thereon. The distal region 214 may be covered (e.g., coated, painted, or plated) with a high dielectric loss material, as described in further detail herein.

FIG. 3 is a schematic side view of a connection pin 310 of an expansion card slot in accordance with certain aspects of the present invention. The connecting pin 310 may be the connecting pin 210 of fig. 2. The connecting pin 310 may include a proximal end 316 and a distal end 312. The proximal end 316 may be electrically coupled to a component 332 of the circuit board, such as a high frequency component, via a circuit lead in the circuit board. The connecting pin 310 may include a contact region 320 between the proximal end 316 and the distal end 312. The contact area 320 is an area where the connection pins 310 are in electrical contact with the expansion card when the expansion card is inserted (e.g., fully inserted) into an expansion card slot (e.g., slot 204 of fig. 2). The connection pin 310 is installed in the expansion card slot. The contact region 320 may be linear or may have a thickness, such as described above with reference to fig. 2.

The proximal end region 317 of the connection pin 310 may be plated in a conductive plating such as gold or silver. The proximal region 317 extends from the circuit board and/or the proximal end 316 to a separation location 326 (e.g., a separation line). The separation location 326 may be located within the contact region 320, at the contact region 320, or distal, although it is typically located distal to the contact region 320.

During operation, electrical signals may be exchanged between the components 332 of the circuit board and the components 334 of the expansion card through the connection pins 310. Specifically, the electrical signal may pass through the conductive plating of the proximal region 317. The conductive plating of the proximal region 317 may be soldered to a contact pad or circuit trace of a circuit board. At the contact area 320, the conductive plating layer may be electrically contacted with the contact pad or the circuit wire of the expansion card.

The connecting pin 310 includes a distal region 314. As shown in fig. 3, the distal region 314 extends from the split location 326 to the distal end 312 of the connecting pin 310, but this is not always the case. At some locations, the thickness of the distal region 314 is less than the distance from the segmentation location 326 to the distal end 312. The distal region 314 may be free of conductive plating as disclosed herein. In some cases, distal region 314 may be covered with a high dielectric loss material, as described in further detail herein.

In some cases, the separation location 326 is spaced apart from the contact region 320 (e.g., from the distal-most end of the contact region 320) by a distance 328. Distance 328 may be any suitable distance. In some cases, distance 328 is equal to or less than 80%, 75%, 70%, 65%, 60%, 55%, 50%, 45%, 40%, 35%, 30%, 25%, 20%, 15%, 10%, and/or 5% of distance 330. Distance 330 is the distance between contact area 320 and distal end 312 of connecting pin 310.

In some cases, the distal region 314 includes or is about 20%, 25%, 30%, 35%, 40%, 45%, 50%, 55%, 60%, 65%, 70%, 75%, 80%, 85%, 90%, and/or 95% or more of the distance 330 from the distal end 312 to the contact region 320. In one example, a distal region 314 of the connecting pin 310 having a stub of 2.7mm (e.g., distance 330 or about 2.7mm) may have a distal region 314 of 0.9mm or about 0.9mm, although other values may be used.

Fig. 4 is a graph 400 comparing insertion loss between a standard connecting pin and a connecting pin according to certain aspects of the present invention. Line 402 depicts the signal amplitude of a standard connector pin, such as a common PCIe connector pin, as a function of frequency. Line 404 depicts the signal amplitude versus frequency for a modified connector pin, such as connector pin 310 of fig. 3 (e.g., a connector pin in accordance with certain aspects of the present invention).

The graph 400 shows two areas 406,408 of reduced signal amplitude due to various reflections and interactions of the signal caused by the connector pins or stubs on the expansion card. The region 406 of about 22-23GHz is associated with signal loss due to the presence of the stub of the connector pin, as described in further detail below. The region 408 of approximately 26-27GHz is associated with signal loss that occurs due to the presence of the stub of the expansion card. The stub of the expansion card may include an area of the contact pad of the expansion card that is located deeper in the expansion card slot than the contact area of the connection pin.

As seen in graph 400, the use of a connecting pin having a distal region without conductive plating may significantly improve the signal, particularly in region 406. The signal drop between the standard and modified connector pins is approximately 10dB different. The 10dB difference in signal strength is large.

In addition, it can be seen that the use of the improved connecting pin can provide a strong signal at other high frequencies. Accordingly, certain aspects of the present invention are particularly useful for signals operating at high frequencies, such as, for example, about 10GHz, 12.5GHz, 15GHz, 17.5GHz, 18GHz, 18.5GHz, 19GHz, 19.5GHz, 20GHz, 20.5GHz, 21GHz, 21.5GHz, 22GHz, 22.5GHz, 23GHz, 23.5GHz, 24GHz, 24.5GHz, 25GHz, 25.5GHz, 26GHz, 26.5GHz, 27GHz, 27.5GHz, and/or 30GHz or higher. In some cases, certain aspects of the present invention are particularly useful for signals operating at frequencies of 20GHz or higher. In some cases, certain aspects of the present invention are particularly useful for signals operating at frequencies that are susceptible to interference or signal loss due to the presence of stubs on the connection pins (e.g., frequencies in the range of 20-30GHz, 20-25GHz, and/or 21-24 GHz).

Fig. 5 is a set of eye diagrams depicting signal quality for standard connection pins and connection pins according to certain aspects of the present invention. Eye diagram 500 depicts the signal quality of a standard connection pin, such as a standard PCIe connection pin. Eye diagram 501 depicts the signal quality of an improved connection pin, such as connection pin 310 of fig. 3 (e.g., a connection pin according to certain aspects of the present invention).

The eye diagram illustrates signal quality information associated with a high speed digital signal. The height of the inner contour of the inner eye indicates the signal-to-noise ratio of the signal. The higher the inner eye, the better the signal-to-noise ratio.

As shown in fig. 5, the eye diagram 500 of the standard connecting pin has an inner eye height 536 that is substantially less than the inner eye height 538 of the eye diagram 501 of the modified connecting pin. Thus, the improved connector pin is used to provide a substantially improved signal-to-noise ratio.

Fig. 6 is a flow chart depicting a process 600 for preparing a connecting pin according to certain aspects of the present invention. Process 600 may be performed to manufacture and/or use a connector pin as disclosed herein, such as connector pin 310 of fig. 3.

At block 602, a bare connection pin may be provided. The bare connection pin may be formed of a suitable material, such as copper. The bare connection pin may be shaped in a suitable form factor, such as that of a PCIe connection pin, although this is not necessarily always the case. In some cases, shaping may occur at some time prior to block 620.

At optional block 604, the location of a plating partition (e.g., a partition location, such as partition location 326) may be determined. Determining the location of the plating sector may be based on the determination of the contact area. In some cases, the location of the plating section may be determined based on the desired frequency of signals expected for passing through the connecting pin. For example, based on a particular desired frequency or set of frequencies, a desired distance length to continue plating distal to the contact region may be calculated to include minimal or reduced interference.

At block 606, a separate conductive plating may be prepared on the bare connection pin. Preparing separate conductive plating on the bare connection pin may include creating a proximal region plated with a conductive plating such as gold or silver and a distal region without a conductive plating. Although in fig. 6, preparing the segmented conductive plating at block 606 may involve any suitable technique. Fig. 6 shows three particular techniques starting at blocks 608, 612, and 616, respectively.

At block 608, a high dielectric loss material may be applied to the distal region of the connecting pin. Any suitable technique may be used to apply the high dielectric loss material, such as a coating (e.g., painting) or plating, although other techniques may be used. After applying the high dielectric loss material at block 608, a high conductivity material may be plated at block 610 to the proximal region of the connection pin. Plating at block 610 will not result in plating of a high conductivity material (e.g., gold or silver) onto the distal end region due to the presence of the high dielectric loss material on the distal end region of the connecting pin prior to plating at block 610.

Alternatively, in block 612, the distal region of the connecting pin may be temporarily covered with a removable material capable of inhibiting electroplating. After block 612, the proximal region of the connecting pin may be plated with a highly conductive material at block 614. Because there is a temporary covering over the distal end region of the connecting pin prior to electroplating at block 614, electroplating at block 614 will not result in electroplating of a high conductivity material (e.g., gold or silver) onto the distal end region. After block 614, the temporary covering may be selectively removed.

Alternatively, at block 616, the connection pins may be plated with a high conductivity material. The plating at block 616 may include plating some or all of the distal end regions of the connecting pins, optionally including all of the connecting pins. After plating at block 616, plating material may be removed from the distal region of the connecting pin at block 618. The plating material may be removed by any suitable technique, including mechanical (e.g., grinding, lapping, or polishing) or chemical techniques. In some cases, the high dielectric loss material may be applied to the distal region after the plating material is removed.

After the separate conductive plating has been prepared at block 606, connection pins may be incorporated into the expansion sockets at optional block 620. For example, the connection pins may be incorporated into PCIe expansion sockets. In some cases, incorporating the connection pins into the expansion sockets may include electrically coupling the connection pins to the circuit board.

At optional block 622, a high frequency signal may be passed through the connecting pin. For example, a signal having a frequency equal to or higher than 20GHz may pass through the connection pin. In some cases, passing high frequency signals through the connector pins may involve passing PCIe signals through the connector pins.

In some cases, resistive materials (e.g., high resistance materials) may be used in place of the high dielectric loss materials described with reference to blocks 608, 616.

The foregoing description of embodiments, including exemplary embodiments, has been presented only for the purposes of illustration and description and is not intended to be exhaustive or limited to the precise forms disclosed. Many modifications, adaptations, and uses will be apparent to those skilled in the art. In addition, while a particular feature of the invention may have been disclosed with respect to only one of several implementations, such feature may be combined with one or more other features of the other implementations as may be desired and advantageous for any given or particular application. Thus, the breadth and scope of the present invention should not be limited by any of the above-described embodiments.

One or more elements or aspects or steps or any parts thereof from one or more of the following claims 1-20 may be combined with one or more elements or aspects or steps or any parts thereof to form one or more additional embodiments and/or claims of the invention in any one or more of claims 1-20 or combinations thereof.

In summary, although the present invention is disclosed in conjunction with the above embodiments, it is not intended to limit the present invention. Those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be subject to the definition of the appended claims.