阅读说明：本技术 一种显示面板及其制备方法、显示装置 (Display panel, preparation method thereof and display device ) 是由 张伟彬 于 2020-06-23 设计创作，主要内容包括：本申请公开了一种显示面板及其制备方法、显示装置,显示面板包括：基板层；第一栅极层,设于所述基板层上；第一栅极绝缘层,设于所述第一栅极层上,并包覆所述第一栅极层；有源层,设于所述第一栅极绝缘层上；第一有机层,设于所述有源层上；第二有机层,设于所述第一有机层上；第一槽孔,从所述第二有机层远离所述有源层的一面贯穿所述第一有机层,并延伸至所述有源层的表面,所述有源层的部分裸露于所述第一槽孔中；源漏极层,设于所述第二有机层的表面,并通过所述第一槽孔与所述有源层相接。(The application discloses display panel and preparation method, display device thereof, display panel includes: a substrate layer; a first gate layer disposed on the substrate layer; the first grid insulating layer is arranged on the first grid layer and wraps the first grid layer; an active layer disposed on the first gate insulating layer; a first organic layer disposed on the active layer; a second organic layer disposed on the first organic layer; a first trench hole penetrating through the first organic layer from a surface of the second organic layer away from the active layer and extending to a surface of the active layer, wherein a portion of the active layer is exposed in the first trench hole; and the source drain layer is arranged on the surface of the second organic layer and is connected with the active layer through the first slotted hole.)

1. A display panel, comprising:

a substrate layer;

a first gate layer disposed on the substrate layer;

the first grid insulating layer is arranged on the first grid layer and wraps the first grid layer;

an active layer disposed on the first gate insulating layer;

a first organic layer disposed on the active layer;

a second organic layer disposed on the first organic layer;

a first trench hole penetrating through the first organic layer from a surface of the second organic layer away from the active layer and extending to a surface of the active layer, wherein a portion of the active layer is exposed in the first trench hole;

and the source drain layer is arranged on the surface of the second organic layer and is connected with the active layer through the first slotted hole.

2. The display panel of claim 1, further comprising

The flat layer is arranged on the source drain layer;

the second slot hole extends to the surface of the source drain electrode layer from one surface, far away from the source drain electrode layer, of the flat layer, and part of the source drain electrode layer is exposed in the second slot hole;

the pixel electrode layer is arranged on the surface of the flat layer and is connected with the source drain electrode layer through the second slotted hole;

and the pixel defining layer is arranged on the pixel electrode layer.

3. The display panel of claim 2, wherein the substrate layer comprises

A substrate layer;

the insulating layer is arranged on the substrate layer;

the buffer layer is arranged on the insulating layer;

the first gate layer is disposed on the buffer layer.

4. A manufacturing method for manufacturing the display panel according to claim 1, comprising the steps of:

providing a substrate layer;

preparing a first gate layer on the substrate layer;

preparing a first gate insulating layer on the first gate layer and wrapping the first gate layer;

preparing a polysilicon layer on the first gate insulating layer;

preparing a first organic layer on the polycrystalline silicon layer;

preparing a first slot, wherein the first slot extends from one surface of the first organic layer, which is far away from the polycrystalline silicon layer, to the surface of the polycrystalline silicon layer, and part of the polycrystalline silicon layer is exposed in the first slot;

preparing a second organic layer in the first slot and on the first organic layer;

preparing a second slot, wherein the second slot extends from one surface, far away from the polycrystalline silicon layer, of the second organic layer in the first slot to the surface of the polycrystalline silicon layer, and part of the polycrystalline silicon layer is exposed in the second slot;

simultaneously performing ion implantation on part of the polycrystalline silicon layer exposed in the second slot hole and the polycrystalline silicon layer in the channel region to form an active layer;

and preparing a source drain layer in the second slot hole and the second organic layer, wherein the source drain layer is connected with the active layer through the second slot hole.

5. The method of manufacturing according to claim 4, wherein the step of manufacturing the source drain layer further comprises the following steps:

preparing a flat layer on the source drain layer;

preparing a third slot, wherein the third slot extends to the surface of the source drain layer from the surface, far away from the source drain layer, of the flat layer, and part of the source drain layer is exposed in the third slot;

preparing a pixel electrode layer on the surface of the flat layer, and connecting the pixel electrode layer with the source drain electrode layer through the third slot hole;

and preparing a pixel definition layer on the pixel electrode layer.

6. The method according to claim 4, wherein a thickness of the second organic layer over the channel region is adjustable, and the thickness of the second organic layer over the channel region and the thickness of the second organic layer in the first trench are reduced by exposure and development when the second trench is formed.

7. The method of claim 4, wherein an ion concentration in a portion of the active layer exposed in the second trench opening is greater than an ion concentration in the active layer of the channel region.

8. The method of claim 4, wherein the concentration of the implanted ions in the film is in a left-biased positive distribution with respect to the distance from the surface facing the direction of ion implantation.

9. The method according to claim 4, wherein the first organic layer is made of silicon nitride, and the second organic layer is made of polyimide.

10. A display device characterized by comprising the display panel according to any one of claims 1 to 3.

Technical Field

The application relates to the technical field of display panels, in particular to a display panel, a preparation method of the display panel and a display device.

Background

The active matrix organic light emitting diode low-temperature polycrystalline silicon screen (AMOLED-LTPS) has extremely precise structure and electrical property and has high requirement on the quality of each layer of film. In the existing process, a layer of flat amorphous silicon layer is deposited on a buffer layer by using a chemical vapor deposition method, then laser annealing crystallization is carried out to form a polycrystalline silicon layer, and a corresponding pattern is etched; then, ion implantation is performed on the whole surface of the polysilicon layer, and the step is channel doping. And after the grid electrode insulating layer and the grid electrode layer are formed, carrying out ion implantation on the polycrystalline silicon below the grid electrode insulating layer which is not shielded by the grid electrode layer, wherein the step is heavy doping, so that the thin film transistor is formed.

The target of channel doping is polysilicon under the gate layer, in order to adjust the electrical properties of the thin film transistor, including threshold voltage, mobility, etc., by implantation dosage.

The heavily doped target is polysilicon which is in contact with a source electrode and a drain electrode, the purpose is to reduce contact resistance with the source electrode and the drain electrode, the conductive type of the thin film transistor is determined, and the implantation dosage is far larger than channel doping. The two steps of channel doping and heavy doping increase the cost of manufacturing the thin film transistor.

Therefore, there is a need to develop a new display panel to overcome the drawbacks of the prior art.

Disclosure of Invention

An object of the present invention is to provide a display panel capable of solving a problem that the cost is large due to two steps of channel doping and heavy doping existing in the prior art for manufacturing a thin film transistor.

To achieve the above object, the present invention provides a display panel including: a substrate layer; a first gate layer disposed on the substrate layer; the first grid insulating layer is arranged on the first grid layer and wraps the first grid layer; an active layer disposed on the first gate insulating layer; a first organic layer disposed on the active layer; a second organic layer disposed on the first organic layer; a first trench hole penetrating through the first organic layer from a surface of the second organic layer away from the active layer and extending to a surface of the active layer, wherein a portion of the active layer is exposed in the first trench hole; and the source drain layer is arranged on the surface of the second organic layer and is connected with the active layer through the first slotted hole.

Further, in other embodiments, the display panel further includes a planarization layer disposed on the source/drain layer; the second slot hole extends to the surface of the source drain electrode layer from one surface, far away from the source drain electrode layer, of the flat layer, and part of the source drain electrode layer is exposed in the second slot hole; the pixel electrode layer is arranged on the surface of the flat layer and is connected with the source drain electrode layer through the second slotted hole; and the pixel defining layer is arranged on the pixel electrode layer.

Further, in other embodiments, wherein the substrate layer comprises a substrate layer; the insulating layer is arranged on the substrate layer; the buffer layer is arranged on the substrate layer; the first gate layer is disposed on the buffer layer.

In order to achieve the above object, the present invention further provides a manufacturing method for manufacturing the display panel according to the present invention, the manufacturing method including the steps of: providing a substrate layer; preparing a first gate layer on the substrate layer; preparing a first gate insulating layer on the first gate layer and wrapping the first gate layer; preparing a polysilicon layer on the first gate insulating layer; preparing a first organic layer on the polycrystalline silicon layer; preparing a first slot, wherein the first slot extends from one surface of the first organic layer, which is far away from the polycrystalline silicon layer, to the surface of the polycrystalline silicon layer, and part of the polycrystalline silicon layer is exposed in the first slot; preparing a second organic layer in the first slot and on the first organic layer; preparing a second slot, wherein the second slot extends from one surface, far away from the polycrystalline silicon layer, of the second organic layer in the first slot to the surface of the polycrystalline silicon layer, and part of the polycrystalline silicon layer is exposed in the second slot; simultaneously performing ion implantation on part of the polycrystalline silicon layer exposed in the second slot hole and the polycrystalline silicon layer in the channel region to form an active layer; and preparing a source drain layer in the second slot hole and the second organic layer, wherein the source drain layer is connected with the active layer through the second slot hole.

Further, in other embodiments, the step of preparing the source/drain layer further includes the following steps: preparing a flat layer on the source drain layer; preparing a third slot, wherein the third slot extends to the surface of the source drain layer from the surface, far away from the source drain layer, of the flat layer, and part of the source drain layer is exposed in the third slot; preparing a pixel electrode layer on the surface of the flat layer, and connecting the pixel electrode layer with the source drain electrode layer through the third slot hole; and preparing a pixel definition layer on the pixel electrode layer.

Further, in other embodiments, wherein the thickness of the second organic layer above the channel region is adjustable, the thickness of the second organic layer above the channel region and the thickness of the second organic layer in the first trench are thinned by exposure and development when the second trench is prepared.

Further, in other embodiments, the ion concentration in the portion of the active layer exposed in the second trench hole is greater than the ion concentration in the active layer of the channel region.

Further, in other embodiments, the concentration of the implanted ions in the film layer and the distance from the surface facing the ion implantation direction are in a left-biased positive distribution relationship; the concentration of the implanted ions in the active layer, the first organic layer and the second organic layer on the channel region and the total thickness of the active layer, the first organic layer and the second organic layer on the channel region are in a left-biased positive distribution relationship, and the concentration of the implanted ions in the active layer exposed in the first slot hole and the thickness of the active layer in the first slot hole are in a left-biased positive distribution relationship.

Further, in other embodiments, the material of the first organic layer is silicon nitride, and the material of the second organic layer is polyimide.

In order to achieve the above object, the present invention further provides a display device including the display panel according to the present invention.

Compared with the prior art, the invention has the beneficial effects that: the invention provides a display panel, a preparation method thereof and a display device, wherein a polycrystalline silicon layer is arranged above a grid layer, a first organic layer is arranged above the polycrystalline silicon layer, a first slot hole is etched on the first organic layer, a second organic layer is deposited in the first slot hole and on the first organic layer, the thickness of the second organic layer in the first slot hole and on the first organic layer is reduced through exposure, a second slot hole is formed, ions are injected into the polycrystalline silicon layer, the ion concentration of the polycrystalline silicon layer in a channel region is controlled through controlling the thickness of the second organic layer, the two steps of heavy doping and channel doping are combined into one, one step of ion injection is reduced, the cost is reduced, and the productivity is increased.

Drawings

The technical solution and other advantages of the present application will become apparent from the detailed description of the embodiments of the present application with reference to the accompanying drawings.

Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention;

fig. 2 is a flowchart of a method for manufacturing a display panel according to an embodiment of the invention;

fig. 3 is a schematic structural diagram of step 7 of a method for manufacturing a display panel according to an embodiment of the present invention;

fig. 4 is a schematic structural diagram of step 9 of a method for manufacturing a display panel according to an embodiment of the present invention;

FIG. 5 is a graph of the concentration of implanted ions in a film versus the distance h from the surface facing the direction of ion implantation

Fig. 6 is a schematic structural diagram of a step 10 of a method for manufacturing a display panel according to an embodiment of the present invention.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

In the description of the present application, it is to be understood that the terms "first", "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.

In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; may be mechanically connected, may be electrically connected or may be in communication with each other; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.

Referring to fig. 1, fig. 1 is a schematic structural diagram of a display panel 100 according to an embodiment of the present invention, in which the display panel 100 includes a substrate layer 110, a first gate layer 120, a first gate insulating layer 130, a second gate layer 140, a second gate insulating layer 150, an active layer 160, a first organic layer 171, a second organic layer 172, a first slot 180, a source/drain layer 190, a planarization layer 210, a second slot 220, a pixel electrode layer 230, and a pixel definition layer 240.

The substrate layer 110 includes a substrate layer 111, an insulating layer 112 disposed on the substrate layer 111, and a buffer layer 113 disposed on the insulating layer 112.

The first gate layer 120 is disposed on the buffer layer 113; the first gate insulating layer 130 is disposed on the first gate layer 120 and covers the first gate layer 120; the second gate layer 140 is disposed on the first gate insulating layer 130; the second gate insulating layer 150 is disposed on the second gate layer 140 and covers the first gate layer 120; the active layer 160 is disposed on the first gate insulating layer 130; the first organic layer 171 is disposed on the active layer 160; a second organic layer 172 disposed on the first organic layer 171; a first trench 180 penetrating the first organic layer 171 from a surface of the second organic layer 172 away from the active layer 160 and extending to the surface of the active layer 160, wherein a portion of the active layer 160 is exposed in the first trench 180; the source/drain layer 190 is disposed on the surface of the second organic layer 172 and is connected to the active layer 160 through the first slot 180.

The flat layer 210 is arranged on the source drain layer 190; a second slot 220 extending from a surface of the planarization layer 210 away from the source/drain layer 190 to a surface of the source/drain layer 190, wherein a portion of the source/drain layer 190 is exposed in the second slot 220; the pixel electrode layer 230 is arranged on the surface of the flat layer 210 and is connected with the source drain layer 190 through the second slot hole 220; the pixel defining layer 240 is disposed on the pixel electrode layer 230.

And arranging an active layer above the gate layer, arranging an organic layer above the active layer, and implanting ions into the active layer after digging a hole on the organic layer, and simultaneously carrying out heavy-doping hybrid channel doping. Because the concentration of the implanted ions in the film layer and the distance of the surface facing the ion implantation direction are in a left bias positive state distribution relationship, the concentration of the ions of the active layer in the channel region can be controlled by controlling the thickness of the organic layer, the heavy doping step and the channel doping step are combined into a whole, one ion implantation step is reduced, the cost is reduced, and the productivity is increased.

Referring to fig. 2, fig. 2 is a flowchart illustrating a method for manufacturing a display panel 100 according to an embodiment of the present invention, where the method includes the following steps 1-9.

Step 1: providing a substrate layer 110; the substrate layer 110 includes a substrate layer 111, an insulating layer 112 disposed on the substrate layer 111, and a buffer layer 113 disposed on the insulating layer 112.

Step 2: a first gate layer 120 is formed on the substrate layer 110.

And step 3: a first gate insulating layer 130 is formed on the first gate layer 120 and covers the first gate layer 120, a second gate insulating layer 140 is formed on the first gate insulating layer 130, and a second gate insulating layer 150 is formed on the first gate layer 140 and covers the first gate layer 140.

And 4, step 4: a polysilicon layer 161 is deposited on the first gate insulation layer 130.

And 5: preparing a first organic layer 171 on the polysilicon layer 161; the material of the first organic layer 171 is silicon nitride.

Step 6: a first trench 181 is formed, wherein the first trench 181 extends from a surface of the first organic layer 171 away from the polysilicon layer 161 to a surface of the polysilicon layer 161, and a portion of the polysilicon layer 161 is exposed in the first trench 181.

And 7: preparing a second organic layer 172 in the first trench 181 and on the first organic layer 171; polyimide is used as the material of the second organic layer 172. Referring to fig. 3, fig. 3 is a schematic structural diagram of a step 7 of a method for manufacturing a display panel according to an embodiment of the present invention.

And 8: a second trench 180 is formed, the second trench 180 extends from a side of the second organic layer 172 in the first trench 181 away from the polysilicon layer 161 to the surface of the polysilicon layer 161, and a portion of the polysilicon layer 161 is exposed in the second trench 180.

And step 9: simultaneously performing ion implantation on a part of the polysilicon layer 161 exposed in the second slot 180 and the polysilicon layer 161 of the channel region 101 to form an active layer 160; referring to fig. 4, fig. 4 is a schematic structural diagram of a step 9 of a method for manufacturing a display panel according to an embodiment of the present invention.

The concentration of the implanted ions in the film layer and the distance h of the surface facing the ion implantation direction are in a left-side normal state distribution relation; referring to fig. 5, fig. 5 is a graph showing the relationship between the concentration of implanted ions in a film and the distance h from the surface facing the ion implantation direction.

When h is 0-0.2um, the concentration of the injected ions is in an ascending trend; when h is between 0.2 and 0.3um, the ion concentration is highest and is about 90 percent; when h > 0.2um, the concentration of the implanted ions is decreased.

The concentration of the implanted ions in the active layer 160, the first organic layer 171 and the second organic layer 172 on the channel region is in a left-biased positive distribution relation with the total thickness of the active layer 160, the first organic layer 171 and the second organic layer 172 on the channel region, and the concentration of the implanted ions in the portion of the active layer 160 exposed in the first slot 180 is in a left-biased positive distribution relation with the thickness of the active layer 160.

The thickness of the second organic layer 172 above the channel region is adjustable, and when the second slot is prepared, the thickness of the second organic layer 172 above the channel region and the thickness of the second organic layer 172 in the first slot are thinned by exposure and development.

The ion concentration in the portion of the active layer 160 exposed in the second trench 180 is greater than the ion concentration in the active layer 160 of the channel region.

The method comprises the steps of arranging a polycrystalline silicon layer above a grid layer, arranging a first organic layer above the polycrystalline silicon layer, etching a first slot on the first organic layer, depositing a second organic layer in the first slot and on the first organic layer, thinning the thickness of the second organic layer in the first slot and on the first organic layer through exposure to form a second slot, injecting ions into the polycrystalline silicon layer, controlling the ion concentration of the polycrystalline silicon layer in a channel region through controlling the thickness of the second organic layer, combining a heavy doping step and a channel doping step into a whole, reducing one-step ion injection, reducing the cost and increasing the productivity.

Step 10: the source/drain layer 190 is formed on the surface of the second organic layer 172 and connected to the active layer 160 through the first slot 180. Referring to fig. 6, fig. 6 is a schematic structural diagram of a step 10 of a method for manufacturing a display panel according to an embodiment of the present invention.

The step of preparing the source/drain layer 190 further includes the following steps: preparing a flat layer 210 on the source drain layer 190; preparing a third slot 220, wherein the third slot 220 extends from the surface of the flat layer 210 far away from the source drain layer 190 to the surface of the source drain layer 190, and a part of the source drain layer 190 is exposed in the third slot 220; preparing a pixel electrode layer 230 on the surface of the planarization layer 210, and connecting the pixel electrode layer 230 with the source/drain electrode layer 190 through the third slot 220; a pixel defining layer 240 is formed on the pixel electrode layer 230.

In order to achieve the above object, the present invention further provides a display device including the display panel 100 according to the present invention.

Compared with the prior art, the invention has the beneficial effects that: the invention provides a display panel, a preparation method thereof and a display device, wherein a polycrystalline silicon layer is arranged above a grid layer, a first organic layer is arranged above the polycrystalline silicon layer, a first slot hole is etched on the first organic layer, a second organic layer is deposited in the first slot hole and on the first organic layer, the thickness of the second organic layer in the first slot hole and on the first organic layer is reduced through exposure, a second slot hole is formed, ions are injected into the polycrystalline silicon layer, the ion concentration of the polycrystalline silicon layer in a channel region is controlled through controlling the thickness of the second organic layer, the two steps of heavy doping and channel doping are combined into one, one step of ion injection is reduced, the cost is reduced, and the productivity is increased.

In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.

The display panel, the manufacturing method thereof, and the display device provided in the embodiments of the present application are described in detail above, and specific examples are applied in the description to explain the principle and the implementation of the present application, and the description of the embodiments above is only used to help understanding the technical solution and the core idea of the present application; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications or substitutions do not depart from the spirit and scope of the present disclosure as defined by the appended claims.