薄膜晶体管及其制造方法、栅极驱动电路、平板显示器

文档序号:1132192 发布日期:2020-10-02 浏览:12次 >En<

阅读说明:本技术 薄膜晶体管及其制造方法、栅极驱动电路、平板显示器 (Thin film transistor, manufacturing method thereof, gate drive circuit and flat panel display ) 是由 陈丹 金志河 黄斌 于 2018-01-30 设计创作,主要内容包括:一种薄膜晶体管及其制造方法、栅极驱动电路、平板显示器,该薄膜晶体管包括基底(11);设置于该基底(11)上的源极层(12)和漏极层(14)二者之一;设置于该源极层(12)和漏极层(14)二者之一上的绝缘分隔层(13);设置于该绝缘分隔层(13)上的源极层(12)和漏极层(14)二者之另一;覆盖于该源极层(12)和漏极层(14)二者之一、该绝缘分隔层(13)以及该源极层(12)和漏极层(14)二者之另一上,并将该源极层(12)和漏极层(14)二者之一与该源极层(12)和漏极层(14)二者之另一导电连接的有源层(15);设置于该有源层(15)上的栅极绝缘层(16);以及设置在该栅极绝缘层(16)上的栅极层(17)。有益效果为:源极层和漏极层呈垂直布置,能够有效地降低沟道长度,从而降低薄膜晶体管的尺寸。(A thin film transistor and its manufacturing method, gate drive circuit, flat panel display, the thin film transistor includes the base (11); one of a source layer (12) and a drain layer (14) disposed on the substrate (11); an insulating separation layer (13) provided on one of the source layer (12) and the drain layer (14); the other of the source layer (12) and the drain layer (14) provided on the insulating separation layer (13); an active layer (15) covering one of the source layer (12) and the drain layer (14), the insulating spacer layer (13), and the other of the source layer (12) and the drain layer (14), and electrically connecting one of the source layer (12) and the drain layer (14) to the other of the source layer (12) and the drain layer (14); a gate insulating layer (16) disposed on the active layer (15); and a gate electrode layer (17) provided on the gate insulating layer (16). The beneficial effects are that: the source electrode layer and the drain electrode layer are vertically arranged, so that the channel length can be effectively reduced, and the size of the thin film transistor is reduced.)

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