阅读说明：本技术 半导体存储器的制备方法及半导体存储器 (Preparation method of semiconductor memory and semiconductor memory ) 是由 刘铁 于 2018-09-07 设计创作，主要内容包括：本申请涉及半导体制造技术领域,具体而言,涉及一种半导体存储器的制备方法及半导体存储器。该半导体存储器的制备方法包括：提供基体；在所述基体上形成待离子注入的第一装置、第二装置及第三装置；采用第一光罩罩盖所述第三装置,以对所述第一装置及所述第二装置进行图形化处理；将至少一种离子同时注入至所述第一装置及所述第二装置,所述第一装置与所述第二装置中同种离子的注入剂量相同。该技术方案可缩短半导体存储器生产周期,降低生产成本。(The application relates to the technical field of semiconductor manufacturing, in particular to a preparation method of a semiconductor memory and the semiconductor memory. The preparation method of the semiconductor memory comprises the following steps: providing a substrate; forming a first device, a second device and a third device to be implanted with ions on the substrate; covering the third device with a first photomask to perform graphical processing on the first device and the second device; and simultaneously implanting at least one type of ions into the first device and the second device, wherein the implantation doses of the same type of ions in the first device and the second device are the same. The technical scheme can shorten the production period of the semiconductor memory and reduce the production cost.)

1. A method for manufacturing a semiconductor memory, comprising:

providing a substrate;

forming a first device, a second device and a third device to be implanted with ions on the substrate;

covering the third device with a first photomask to perform graphical processing on the first device and the second device;

and simultaneously implanting at least one type of ions into the first device and the second device, wherein the implantation doses of the same type of ions in the first device and the second device are the same.

2. The method of claim 1, wherein the implanting at least one ion into the first device and the second device simultaneously comprises:

and sequentially and simultaneously implanting a plurality of ions into the first device and the second device according to an implantation sequence.

3. The method of claim 2, wherein the plurality of ions comprises:

at least one co-dosed ion, the co-dosed ion being the same dose of ions required in the first and second devices;

at least one differential dose of ions, the differential dose of ions being a different dose of the same ions required in the first and second devices.

4. The production method according to claim 3,

the implanting a plurality of ions into the first device and the second device sequentially and simultaneously according to an implantation sequence includes:

sequentially and simultaneously implanting the same-dose ions and the different-dose ions into the first device and the second device according to an implantation sequence;

wherein an implant dose of differential dose ions in the first and second devices is a desired dose of one of the first and second devices that is relatively smaller in a desired dose.

5. The production method according to claim 4,

the required dose of differential dose ions in the first device is less than the required dose of differential dose ions in the second device, and the difference between the required dose of differential dose ions in the second device and the required dose of differential dose ions in the first device is a differential dose.

6. The production method according to claim 5,

after the differential dose ions are simultaneously implanted into the first and second devices at a desired dose of one of the first and second devices at which the desired dose is relatively small, further comprising:

using a second light shield to cover the first device so as to carry out the graphical processing on the second device

Implanting said differential dose ions into said second device at said differential dose.

7. The production method according to claim 3,

the first device comprises one or more of an NMOS low-voltage device, an NMOS high-voltage device and a readout amplifying device;

the second device comprises one or more of an NMOS low-voltage device, an NMOS high-voltage device and a readout amplifying device;

the third device comprises one or more of an NMOS low-voltage device, an NMOS high-voltage device and a readout amplifying device.

8. The production method according to claim 7,

the at least one co-dose ion comprises one or more of fluoride ion, carbon ion, arsenic ion, boron difluoride ion.

9. The production method according to claim 7,

the at least one differential dose ion comprises one or more of a fluoride ion, a carbon ion, an arsenic ion, a boron difluoride ion.

10. A semiconductor memory, characterized by being produced by the method for producing a semiconductor memory according to any one of claims 1 to 9.