阅读说明：本技术 半导体装置 (Semiconductor device with a plurality of semiconductor chips ) 是由 一条尚生 小野升太郎 山下浩明 于 2019-01-09 设计创作，主要内容包括：一种半导体装置具备：包括第1导电型的第1半导体层的半导体部；设置在半导体部上的第1电极；被第1电极包围的第2电极；被第2电极包围的第3电极。半导体部还包括：选择性设置在第1半导体层与第1电极之间的第2导电型的第2半导体层；选择性设置在第2半导体层与第1电极之间的第1导电型的第3半导体层；具有设置在第1半导体层与第2电极及第3电极间的主部和设置在第1半导体层与第1电极间的外缘部的第2导电型的第4半导体层；选择性设置在第4半导体层中并具有与第1电极电连接的部分的第1导电型的第5半导体层；以及,具备设置在第4半导体层中的与第5半导体部分离的位置且与第3电极电连接的部分的第1导电型的第6半导体层。(A semiconductor device includes: a semiconductor section including a 1 st semiconductor layer of a 1 st conductivity type; a 1 st electrode provided on the semiconductor portion; a 2 nd electrode surrounded by the 1 st electrode; a 3 rd electrode surrounded by the 2 nd electrode. The semiconductor section further includes: a 2 nd semiconductor layer of the 2 nd conductivity type selectively provided between the 1 st semiconductor layer and the 1 st electrode; a 3 rd semiconductor layer of the 1 st conductivity type selectively provided between the 2 nd semiconductor layer and the 1 st electrode; a 4 nd semiconductor layer of 2 nd conductivity type having a main portion provided between the 1 st semiconductor layer and the 2 nd and 3 rd electrodes and an outer edge portion provided between the 1 st semiconductor layer and the 1 st electrode; a 5 th semiconductor layer of a 1 st conductivity type selectively provided in the 4 th semiconductor layer and having a portion electrically connected to the 1 st electrode; and a 6 th semiconductor layer of the 1 st conductivity type provided at a position separated from the 5 th semiconductor section in the 4 th semiconductor layer and electrically connected to the 3 rd electrode.)

1. A semiconductor device includes:

a semiconductor section including a 1 st semiconductor layer of a 1 st conductivity type;

a 1 st electrode provided on the semiconductor section;

a 2 nd electrode provided on the semiconductor section with a 1 st insulating film interposed therebetween, the 2 nd electrode being provided at a position surrounded by the 1 st electrode as viewed from above, the 2 nd electrode being separated from the 1 st electrode;

a 3 rd electrode provided on the semiconductor section and spaced apart from the 2 nd electrode at a position surrounded by the 2 nd electrode when viewed from above; and

a control electrode provided between the semiconductor section and the 1 st electrode, electrically insulated from the semiconductor section with a 2 nd insulating film interposed therebetween, and electrically insulated from the 1 st electrode with a 3 rd insulating film interposed therebetween,

the semiconductor section further includes a 2 nd semiconductor layer of the 2 nd conductivity type, a 3 rd semiconductor layer of the 1 st conductivity type, a 4 th semiconductor layer of the 2 nd conductivity type, a 5 th semiconductor layer of the 1 st conductivity type, and a 6 th semiconductor layer of the 1 st conductivity type,

the 2 nd semiconductor layer is selectively provided between the 1 st semiconductor layer and the 1 st electrode,

the 3 rd semiconductor layer is selectively provided between the 2 nd semiconductor layer and the 1 st electrode and is electrically connected to the 1 st electrode,

the 4 th semiconductor layer has a main portion provided between the 1 st semiconductor layer and the 2 nd electrode and between the 1 st semiconductor layer and the 3 rd electrode, and an outer edge portion provided between the 1 st semiconductor layer and the 1 st electrode,

the 5 th semiconductor layer is selectively provided in the 4 th semiconductor layer, and has a portion which is located between the outer edge portion of the 4 th semiconductor layer and the 1 st electrode and is electrically connected to the 1 st electrode,

the 6 th semiconductor layer is provided at a position apart from the 5 th semiconductor layer in the 4 th semiconductor layer, and has a portion which is located between the main portion of the 4 th semiconductor layer and the 3 rd electrode and is electrically connected to the 3 rd electrode,

the control electrode is disposed at a position facing the 1 st semiconductor layer, the 2 nd semiconductor layer, and the 3 rd semiconductor layer with the 2 nd insulating film interposed therebetween.

2. The semiconductor device as set forth in claim 1,

the 3 rd electrode has a portion extending in the 1 st insulating film and electrically connected to the 6 th semiconductor layer.

3. The semiconductor device as set forth in claim 1,

the 3 rd electrode is located at the center of the 2 nd electrode when viewed from above.

4. The semiconductor device as set forth in claim 1,

a plurality of the 3 rd electrodes are provided,

the plurality of 3 rd electrodes are electrically connected to the 6 th semiconductor layer.

5. The semiconductor device as set forth in claim 1,

the semiconductor section further includes a 7 th semiconductor layer of a 2 nd conductivity type, the 7 th semiconductor layer being selectively provided between the 2 nd semiconductor layer and the 1 st electrode, containing a 2 nd conductivity type impurity at a higher concentration than the 2 nd conductivity type impurity of the 2 nd semiconductor layer, and being electrically connected to the 1 st electrode,

the 2 nd semiconductor layer is electrically connected to the 5 th semiconductor layer through the 7 th semiconductor layer and the 1 st electrode.

6. The semiconductor device as set forth in claim 1,

the 5 th semiconductor layer is provided so as to surround the 6 th semiconductor layer when viewed from above.

7. The semiconductor device as set forth in claim 1,

the 5 th semiconductor layer is provided so as to surround the 2 nd electrode when viewed from above.

8. The semiconductor device as set forth in claim 1,

the semiconductor section further includes an 8 th semiconductor layer of the 1 st conductivity type, the 8 th semiconductor layer being located between the 4 th semiconductor layer and the 2 nd electrode, and being provided between the 5 th semiconductor layer and the 6 th semiconductor layer separately from the 5 th semiconductor layer and the 6 th semiconductor layer.

9. The semiconductor device as set forth in claim 8,

the 8 th semiconductor layer is provided so as to surround the 6 th semiconductor layer when viewed from above,

the 5 th semiconductor layer is provided so as to surround the 8 th semiconductor layer.

10. The semiconductor device as set forth in claim 1,

and a conductor electrically connected to the 2 nd electrode and the 3 rd electrode.

11. The semiconductor device as set forth in claim 10,

the conductor is a bonding wire or a connector.

Technical Field

Background

In the manufacturing process of a semiconductor device, it is preferable to perform initial screening in order to avoid accidental failures in practical use. For example, by applying a high voltage exceeding the rated value of the gate voltage between the gate electrode and the back gate of a mosfet (metal Oxide Semiconductor Field Effect transistor), initial defects of the gate insulating film can be removed. However, when a structure in which a high voltage can be applied to the gate insulating film is maintained, it is inevitable that a high voltage exceeding a rated value is applied to the gate insulating film after screening and the gate insulating film is damaged.

Disclosure of Invention

Drawings

Fig. 1(a) and 1(b) are schematic views showing a semiconductor device according to an embodiment.

Fig. 2 is a circuit diagram showing a semiconductor device according to an embodiment.

Fig. 3(a) and 3(b) are schematic views showing a mounting form of the semiconductor device according to the embodiment.

Fig. 4 is a schematic diagram showing a semiconductor device according to a modification of the embodiment.

Fig. 5(a) and 5(b) are schematic views showing a semiconductor device according to another modification of the embodiment.

Embodiments relate to a semiconductor device.