阅读说明：本技术 大功率阴阳极环形叉指GaN准垂直pn结二极管及制备方法 (High-power cathode and anode annular interdigital GaN quasi-vertical pn junction diode and preparation method thereof ) 是由 张进成 刘俊伟 赵胜雷 刘志宏 张雅超 张苇杭 段小玲 许晟瑞 郝跃 于 2019-10-18 设计创作，主要内容包括：本发明公开了一种大功率阴阳极环形叉指GaN准垂直pn结二极管及其制备方法,主要解决目前GaN准垂直pn结二极管输出功率无法满足更高功率需求的问题。其自下而上包括：衬底(1)、缓冲层(2)和n型GaN层(3),n型GaN层(3)的上部设有p型GaN层(4)和阴极(5),p型GaN层(4)的上部设有阳极(6),该阴极和阳极采用环形叉指结构,即阳极是以实心圆为中心,外部分布多个开口圆环的同心结构；阴极是分布在阳极环之间的多个开口圆环,形成阳极环与阴极环的同心环形交替嵌套结构。本发明降低了电场的边缘效应,并通过多层环形互连提高了GaN准垂直二极管输出功率密度,可用于微波整流、功率开关电路。(The invention discloses a high-power cathode and anode annular interdigital GaN quasi-vertical pn junction diode and a preparation method thereof, and mainly solves the problem that the output power of the conventional GaN quasi-vertical pn junction diode cannot meet the requirement of higher power. It includes from bottom to top: the buffer layer is arranged on the upper portion of the n-type GaN layer (3), the p-type GaN layer (4) and the cathode (5) are arranged on the upper portion of the n-type GaN layer (3), the anode (6) is arranged on the upper portion of the p-type GaN layer (4), and the cathode and the anode are of annular interdigital structures, namely the anode is of a concentric structure with a solid circle as the center and a plurality of open circular rings distributed outside; the cathode is a plurality of open circular rings distributed among the anode rings to form a concentric ring-shaped alternate nesting structure of the anode rings and the cathode rings. The invention reduces the edge effect of the electric field, improves the output power density of the GaN quasi-vertical diode through multilayer annular interconnection, and can be used for microwave rectification and power switch circuits.)

1. The high-power cathode and anode annular interdigital GaN quasi-vertical pn junction diode comprises from bottom to top: the buffer structure comprises a substrate (1), a buffer layer (2) and an n-type GaN layer (3), wherein a p-type GaN layer (4) and a cathode (5) are arranged on the upper part of the n-type GaN layer (3), and an anode (6) is arranged on the upper part of the p-type GaN layer (4), and the buffer structure is characterized in that the cathode (5) and the anode (6) adopt an annular interdigital structure, namely the anode (6) is a concentric structure with a solid circle as the center and a plurality of open circular rings distributed outside; the cathode (5) is a plurality of open circular rings distributed among the anode rings to form a concentric ring-shaped alternate nesting structure of the anode rings and the cathode rings.

2. The diode of claim 1, wherein: the substrate (1) is one of sapphire, SiC, Si and diamond.

3. The diode of claim 1, wherein: the buffer layer (2) is one of GaN, AlN, AlGaN and InGaN.

4. The diode of claim 1, wherein: the cathode (5) is made of Ti/Al/Ni/Au with the thickness of 22/140/55/45nm or Ti/Al/Pt/Au with the thickness of 22/140/50/45 nm.

5. The diode of claim 1, wherein: the anode (6) is made of Ni/Au or Pt/Au with the thickness of 120-300 nm.

6. The diode of claim 1, wherein: the distance between the concentric opening rings of the cathode (5) is 20-40 μm, the width of the concentric opening rings is 1-10 μm, and the number of the opening rings is more than or equal to 2.

7. The diode of claim 1, wherein: the radius of a central solid circle of the anode (6) is 0.5-10 mu m, the distance between concentric opening circular rings is 20-40 mu m, the width of the concentric opening circular rings is 1-10 mu m, and the sum of the number of the central solid circles and the number of the opening circular rings is more than or equal to 2.

8. A preparation method of a high-power cathode and anode annular interdigital GaN quasi-vertical pn junction diode is characterized by comprising the following steps:

1) sequentially carrying out ultrasonic cleaning on an epitaxial wafer material comprising a substrate, a buffer layer, an n-type GaN layer and a p-type GaN layer from bottom to top for 3-5min by using acetone, isopropanol and deionized water;

2) photoetching is carried out on the cleaned epitaxial wafer material to obtain a cathode groove pattern with a plurality of opening concentric rings; etching and removing the p-type GaN in the pattern area by RIE or ICP etching equipment to obtain a cathode groove; then the etched epitaxial wafer is placed in an RTP rapid thermal annealing furnace in N₂Annealing in the atmosphere, and annealing for 5min at the low temperature of 400-500 ℃ to repair the etching damage;

3) making a cathode

Photoetching the epitaxial wafer material subjected to low-temperature annealing to obtain a cathode pattern with a plurality of opening concentric rings;

preparing Ti/Al/Ni/Au cathode metal with the thickness of 22/140/55/45nm or Ti/Al/Pt/Au cathode metal with the thickness of 22/140/50/45nm at the evaporation rate of 0.1-0.3nm/s by adopting an E-beam device;

stripping after the cathode metal is evaporated, and annealing by using an RTP (rapid thermal annealing) furnace to enable the cathode metal and the n-type GaN layer to form ohmic contact to obtain a cathode;

4) making anodes

Photoetching the epitaxial wafer material subjected to cathode manufacturing to obtain an anode pattern of a concentric structure with a solid circle as the center and a plurality of open circular rings distributed outside;

preparing anode metal at an evaporation rate of 0.1-0.3nm/s by adopting E-beam equipment, wherein the anode metal adopts Ni/Au or Pt/Au or Pd/Au with the thickness of 120-300 nm;

and stripping after the anode metal is evaporated, and annealing by using an RTP (rapid thermal annealing) furnace to enable the anode metal and the p-type GaN layer to form ohmic contact to obtain an anode, thereby finishing the manufacture of the device.

9. The production method according to claim 8, wherein 2) etching and removing the p-type GaN layer in the cathode groove pattern region by RIE or ICP etching equipment, and the used etching gas is Cl₂And BCl₃The flow rates are 10/20sccm, respectively.

10. The production method according to claim 8, wherein:

the annealing process condition of the RTP rapid thermal annealing furnace in the step 3) is as follows: in N₂The annealing is carried out in the atmosphere, the temperature is set to be 820-;

the annealing process conditions of the RTP rapid thermal annealing furnace in the step 4) are as follows: in N₂The annealing is carried out in the atmosphere, the temperature is set to be 720-760 ℃, and the annealing time is 30 s.

Technical Field

The invention belongs to the technical field of micro-electronics, and particularly relates to a GaN pn junction diode device which can be used for microwave rectification and power switch circuits.

Technical Field

The device based on traditional semiconductor materials such as Si, GaAs and the like is limited by the properties of the materials, so that the device indexes such as power, breakdown voltage resistance and the like are difficult to improve. In recent years, a new generation of wide bandgap semiconductor material represented by group III nitride is developed rapidly, has the advantages of wide band gap, high saturated electron drift velocity, high critical breakdown field strength, high thermal conductivity and stable chemical properties, and has great development potential in the field of millimeter wave and submillimeter wave high-power electronic devices. The GaN material is taken as a typical representative of wide-bandgap semiconductor materials, is very suitable for preparing high-temperature, anti-radiation, high-working-frequency and high-power devices, is widely applied in the fields of aerospace, radar, communication and the like, and the research of the current GaN-based diode device is one of the international hotspots at present.

In general, diode devices of GaN are classified into lateral devices and vertical devices and quasi-vertical devices. Wherein:

GaN lateral diode devices are limited by current crowding, it is difficult to obtain high output current, and as planar devices, device characteristics are easily affected by surface states, resulting in current collapse and other negative effects.

GaN vertical diode devices, which overcome the above-mentioned problems of GaN lateral diode devices: firstly, because the vertical drift layer structure is adopted to resist voltage, the critical breakdown field intensity of the GaN material is very high, and the breakdown voltage is very high; secondly, because the conduction is inside rather than on the surface, the influence of surface state is avoided, the dynamic characteristic of the device is good, and simultaneously, because the conduction channel is on a thick epitaxial layer, the current crowding limitation is avoided. However, the vertical diode device needs to be prepared on an epitaxial wafer of a GaN self-supporting substrate, and the cost is high.

As shown in fig. 1, the GaN quasi-vertical pn junction diode device includes, from bottom to top, a substrate, a buffer layer, an n-type GaN layer, and a p-type GaN layer, wherein a cathode is disposed on the n-type GaN layer, and an anode is disposed on the p-type GaN layer. Such a structure can be grown on a non-GaN self-supporting substrate, such as sapphire or silicon, which can reduce production costs compared to expensive vertical diodes fabricated on GaN self-supporting substrates. However, because the conventional annular metal electrode of the existing quasi-vertical structure pn junction diode has an edge effect, the current density exponentially attenuates from the edge of the anode to the center along with the increase of the distance, and the current is concentrated on the edge of the anode metal, so that most of the area of the anode metal contributes little to the output current, namely the characteristic on-resistance of the device is increased, the output power of the device is limited, most of the area of the anode is wasted, the output current density of the device is reduced, and the application of the diode device in a power switch circuit is difficult to satisfy.

Disclosure of Invention

The invention aims to provide a high-power cathode and anode annular interdigital GaN quasi-vertical pn junction diode and a preparation method thereof aiming at the defects of the GaN quasi-vertical pn junction diode device, so as to improve the area utilization rate of anode metal, increase the output current density of the device, expand the output power of the device and meet the application of the diode device in a power switch circuit.

The technical scheme for realizing the purpose of the invention is as follows:

1. the high-power cathode and anode annular interdigital GaN quasi-vertical pn junction diode comprises from bottom to top: the solar cell comprises a substrate, a buffer layer and an n-type GaN layer, wherein the upper part of the n-type GaN layer is provided with a p-type GaN layer and a cathode, and the upper part of the p-type GaN layer is provided with an anode; the cathode is a plurality of open circular rings distributed among the anode rings to form a concentric ring-shaped alternate nesting structure of the anode rings and the cathode rings.

Further, the substrate is one of sapphire, SiC, Si, and diamond.

Further, the buffer layer is one of GaN, AlN, AlGaN and InGaN. Furthermore, the cathode adopts Ti/Al/Ni/Au with the thickness of 22/140/55/45nm or Ti/Al/Pt/Au with the thickness of 22/140/50/45 nm.

Furthermore, the anode adopts Ni/Au or Pt/Au with the thickness of 120-300 nm.

Furthermore, the distance between the concentric opening rings of the cathode is 20-40 μm, the width of the concentric opening rings is 1-10 μm, and the number of the opening rings is more than or equal to 2.

Furthermore, the radius of the central solid circle of the anode is 0.5-10 μm, the distance between the concentric open circles is 20-40 μm, the width of the concentric open circles is 1-10 μm, and the sum of the number of the central solid circles and the number of the open circles is more than or equal to 2.

2. A preparation method of a high-power cathode and anode annular interdigital GaN quasi-vertical pn junction diode is characterized by comprising the following steps:

1) sequentially carrying out ultrasonic cleaning on an epitaxial wafer material comprising a substrate, a buffer layer, an n-type GaN layer and a p-type GaN layer from bottom to top for 3-5min by using acetone, isopropanol and deionized water;

2) photoetching is carried out on the cleaned epitaxial wafer material to obtain a cathode groove pattern with a plurality of opening concentric rings; etching and removing the p-type GaN in the pattern area by RIE or ICP etching equipment to obtain a cathode groove; then the etched epitaxial wafer is placed in an RTP rapid thermal annealing furnace in N₂Annealing in the atmosphere, and annealing for 5min at the low temperature of 400-500 ℃ to repair the etching damage;

3) making a cathode

Photoetching the epitaxial wafer material subjected to low-temperature annealing to obtain a cathode pattern with a plurality of opening concentric rings;

preparing Ti/Al/Ni/Au cathode metal with the thickness of 22/140/55/45nm or Ti/Al/Pt/Au cathode metal with the thickness of 22/140/50/45nm at the evaporation rate of 0.1-0.3nm/s by adopting an E-beam device;

stripping after the cathode metal is evaporated, and annealing by using an RTP (rapid thermal annealing) furnace to enable the cathode metal and the n-type GaN layer to form ohmic contact to obtain a cathode;

4) making anodes

Photoetching the epitaxial wafer material subjected to cathode manufacturing to obtain an anode pattern of a concentric structure with a solid circle as the center and a plurality of open circular rings distributed outside;

preparing anode metal at an evaporation rate of 0.1-0.3nm/s by adopting E-beam equipment, wherein the anode metal adopts Ni/Au or Pt/Au or Pd/Au with the thickness of 120-300 nm;

and stripping after the anode metal is evaporated, and annealing by using an RTP (rapid thermal annealing) furnace to enable the anode metal and the p-type GaN layer to form ohmic contact to obtain an anode, thereby finishing the manufacture of the device.

Compared with the conventional annular quasi-vertical GaN pn junction diode, the invention has the following beneficial effects:

1. the invention adopts a multilayer annular structure, thereby reducing the influence of edge effect, improving the current density of the anode and meeting the requirements of high-power devices.

2. The invention adopts the multilayer annular structure, thus improving the area utilization rate of the anode, reducing the occupied area of the device and the size of the device under the same output power, and further reducing the production cost.

3. The invention has simple manufacturing process and high yield.

Drawings

FIG. 1 is a schematic diagram of a conventional ring-shaped GaN quasi-vertical pn junction diode device;

FIG. 2 is a schematic diagram of a GaN pn junction diode device of the present invention;

FIG. 3 is a top view of a GaN pn junction diode device of the invention;

FIG. 4 is a schematic flow chart of the present invention for fabricating a GaN pn junction diode.

Detailed Description

The invention is further described below with reference to the accompanying drawings.

Referring to fig. 2 and 3, the high-power cathode-anode annular interdigital GaN quasi-vertical pn junction diode of the invention comprises from bottom to top: the solar cell comprises a substrate 1, a buffer layer 2 and an n-type GaN layer 3, wherein a p-type GaN layer 4 and a cathode 5 are arranged on the upper part of the n-type GaN layer 3, and an anode 6 is arranged on the upper part of the p-type GaN layer 4, wherein the cathode 5 and the anode 6 adopt annular interdigital structures, namely the anode 6 is a concentric structure with a solid circle as the center and a plurality of open circular rings distributed outside; the cathode 5 is a plurality of open circular rings distributed among the anode rings to form a concentric ring-shaped alternate nesting structure of the anode rings and the cathode rings.

The substrate 1 is one of sapphire, SiC, Si, GaN, AlN and diamond; the buffer layer 2 adopts one of GaN, AlN, AlGaN and InGaN; the cathode 5 adopts Ti/Al/Ni/Au with the thickness of 22/140/55/45nm or Ti/Al/Pt/Au with the thickness of 22/140/50/45 nm; the anode 6 adopts Ni/Au or Pt/Au or Pd/Au metal with the thickness of 120-300 nm; the distance between the concentric opening rings of the cathode 5 is 20-40 μm, the width of the concentric opening rings is 1-10 μm, and the number of the opening rings is more than or equal to 2, the value of the example is 2, but not limited to the number of the opening rings is 2; the radius of the central solid circle of the anode 6 is 0.5-10 μm, the distance between the concentric open circular rings is 20-40 μm, the width of the concentric open circular rings is 1-10 μm, and the sum of the number of the central solid circles and the number of the open circular rings is greater than or equal to 2, which is 2 in this example, but not limited to 2.

Referring to fig. 4, the method for preparing a high-power cathode-anode annular interdigital GaN quasi-vertical pn junction diode of the invention provides the following three embodiments.