Self-biased split gate trench type power MOSFET device
阅读说明：本技术 自偏置***栅沟槽型功率mosfet器件 (Self-biased split gate trench type power MOSFET device ) 是由 孔谋夫 陈罕之 刘聪 陈星弼 于 2019-08-30 设计创作，主要内容包括：本发明涉及功率半导体器件领域,尤其涉及分裂栅沟槽型MOS器件,具体为自偏置分裂栅沟槽型功率MOSFET器件；本发明在传统的分裂栅沟槽型MOS器件基础上引入自偏置电压结构,利用栅极控制信号给分裂栅提供自偏置电压,与传统分裂栅沟槽型MOS器件相比,由于自偏置电压的作用,在器件导通时产生了积累层,使器件的比导通电阻有极大的降低。本说明书中,分裂栅自偏置电压的实现分为两种方式,分别为增加外部电路和增加可提供偏置电压的结构,前者的偏置电压来源于栅极的驱动电路,与前者相比,后者具有减少驱动功耗的优势。(The invention relates to the field of power semiconductor devices, in particular to a split-gate trench type MOS device, specifically a self-biased split-gate trench type power MOSFET device; compared with the traditional split gate groove type MOS device, the self-bias voltage structure is introduced on the basis of the traditional split gate groove type MOS device, and the self-bias voltage is provided for the split gate by utilizing the gate control signal. In this specification, the implementation of the split gate self-bias voltage is divided into two ways, namely, adding an external circuit and adding a structure capable of providing a bias voltage, in which the bias voltage of the former is derived from a gate driving circuit, and the latter has an advantage of reducing driving power consumption compared with the former.)
1. A self-biased split-gate trench-type power MOSFET device, comprising:
an th conductive type substrate 1, a drain 7 located below the th conductive type substrate 1, a th conductive type drift region 2 located above the th conductive type substrate 1, a second conductive type base region 3 located above the th conductive type drift region 2, a second conductive type heavily doped region 4 and a th conductive type heavily doped region 5 formed in the second conductive type base region 3 and adjacent to each other, a source 10 covering the second conductive type heavily doped region 4 and the th conductive type heavily doped region 5, an oxidation region 6 adjacent to the th conductive type drift region 2, the second conductive type heavily doped base region 3 and the th conductive type heavily doped region 5, a control gate 9 and a split gate 8 located in the oxidation region 6;
the device is characterized by further comprising a capacitor C1 and a diode D1, wherein the source 10 is connected with the split gate 8 after being connected with the capacitor C1, and the control gate 9 is connected with the split gate 8 after being connected with the diode D1.
2. A self-biased split-gate trench-type power MOSFET device, comprising:
an th conductive type substrate 1, a drain 7 located below the th conductive type substrate 1, a th conductive type drift region 2 located above the 0 th conductive type substrate 1, a second conductive type base region 3 located above the th conductive type drift region 2, a second conductive type heavily doped region 4 formed in the second conductive type base region 3, a source 10 bridged over the th conductive type drift region 2 and the th conductive type heavily doped region 5 of the second conductive type base region 3, wherein the th conductive type heavily doped region 5 is adjacent to the second conductive type heavily doped region 4 and covers the second conductive type heavily doped region 4 and the th conductive type heavily doped region 5, an oxidation region 6 adjacent to both the th conductive type drift region 2 and the th conductive type heavily doped region 5, a control gate 9 located in the oxidation region 6 and a split gate 8;
the device is characterized by further comprising a capacitor C1 and a diode D1, wherein the source 10 is connected with the split gate 8 after being connected with the capacitor C1, and the control gate 9 is connected with the split gate 8 after being connected with the diode D1.
3. A self-biased split-gate trench power MOSFET as claimed in claim 1 or 2 wherein when the th conductivity type is N-type and the second conductivity type is P-type, the cathode of the capacitor C1 is connected to the source 10, the anode of the diode D1 is connected to the control gate 9, the split gate 8 is connected to the anode of the capacitor C1 and the cathode of the diode D1, and when the th conductivity type is P-type and the second conductivity type is N-type, the anode of the capacitor C1 is connected to the source 10, the cathode of the diode D1 is connected to the control gate 9, and the split gate 8 is connected to the cathode of the capacitor C1 and the anode of the diode D1.
4. A self-biasing split-gate trench power MOSFET device as claimed in claim 1 or 2 wherein said split gate 8 is a rectangular split gate, a truncated rectangular split gate or a trapezoidal split gate.
5. A self-biasing split-gate trench power MOSFET device as claimed in claim 1 or 2 further comprising a second conductivity type doped region 11 in the th conductivity type drift region 2 and in contact with the second conductivity type base region 3 and not in contact with the oxide region 6.
6, A device for providing bias voltage for a split gate, which comprises a conductivity type substrate 12, a drain 18 positioned below a conductivity type substrate 12, a conductivity type drift region 13 positioned above a conductivity type substrate 12, a second conductivity type base region 14 and a second conductivity type lightly doped region 15 which are adjacent and positioned above a conductivity type drift region 13, a second conductivity type heavily doped region 15 and a conductivity type heavily doped region 16 which are adjacent and formed in the second conductivity type base region 14, a source 20 covering the second conductivity type heavily doped region 15 and the conductivity type heavily doped region 16, a conductivity type heavily doped region 17 formed in the second conductivity type lightly doped region 15 and an electrode 19 covering the conductivity type heavily doped region 17, wherein the source 20 is connected with a capacitor C1 and then connected with the split gate, and the electrode 19 is connected with a diode D1 and then connected with the split gate.
7. The device for providing a bias voltage to a split gate of claim 6, wherein said source 20 is connected to the cathode of a capacitor C1, said electrode 19 is connected to the anode of a diode D1, the cathode of a diode D1, the anode of a capacitor C1 and the split gate when the th conductivity type is N-type and the second conductivity type is P-type, and said source 20 is connected to the anode of a capacitor C1, said electrode 19 is connected to the cathode of a diode D1, the anode of a diode D1 and the cathode of a capacitor C1 are connected to the split gate when the th conductivity type is P-type and the second conductivity type is N-type.
8. The device for providing a bias voltage to a split-gate as claimed in claim 6, further comprising an oxide layer 22 overlying the lightly doped region 15 of the second conductivity type, a portion of the base region 14 of the second conductivity type, and a portion of the heavily doped region 17 of the th conductivity type, wherein the oxide layer 22 is isolated from both the source 20 and the electrode 19, and a gate 21 is disposed over the oxide layer 22.
Technical Field
The invention relates to the field of power semiconductor devices, in particular to a split-gate trench type MOS device, and specifically relates to a self-biased split-gate trench type power MOSFET device.
Background
The introduction of Split gate (Split gate) enables the capacitance C between the gate and the drain of the trench type power MOS deviceGDThe switching loss is obviously reduced, the working frequency of the device is effectively increased, but in the structure of the traditional split-gate trench type MOS device, a split gate is usually connected with a source electrode S, and increases the specific on-resistance of the device to a certain extent, as shown in fig. 1. in order to reduce the specific on-resistance of the split-gate trench type MOS device, high potentials relative to the source electrode S can be applied to the split gate SG in the design process of the split-gate trench type MOS device, so that an accumulation layer is formed on the side wall of an oxide layer of the split gate, and the specific on-resistance of the device is reduced, as shown in fig. 2, but the device is changed from the original three ends into four-end devices, which is not favorable for compatibility with the conventional device, and simultaneously provides bias for the split gate SG, needs additional power supply, increases the complexity and cost of application.
Based on this, the present invention provides a self-biased split-gate trench-type power MOSFET device.
Disclosure of Invention
The invention aims to provide a self-bias split gate trench type power MOSFET device which is used for generating stable self-bias voltage through an external circuit structure by utilizing a control signal of a gate; the invention adopts a self-biasing method to generate the split gate SG bias voltage, which not only can improve the frequency characteristic and the switching loss of the device, but also can introduce the accumulation layer for conduction, increase the conduction capability and reduce the specific on-resistance of the device.
In order to achieve the purpose, the invention adopts the technical scheme that:
a self-biased split-gate trench-type power MOSFET device, comprising:
an th
the device is characterized by further comprising a capacitor C1 and a diode D1, wherein the
A self-biased split-gate trench-type power MOSFET device, comprising:
an th
the device is characterized by further comprising a capacitor C1 and a diode D1, wherein the
, in the two self-biased split-gate trench power MOSFET devices, when the conductivity type is N-type and the second conductivity type is P-type, the cathode of the capacitor C1 is connected to the
, in the two self-biased split-gate trench power MOSFET devices, the
Further , in the two self-biased split-gate trench power MOSFET devices, the device further includes a second conductive type doped
A device for providing bias voltage for a split gate comprises a
, in the device, when the conductivity type is N-type and the second conductivity type is P-type, the
, the device for providing bias voltage for the split gate further includes an
Compared with the prior art, the invention has the beneficial effects that:
the self-bias split-gate groove type power MOSFET device provided by the invention adopts a self-bias method to generate split-gate bias voltage, so that the frequency characteristic and the switching loss of the device can be improved, and the specific on-resistance of the device can be reduced by introducing the accumulation layer conductive channel.
Drawings
Fig. 1 is a schematic diagram of a conventional split-gate deep trench MOSFET structure.
Fig. 2 is a schematic structural diagram of a self-biased split-gate trench-type power MOS device.
3-8 are schematic structural diagrams of 6 different configurations of self-biased split-gate trench MOS devices; fig. 3 is a split gate inversion layer MOSFET with a self-bias structure, fig. 4 is a truncated rectangular split gate inversion layer MOSFET with a self-bias structure, fig. 5 is a trapezoidal split gate inversion layer MOSFET with a self-bias structure, fig. 6 is a split gate accumulation layer MOSFET with a self-bias structure, fig. 7 is a truncated rectangular split gate accumulation layer MOSFET with a self-bias structure, and fig. 8 is a trapezoidal split gate accumulation layer MOSFET with a self-bias structure.
Fig. 9 is a MOSFET of a self-biased split-gate inversion layer structure incorporating a super junction structure.
Figure 10 is a schematic diagram of a device structure for providing embodiments of bias voltages for split gates.
Figure 11 is a schematic diagram of a device structure for providing embodiments of bias voltages for split gates.
Detailed Description
The invention is further illustrated in detail in connection with the figures and examples.