阅读说明：本技术 半导体装置和包括半导体装置的半导体封装件 (Semiconductor device and semiconductor package part including semiconductor device ) 是由 金壮厚 于 2019-03-19 设计创作，主要内容包括：公开了一种半导体装置和包括半导体装置的半导体封装件。所述半导体装置包括：内部电路,在核区域中；第一保护电路,在核区域周围的外围区域中,其中,第一保护电路包括：第一保护部分、第二保护部分以及第一熔断器；以及第一焊盘,接收第一信号。第一焊盘经由第一熔断器电连接到第一保护部分,并且第一焊盘电连接到第二保护部分。内部电路通过第二保护部分电连接到第一焊盘。当具有等于或大于预定电压的大小的浪涌电压输入到第一焊盘时,第一保护部分和第二保护部分中的每个防止浪涌电压施加到内部电路。(Disclose a kind of semiconductor device and the semiconductor package part including semiconductor device.The semiconductor device includes: internal circuit, in core region；First protection circuit, in the peripheral region around core region, wherein the first protection circuit includes: the first protection part, the second protection part and first fuse；And first pad, receive the first signal.First pad is electrically connected to the first protection part via first fuse, and the first pad is electrically connected to the second protection part.Internal circuit is electrically connected to the first pad by the second protection part.When having the surge voltage of the size equal to or more than predetermined voltage to be input to the first pad, each of the first protection part and the second protection part prevent surge voltage to be applied to internal circuit.)

1. a kind of semiconductor device, comprising:

Internal circuit, in core region；

First protection circuit, in the peripheral region around core region, wherein first protection circuit include first protection part, Second protection part and first fuse；

First pad receives the first signal,

Wherein:

First pad is electrically connected to the first protection part via first fuse, and the first pad is electrically connected to the second protection portion Point,

Internal circuit is electrically connected to the first pad by the second protection part,

When having the surge voltage of absolute value equal to or more than predetermined voltage to be input to the first pad, the first protection part and Each of second protection part prevents surge voltage to be applied to internal circuit.

2. semiconductor device as described in claim 1, in which:

First protection portion is divided

First diode has the anode for being electrically connected to first node and is electrically connected to the first voltage line for being applied first voltage Cathode,

Second diode has the cathode for being electrically connected to first node and is electrically connected to and is applied second different from first voltage The anode of the second voltage line of voltage,

Second protection portion is divided

Third diode has and is electrically connected to the anode of third node and is electrically connected to the cathode of first voltage line,

4th diode has and is electrically connected to the cathode of third node and is electrically connected to the anode of second voltage line.

3. semiconductor device as claimed in claim 2, in which:

First fuse is electrically connected to first node and second node, and the first pad is electrically connected to second node and third node.

4. semiconductor device as claimed in claim 3, wherein internal circuit is electrically connected to third node.

5. semiconductor device as claimed in claim 2, in which:

First protection portion point includes multiple first diodes and multiple second diodes,

Second protection portion point includes the 4th diode of one or more third diodes and one or more,

Quantity including the multiple first diode and the multiple second diode in the first protection part can be greater than Number including one or more of third diodes and one or more of 4th diodes in the second protection part Amount.

6. semiconductor device as claimed in claim 5, further includes:

Second pad is connected to the first protection part by the first connecting line,

Wherein:

First protection part further include: fusing diode has the anode for being electrically connected to first node, the electrical connection of the first connecting line To the cathode of the second pad and fusing diode.

7. semiconductor device as described in claim 1, further includes:

Second pad is electrically connected to the first protection part by the first connecting line.

8. semiconductor device as claimed in claim 7, wherein the width of the first connecting line is greater than the width of first fuse.

9. semiconductor device as described in claim 1, further includes:

Second protection circuit, in peripheral region and including third protection part, the 4th protection part and second fuse；

Third pad, reception second signal is simultaneously different from the first pad,

Wherein, third pad is electrically connected to third protection part via second fuse, and third pad is electrically connected to the 4th Part is protected,

Internal circuit is electrically connected to third pad by the 4th protection part,

When surge voltage is input to third pad, third protection part and the 4th protection part are respectively formed third current path With the 4th current path, wherein surge voltage is discharged by third current path and the 4th current path, to prevent surge voltage It is applied to internal circuit.

10. a kind of semiconductor package part, comprising:

First semiconductor device, comprising: the first pad receives the first signal；First protection part, is electrically connected by first fuse It is connected to the first pad；Second protection part, is connected to the first pad；Second pad is electrically connected to the first protection circuit；In first Portion's circuit is electrically connected to the first pad by the second protection part；

Circuit board, the first semiconductor device are mounted on circuit boards；

First i/o pads on circuit boards and are electrically connected to the first pad；

Pad is detected, on circuit boards and is electrically connected to the second pad；

Wherein, when the fusion current for being equal to or more than scheduled current is defeated between the first i/o pads and detection pad Fashionable, first fuse is electrically insulated.

11. semiconductor package part as claimed in claim 10, further includes:

Second semiconductor device, comprising: third pad receives the first signal, wherein third pad is different from the first pad；The Three protection parts, are electrically connected to third pad by second fuse；4th protection part, is connected to third pad；4th weldering Disk is electrically connected to third protection part；Second internal circuit is electrically connected to third pad by the 4th protection part；

Wherein, third pad is electrically connected to the first i/o pads, and the 4th pad is electrically connected to detection pad,

When fusion current is entered between the first i/o pads and detection pad, second fuse is electrically insulated.

12. semiconductor package part as claimed in claim 11, wherein the first semiconductor device further include: the 5th pad receives Third signal, wherein the 5th pad is different from the first pad and third pad；5th protection part passes through third fuse electricity It is connected to the 5th pad；6th protection part, is connected to the 5th pad；6th pad is electrically connected to the 5th protection part,

5th pad is electrically connected to second i/o pads different from the first i/o pads, and the 6th pad is connected to Pad is detected,

When fusion current is entered between the second i/o pads and detection pad, third fuse is electrically insulated.

13. semiconductor package part as claimed in claim 10, wherein the second pad is electrically connected to first by the first connecting line Part is protected,

The width of first connecting line is greater than the width of first fuse.

14. semiconductor package part as claimed in claim 10, in which:

First protection portion point includes: multiple first diodes and multiple second diodes, wherein each first diode has electricity It is connected to the anode of first node and is electrically connected to the cathode for being applied the first voltage line of first voltage, each second diode The second voltage of the second voltage different from first voltage is applied with the cathode for being electrically connected to first node and being electrically connected to The anode of line,

Second protection portion point includes: one or more third diodes and one or more 4th diodes, wherein Mei Ge Three diodes, which have, to be electrically connected to the anode of third node and is electrically connected to the cathode of first voltage line, and each 4th diode has There is the cathode for being electrically connected to third node and be electrically connected to the anode of second voltage line,

The multiple first diode and the quantity of the multiple second diode are greater than third diode and the 4th diode Quantity.

15. semiconductor package part as claimed in claim 14, in which:

Second pad is electrically connected to the first protection part by the first connecting line,

First protection part further include: fusing diode has the anode for being electrically connected to first node,

First connecting line is electrically connected to the cathode of the second pad and the diode that fuses.

16. a kind of semiconductor device, comprising:

First fuse is connected to first node and second node；

First pad is electrically connected to second node and third node, and the first signal is from external input to the first pad；

First diode has the anode for being electrically connected to first node and is electrically connected to the first voltage line for being applied first voltage Cathode；

There is second diode the cathode for being electrically connected to first node and electrical connection to be applied second electricity different from first voltage The anode of the second voltage line of pressure；

Third diode has and is electrically connected to the anode of third node and is electrically connected to the cathode of first voltage line；

4th diode has and is electrically connected to the cathode of third node and is electrically connected to the anode of second voltage line；

Fuse diode, has the anode for being electrically connected to first node；

Second pad is electrically connected to the cathode of fusing diode by the first connecting line,

Wherein, the width of the first connecting line is greater than the width of first fuse.

17. semiconductor device as claimed in claim 16, wherein when the first surge for being equal to or higher than predetermined positive voltage level When voltage is applied to the first pad, the first current path is formed and the second current path is formed,

Wherein, electric current is supplied to first voltage line from the first pad via first diode by the first current path,

Wherein, electric current is supplied to first voltage line from the first pad via third diode by the second current path.

18. semiconductor device as claimed in claim 17, wherein generated in first diode by the first current path First heat is greater than the second heat generated in third diode by the second current path.

19. semiconductor device as claimed in claim 16, wherein when the second surge voltage quilt for being less than predetermined negative voltage level When being applied to the first pad, the first current path is formed and the second current path is formed,

Wherein, electric current is supplied to second voltage line from the first pad via the second diode by the first current path,

Wherein, electric current is supplied to second voltage line from the first pad via the 4th diode by the second current path.

20. semiconductor device as claimed in claim 19, wherein generated in the second diode by the first current path First heat is greater than the second heat generated in the 4th diode by the second current path.

Technical field

Background technique

Voltage with very high instantaneous voltage (instantaneous voltage) can pass through electrostatic (static Electricity) it is applied to semiconductor device.In this case, when the MOS in semiconductor device occurs, (metal is aoxidized Object semiconductor) transistor unit gate insulating layer destruction, knot spike (junction spiking) etc. whens, semiconductor device Minutely it may be damaged or be totally disrupted, this has serious influence to the reliability of semiconductor device.Therefore, it has caused Power prevents such damage in the development phase in semiconductor device.

Summary of the invention

Detailed description of the invention

Exemplary embodiment is described in detail by referring to accompanying drawing, feature will be apparent those skilled in the art:

Fig. 1 shows the diagram of static discharge in accordance with some embodiments (ESD) protection circuit.

Fig. 2 shows substrate in accordance with some embodiments and the semiconductor pattern including ESD protection circuit it is exemplary Diagram.

Fig. 3 shows in accordance with some embodiments when positive surge voltage (positive surge voltage) is applied to base By the first current path and second of each formation in the first protection part and the second protection part when bottom and semiconductor pattern The exemplary diagram of current path.

Fig. 4 show it is in accordance with some embodiments when negative surge voltage is applied to substrate and semiconductor pattern by first protect The exemplary diagram of the first current path and the second current path of shield part and each formation in the second protection part.

Fig. 5 shows the exemplary diagram of semiconductor device in accordance with some embodiments.

Fig. 6 shows the exemplary diagram that the inside for explaining semiconductor device in accordance with some embodiments configures.

Fig. 7 shows the exemplary diagram for showing semiconductor package part in accordance with some embodiments.

Fig. 8 shows the exemplary diagram for explaining the configuration of semiconductor package part in accordance with some embodiments.

Fig. 9 shows the exemplary diagram in the stage of the processing of cutting fuse (fuse) in accordance with some embodiments.

Figure 10 shows the exemplary diagram of semiconductor package part in accordance with some embodiments.

Figure 11 is shown for explaining the electricity when surge voltage is applied to semiconductor package part in accordance with some embodiments The exemplary diagram of flow path.

Figure 12 shows the exemplary process diagram for explaining the method for manufacture semiconductor package part in accordance with some embodiments.

Figure 13 shows the exemplary diagram for explaining the process of the cutting fuse according to some other embodiments.

Embodiment is related to a kind of semiconductor device and the semiconductor package part including semiconductor device.