阅读说明：本技术 芯片老化的检测方法、系统、设备及计算机存储介质 (Chip aging detection method, system, equipment and computer storage medium ) 是由 周进群 李新强 苏鹏 曾泉 刘建辉 于 2020-05-06 设计创作，主要内容包括：本申请公开了一种芯片老化的检测方法、系统、设备计算机存储介质。所述方法包括：在老化测试环境下对放置于夹具中的多个待检测芯片进行巡检,获取每一待检测芯片是否异常信息；在显示界面显示每一待检测芯片的图标,待检测芯片的图标在显示界面的位置对应待检测芯片在夹具中的位置,图标中包括是否异常信息。本申请的芯片老化的检测方法提高了芯片的老化检测效率。(The application discloses a method, a system and a computer storage medium for detecting chip aging. The method comprises the following steps: the method comprises the steps that a plurality of chips to be detected placed in a clamp are inspected in an aging test environment, and whether each chip to be detected is abnormal or not is obtained; and displaying an icon of each chip to be detected on the display interface, wherein the position of the icon of the chip to be detected on the display interface corresponds to the position of the chip to be detected in the clamp, and the icon comprises information about whether the chip is abnormal or not. The chip aging detection method improves the aging detection efficiency of the chip.)

1. A method for detecting chip aging, comprising:

the method comprises the steps that a plurality of chips to be detected placed in a clamp are inspected in an aging test environment, and whether each chip to be detected is abnormal or not is obtained;

and displaying an icon of each chip to be detected on a display interface, wherein the position of the icon of the chip to be detected on the display interface corresponds to the position of the chip to be detected in the clamp, and the icon comprises the information whether the chip is abnormal or not.

2. The method according to claim 1, wherein before the step of inspecting the plurality of chips to be detected placed in the jig in the burn-in test environment and acquiring the information on whether each chip to be detected is abnormal, the method comprises:

performing initial inspection on a plurality of chips to be detected placed in a fixture, and acquiring position information and abnormal information of each chip to be detected;

a plurality of chips to be detected that place in anchor clamps are patrolled and examined under aging testing environment, include: in an aging test environment, polling the chip to be detected which is detected normally in the initial inspection;

the displaying of the icon of each chip to be detected on the display interface includes: and displaying the icon of each chip to be detected on a display interface according to the position information.

3. The method of claim 2, wherein the initial inspection of the plurality of chips to be inspected placed in the jig comprises:

and receiving a test instruction for the contact which is clamped with a plurality of chips to be detected in the clamp, and performing initial inspection on each chip to be detected according to the test instruction.

4. The method according to claim 1, wherein the inspecting the plurality of chips to be tested placed in the jig in the burn-in test environment comprises:

and if the chip to be detected is abnormal in the inspection process, the abnormal chip to be detected is not detected any more.

5. The method of claim 1, further comprising:

and displaying the aging starting time, the aging ending time, the polling times, the number of polling normal chips, the number of polling abnormal chips and the position of polling abnormal chips on the display interface.

6. The method according to claim 5, wherein an aging report of the chip to be detected is generated based on the aging start time, the aging end time, the number of polling times, the number of polling normal chips, the number of polling abnormal chips, and the position of polling abnormal chips.

7. The method according to claim 1, wherein the icon comprises a red mark if the chip to be detected is abnormal, and comprises a green mark if the chip to be detected is normal.

8. A system for detecting chip aging is characterized by comprising a detection module and a display module,

the detection module is used for polling a plurality of chips to be detected placed in the fixture in an aging test environment to acquire abnormal information of each chip to be detected;

the display module is used for displaying an icon of each chip to be detected on a display interface, the position of the icon of the chip to be detected on the display interface corresponds to the position of the chip to be detected in the clamp, and the icon includes information about whether the chip to be detected is abnormal or not.

9. An apparatus for detecting chip aging, the apparatus comprising a memory and a processor coupled to the memory;

the memory is used for storing program data, and the processor is used for executing the program data to realize the chip aging detection method according to any one of claims 1-7.

10. A computer storage medium for storing program data which, when executed by a processor, is used to implement a method of detecting chip burn-in as claimed in any one of claims 1 to 7.

Technical Field

The present application relates to the field of chip detection technologies, and in particular, to a method, a system, a device, and a computer storage medium for detecting chip aging.

Background

Because the IC chip is small in size, the process for integrating a plurality of functional bare chips in the IC chip is complex, and enterprises pay more attention to the reliability problem of the IC chip. In the prior art, the reliability of an IC chip is judged by performing an aging test on the IC chip. Specifically, an LED display lamp is connected to the IC chip, and during production, an operator judges the aging state of the IC chip through the change of the LED display lamp so as to record the position and time of the abnormal chip in real time. However, in the aging test environment, the operator needs to concentrate on the operation and record data information continuously, which results in low operation efficiency and easy recording error.

Disclosure of Invention

The application provides a chip aging detection method, a system, equipment and a computer storage medium, and mainly solves the technical problem of how to improve the aging detection efficiency of a chip to be detected.

In order to solve the technical problem, the application adopts a technical scheme that: the chip aging detection method comprises the following steps:

the method comprises the steps that a plurality of chips to be detected placed in a clamp are inspected in an aging test environment, and whether each chip to be detected is abnormal or not is obtained;

and displaying an icon of each chip to be detected on a display interface, wherein the position of the icon of the chip to be detected on the display interface corresponds to the position of the chip to be detected in the clamp, and the icon comprises the information whether the chip is abnormal or not.

According to an embodiment provided by the application, the method for inspecting a plurality of chips to be detected placed in a fixture in an aging test environment and before the step of acquiring whether each chip to be detected is abnormal includes:

performing initial inspection on a plurality of chips to be detected placed in a fixture, and acquiring position information and abnormal information of each chip to be detected;

a plurality of chips to be detected that place in anchor clamps are patrolled and examined under aging testing environment, include: in an aging test environment, polling the chip to be detected which is detected normally in the initial inspection;

the displaying of the icon of each chip to be detected on the display interface includes: and displaying the icon of each chip to be detected on a display interface according to the position information.

According to an embodiment provided by the present application, the initial inspection of the plurality of chips to be detected placed in the fixture includes:

and receiving a test instruction for the contact which is clamped with a plurality of chips to be detected in the clamp, and performing initial inspection on each chip to be detected according to the test instruction.

According to an embodiment that this application provided, to a plurality of chips of waiting to detect of placing in anchor clamps under aging testing environment patrol and examine, include:

and if the chip to be detected is abnormal in the inspection process, the abnormal chip to be detected is not detected any more.

According to an embodiment provided by the present application, the method further includes: and displaying the aging starting time, the aging ending time, the polling times, the number of polling normal chips, the number of polling abnormal chips and the position of polling abnormal chips on the display interface.

According to an embodiment that this application provided, based on ageing initial time, end time, patrol and examine the number of times, patrol and examine normal chip quantity, patrol and examine unusual chip quantity and patrol and examine unusual chip position, generate wait to detect the ageing report of chip.

According to an embodiment provided by the application, if the chip to be detected is abnormal, the icon includes a red mark, and if the chip to be detected is normal, the icon includes a green mark.

In order to solve the above technical problem, the present application further provides a system for detecting chip aging, the system includes a detection module and a display module,

the detection module is used for polling a plurality of chips to be detected placed in the fixture in an aging test environment to acquire abnormal information of each chip to be detected;

the display module is used for displaying an icon of each chip to be detected on a display interface, the position of the icon of the chip to be detected on the display interface corresponds to the position of the chip to be detected in the clamp, and the icon includes information about whether the chip to be detected is abnormal or not.

In order to solve the above technical problem, the present application further provides a device for detecting chip aging, where the device includes a memory and a processor coupled to the memory;

wherein the memory is used for storing program data, and the processor is used for executing the program data to realize the chip aging detection method according to any one of the above items.

In order to solve the above technical problem, the present application further provides a computer storage medium for storing program data, wherein the program data is used to implement the chip aging detection method according to any one of the above aspects when executed by a processor.

The method includes the steps that a plurality of chips to be detected placed in a fixture are patrolled in an aging test environment, and whether each chip to be detected is abnormal or not is obtained; and displaying an icon of each chip to be detected on the display interface, wherein the position of the icon of the chip to be detected on the display interface corresponds to the position of the chip to be detected in the clamp, and the icon comprises information about whether the chip is abnormal or not. According to the chip aging detection method, whether the chip to be detected is abnormal or not is obtained through inspection, and low efficiency of manual recording operation is avoided; whether the icon of whether the chip to be detected in the clamp is abnormal or not is displayed at the corresponding position of the display interface, so that the information of the chip to be detected in the clamp is visual, an operator can rapidly position the position of the abnormal chip in the clamp according to the display interface, and the aging detection efficiency of the chip is improved.

Drawings

FIG. 1 is a schematic diagram of an embodiment of a method for detecting chip aging according to the present application;

FIG. 2 is a schematic diagram of a display interface of the chip aging detection method of the present application

FIG. 3 is a schematic flow chart diagram illustrating another embodiment of a method for detecting chip aging according to the present application;

FIG. 4 is a schematic structural diagram of an embodiment of a system for detecting chip aging according to the present application;

FIG. 5 is a schematic structural diagram of an embodiment of the chip aging detection apparatus of the present application;

FIG. 6 is a schematic structural diagram of an embodiment of a computer-readable storage medium of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

The present application provides a method for detecting chip aging, and specifically please refer to fig. 1, where fig. 1 is a schematic flow chart of an embodiment of the method for detecting chip aging provided by the present application. The method for detecting chip aging of the embodiment can be applied to a chip aging inspection device and also can be applied to a server with data processing capability. The method for detecting the chip aging of the embodiment specifically comprises the following steps:

s101: and polling a plurality of chips to be detected placed in the clamp in an aging test environment to acquire the abnormal information of each chip to be detected.

In order to improve the aging detection efficiency of the chips to be detected, the chip aging detection device and the chip aging detection method are used for polling a plurality of chips to be detected placed in a fixture in an aging test environment so as to acquire the abnormal information of each chip to be detected. The aging test environment is an environment in which the chip to be detected is subjected to aging detection within a preset aging time or a preset temperature of an aging box, for example, the aging time is 24 hours, and then the chip to be detected in the fixture is subjected to inspection for 24 hours to obtain information about whether each chip to be detected is abnormal in the aging detection.

S102: and displaying an icon of each chip to be detected on the display interface, wherein the position of the icon of the chip to be detected on the display interface corresponds to the position of the chip to be detected in the clamp, and the icon comprises information about whether the chip is abnormal or not.

In order to visualize the information on whether the chip to be detected in the obtained fixture is abnormal or not, in this embodiment, the icon of each chip to be detected is displayed on the display interface, because the icon includes the information on whether the chip to be detected in the fixture is abnormal or not, the information on whether the chip to be detected in the fixture is abnormal or not is correspondingly displayed on the icon of the display interface in a visual manner, so that an operator can know the position information of the chip to be detected in the fixture corresponding to the display interface and the information on whether the chip is abnormal or not through the icon of the display interface, that is, the operator can quickly position the position information of the abnormal chip in the fixture according to the icon of the display interface, so that the information on whether the chip to be detected in the fixture is abnormal or not is visualized, thereby improving the aging detection efficiency of the chip.

In practical applications, referring to fig. 2 in particular, fig. 2 is a schematic diagram of a display interface in the chip aging inspection method of the present application. The accessible is gone up the position and is imitated the chip that waits to detect in the anchor clamps, makes the row and column arrangement that waits to detect the chip in the display interface correspond the anchor clamps and wait to detect the row and column arrangement of chip, and the operator of being convenient for acquires the row and column arrangement condition that waits to detect the chip in corresponding anchor clamps from the display interface to the position of unusual chip in the anchor clamps is fixed a position according to the icon of display interface fast. The machine-up position can be an app in the display interface.

In the embodiment, a plurality of chips to be detected placed in a fixture are inspected in an aging test environment to obtain information about whether each chip to be detected is abnormal; and displaying an icon of each chip to be detected on the display interface, wherein the position of the icon of the chip to be detected on the display interface corresponds to the position of the chip to be detected in the clamp, and the icon comprises information about whether the chip is abnormal or not. According to the chip aging detection method, whether the chip to be detected is abnormal or not is obtained through inspection, and low efficiency of manual recording operation is avoided; whether the icon of whether the chip to be detected in the clamp is abnormal or not is displayed at the corresponding position of the display interface, so that the information of the chip to be detected in the clamp is visual, an operator can rapidly position the position of the abnormal chip in the clamp according to the display interface, and the chip inspection efficiency is improved.

In order to solve the problem of low chip aging detection efficiency in the prior art, based on the foregoing embodiments, the present application further provides a method for detecting chip aging, specifically please refer to fig. 3, where fig. 3 is a schematic flow diagram of another embodiment of the method for detecting chip aging provided by the present application.

As shown in fig. 3, the method for detecting chip aging of the present embodiment specifically includes the following steps:

s201: and carrying out initial inspection on a plurality of chips to be detected placed in the clamp, and acquiring the position information and the abnormal information of each chip to be detected.

To avoid waiting to detect the chip to unusual and detect and reduce detection efficiency when patrolling and examining, this embodiment need wait to detect the chip to a plurality of placing in anchor clamps before patrolling and examining and carry out the primary inspection, acquire each and wait to detect the positional information of chip and whether abnormal information, wait to detect the positional information of chip and whether abnormal information according to each that acquire, adjust the anchor clamps that the unusual chip corresponds, avoid leading to the chip unusual because of physical factors such as anchor clamps contact failure, or change the unusual chip and be normal chip, guarantee to wait to detect in the anchor clamps after the primary inspection and detect the chip and be normal chip, in order to improve the detection efficiency of chip.

In practical application, in order to avoid invalid detection when no chip is placed in the clamp or an atrophied tray exists, before carrying out initial detection on a plurality of chips to be detected placed in the clamp, the chips to be detected which are actually placed in the clamp need to be selected and set. For example, the positions where the chips are not placed are screened out, and the positions where the chips are not placed are not subjected to initial detection, so that the detection efficiency is prevented from being reduced due to the detection of the positions where the chips are not placed; or when an atrophied tray exists, the position of the chip to be detected placed in the atrophied tray is detected, so that the aging detection efficiency of the chip to be detected is improved. The atrophic tray is an unconventional tray, for example, 100 bits for atrophic tray and 189 bits for conventional tray.

In a specific embodiment, the mode of selecting and setting the chip to be detected actually placed in the fixture may be to receive a test instruction for a contact holding a plurality of chips to be detected in the fixture, and perform initial inspection on each chip to be detected according to the test instruction. That is to say, learn through test instruction and wait to detect the chip of placing in the anchor clamps, place to detect the chip department and carry out the preliminary examination in the anchor clamps.

S202: and under the aging test environment, inspecting the chip to be detected which is normally inspected initially.

Based on the fact that the plurality of to-be-detected chips placed in the clamp are subjected to initial detection in S201, after the influence of physical factors on abnormal chips in the to-be-detected chips is eliminated, the chips to be detected which are subjected to the initial detection normally need to be inspected in an aging test environment.

In a specific embodiment, in order to avoid data confusion caused by the fact that the same abnormal chip data is stored in the repeated detection records during polling, the abnormal chip is not detected any more in the polling process.

For the inspection mode, for example, the preset time in the aging test environment is 12 hours, the preset temperature of the aging box is 30 degrees, 40 tray disks are performed at a time, after the chips to be detected in the 40 tray disks are detected for the first time, normal chips in the chips to be detected are detected again for the second time, and the detection is sequentially performed in a circulating manner until the inspection is performed for 12 hours.

S203: and displaying the icon of each chip to be detected on a display interface according to the position information.

In order to visualize the information of the chip to be detected in the fixture, the embodiment displays the icon of each chip to be detected on the display interface according to the position information, so that the icon in the display interface corresponds to the chip to be detected in the fixture. Whether the abnormal information of the chip to be detected corresponds to the icon of the display interface in a visual mode or not is detected, so that the chip to be detected in the clamp and the icon in the display interface form a one-to-one correspondence relationship, an operator can conveniently and quickly find the abnormal chip in the clamp according to the icon of the display interface, and the aging detection efficiency of the chip is improved.

In a specific embodiment, in order to enable an operator to directly distinguish whether a detected chip is a normal chip or an abnormal chip on an icon of a display interface, the embodiment may set an icon of the detected abnormal chip to be a red mark, and set a normal icon of the detected chip to be a green mark. Namely, the color of the display interface icon corresponding to the chip to be detected in the clamp is distinguished, so that an operator can quickly locate and know the abnormal chip in the clamp through the display interface icon. The embodiment does not limit the icon color of the abnormal or normal chip. For the chip to be detected after the initial detection, the position of the abnormal chip in the display interface can be quickly searched through the icon color on the display interface, the clamp state of the chip to be detected corresponding to the abnormal chip is adjusted, and the influence of physical factors on the chip to be detected is avoided.

In order to facilitate the operator to know various information of the chip in the whole routing inspection process on the display interface, the aging start time, the end time, the routing inspection times and the routing inspection normal chip quantity of the chip can be displayed on the display interface, and the routing inspection abnormal chip quantity and the routing inspection abnormal chip position can be displayed.

Further, based on the aging starting time, the aging ending time, the polling times, the polling normal chip number, the polling abnormal chip number and the polling abnormal chip position, an aging report of the chip to be detected is generated, so that an operator can analyze the aging parameter information of the chip to be detected according to the aging report and adjust the aging parameter information to improve the chip aging detection production process, the aging detection efficiency of the chip is improved, and the aging detection of the chip is more humanized.

In practical application, in order to avoid the low efficiency of the operator, the embodiment can automatically record and store the position information of the chip to be detected and the abnormal information in the obtained clamp, thereby reducing the workload of the operator and improving the detection efficiency.

In the embodiment, the position information and the abnormal information of each chip to be detected are obtained by performing the initial detection on the plurality of chips to be detected placed in the fixture, so that the detection efficiency is prevented from being reduced by detecting the abnormal chips to be detected during the inspection; the clamp corresponding to the abnormal chip is adjusted according to the initial detection result of the chip to be detected, so that the chip abnormality caused by physical factors such as poor contact of the clamp is avoided, and the detection efficiency of the chip is improved; the chips with abnormal detection are not detected any more, so that the problem that the same abnormal chip is detected and recorded repeatedly during inspection, and data confusion is caused is avoided; displaying an icon of each chip to be detected on a display interface according to the position information, so that an operator can conveniently learn the position of each chip to be detected in the clamp and whether the chip to be detected is abnormal or not according to the icon of each chip to be detected displayed on the display interface, and quickly positioning the abnormal chip in the clamp according to the icon of the display interface, so that the information of the chip to be detected in the clamp is visualized; setting the detected abnormal chip icon to be detected as a red mark, and setting the detected normal chip icon to be detected as a green mark, so that an operator can correspondingly know whether the chip to be detected in the clamp is abnormal or not through the icon color of the display interface, thereby quickly positioning the abnormal chip, adjusting the state of the clamp corresponding to the abnormal chip and avoiding the influence of physical factors on the chip to be detected; the aging starting time, the aging ending time, the polling times, the polling normal chip number, the polling abnormal chip number and the polling abnormal chip position of the chip are displayed on a display interface, so that an operator can conveniently know various information of the chip in the whole polling process on the display interface; an aging report is generated based on the aging starting time, the aging ending time, the polling times, the polling normal chip number, the polling abnormal chip number and the polling abnormal chip position, so that an operator can analyze the aging parameter information of the chip to be detected based on the aging report conveniently, and adjust the aging parameter information to improve the chip aging detection production process, improve the aging detection efficiency of the chip and enable the aging detection of the chip to be more humanized; the acquired position information and the abnormal information of the chip to be detected are recorded and stored in time, so that the workload of operators is reduced.

To implement the chip aging detection method of the above embodiment, the present application provides a chip aging detection system, and specifically refer to fig. 4, where fig. 4 is a schematic structural diagram of the chip aging detection system provided in the present application.

The system 400 includes a detection module 41 and a display module 42, where the detection module 41 is configured to inspect a plurality of chips to be detected placed in a fixture in an aging test environment, and obtain information about whether each chip to be detected is abnormal; the display module 42 is configured to display an icon of each chip to be detected on the display interface, where the position of the icon of the chip to be detected on the display interface corresponds to the position of the chip to be detected in the fixture, and the icon includes information about whether the chip is abnormal or not.

The detection module 41 includes a plurality of detection units, which may be embedded MCU, corresponding to the chips to be detected, so as to obtain tag data and self-check code data of each chip to be detected. The plate label data comprises the position information of the chip to be detected, and the self-check code data comprises whether the chip to be detected is abnormal or not.

In a specific embodiment, the detection module 41 and the display module 42 are connected through a switch, the detection module 41 transmits the acquired board tag data and self-check code data of the chip to be detected to the switch through a TCP/CP protocol, the switch summarizes the acquired board tag data and self-check code data of the chip to be detected, and transmits the summarized board tag data and self-check code data of the chip to be detected to the display module 42 through the TCP/CP protocol, so as to implement communication between the detection module 41 and the display module 42.

In an embodiment, the display module 42 may select a Tkiner module, the system 400 may adopt a multi-thread concurrent mode, and a threading module may be selected.

To implement the chip aging detection method of the above embodiment, the present application provides another chip aging detection device, and specifically refer to fig. 5, where fig. 5 is a schematic structural diagram of an embodiment of the chip aging detection device provided in the present application.

The device 500 comprises a memory 51 and a processor 52, wherein the memory 51 and the processor 52 are coupled.

The memory 51 is used for storing program data, and the processor 52 is used for executing the program data to implement the chip aging detection method of the above-described embodiment.

In the present embodiment, the processor 52 may also be referred to as a CPU (Central Processing Unit). Processor 52 may be an integrated circuit chip having signal processing capabilities. The processor 52 may also be a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components. A general purpose processor may be a microprocessor or the processor 52 may be any conventional processor or the like.

The present application further provides a computer storage medium 600, as shown in fig. 6, the computer storage medium 600 is used for storing program data 61, and when the program data 61 is executed by a processor, the method for detecting chip aging according to the embodiment of the present application is implemented.

The method involved in the embodiment of the chip aging detection method of the present application, when implemented in the form of a software functional unit and sold or used as a standalone product, may be stored in a device, for example, a computer readable storage medium. Based on such understanding, the technical solution of the present application may be substantially implemented or contributed by the prior art, or all or part of the technical solution may be embodied in a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) or a processor (processor) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.

The above embodiments are merely examples, and not intended to limit the scope of the present application, and all modifications, equivalents, and flow charts using the contents of the specification and drawings of the present application, or those directly or indirectly applied to other related arts, are included in the scope of the present application.