阅读说明：本技术 一种适用于异步电路的轮询仲裁器及其方法 (Polling arbiter suitable for asynchronous circuit and method thereof ) 是由 王宇宣 朱博宇 傅高鸣 潘红兵 朱德政 于 2021-07-16 设计创作，主要内容包括：本发明公开了一种适用于异步电路的轮询仲裁器及其方法。该轮询仲裁器包括仲裁部分、互斥锁部分和多路选择部分；其中,仲裁部分由多级仲裁单元级联而成,仲裁部分的输入为请求信号以及各请求的权值信息,仲裁部分的输出为反应仲裁结果的响应信号；互斥锁部分由多级互斥单元级联而成,互斥锁部分的输入为从仲裁部分输出的响应信号以及从后级流水线结构输出的握手信号,互斥锁部分的输出为选通信号以及向前级流水线结构传递的握手信号；多路选择部分的输入为互斥锁部分输出的选通信号以及输入数据,多路选择部分的输出为仲裁优先级最高的有效数据。本发明的轮询仲裁器适用于异步电路,取消对于全局时钟的依赖。(The invention discloses a polling arbiter suitable for an asynchronous circuit and a method thereof. The polling arbiter comprises an arbitration part, a mutual exclusion lock part and a multi-path selection part; the arbitration part is formed by cascading a plurality of levels of arbitration units, the input of the arbitration part is a request signal and weight information of each request, and the output of the arbitration part is a response signal reflecting an arbitration result; the mutual exclusion locking part is formed by cascading a plurality of stages of mutual exclusion units, the input of the mutual exclusion locking part is a response signal output from the arbitration part and a handshake signal output from the later stage pipeline structure, and the output of the mutual exclusion locking part is a gating signal and a handshake signal transmitted to the former stage pipeline structure; the input of the multi-path selection part is the gating signal and the input data output by the mutual exclusion lock part, and the output of the multi-path selection part is the valid data with the highest arbitration priority. The polling arbiter of the present invention is suitable for asynchronous circuits, and eliminates the dependence on the global clock.)

1. A polling arbitrator suitable for asynchronous circuit, wherein the polling arbitrator includes arbitrating part, exclusive lock part and multipath selection part; the arbitration part is formed by cascading a plurality of levels of arbitration units, the input of the arbitration part is a request signal and weight information of each request, and the output of the arbitration part is a response signal reflecting an arbitration result; the mutual exclusion locking part is formed by cascading a plurality of stages of mutual exclusion units, the input of the mutual exclusion locking part is a response signal output from the arbitration part and a handshake signal output from the later stage pipeline structure, and the output of the mutual exclusion locking part is a gating signal and a handshake signal transmitted to the former stage pipeline structure; the input of the multi-path selection part is the gating signal and the input data output by the mutual exclusion lock part, and the output of the multi-path selection part is the valid data with the highest arbitration priority.

2. The polling arbiter of claim 1 wherein the mutex unit comprises a multi-stage C unit and a multi-input nand gate cascade.

3. The arbitration method using the polling arbiter adapted for asynchronous circuit as claimed in claim 1, wherein the method comprises the following steps:

assume that the polling arbiter with n inputs receives multiple valid request signals at the same time, i.e. r_i，r_i+m0，r_i+m1,，……,r_i+mnPull high, data _ in_i，data_in_i+m0，data_in_i+m1,，……,data_in_i+mnIs a non-empty effective input, wherein m0 is more than m1 is more than … … is more than mn, the integers are positive integers, i is more than or equal to 0 and more than i + mn is more than or equal to n; suppose that weight information p requested at this time_q1, i.e. the q-th arbitration unit has the highest priority; at this time, the priority is calculated in descending order from the q-level by the request signal r_sObtaining the response signal g with the highest priority and output by the corresponding exclusive lock part_sIs pulled up when q is present<When s is less than or equal to n, the value of s satisfies (s-q) minimum, otherwise, the value of s satisfies (q-s) maximum; the exclusive lock part being responsive to the signal g_sAfter being pulled high, the corresponding strobe signal sel_sPull high, multiplex part will data _ in_sOutput as valid data; after the multi-path selection part finishes the output of the data _ out, the handshake signal ack _ in transmitted by the later stage pipeline structure is pulled high, so that the C unit of the s-th stage mutex unit outputs the handshake signal ack _ out_sThen pulling up to inform the former-stage unit that the data transmission is completed; the rest handshake signals transmitted to the preceding stage are still kept low, and the weight information p_s+1The weight signals are pulled high, and the rest weight signals are set low, so that the updating of the weight information is completed; in this case, the priorities are calculated in descending order starting from the s +1 level, based on the request signal r_jObtaining the response signal g with the highest priority and output by the corresponding exclusive lock part_jIs pulled up when s is present<When j is less than or equal to n, the value of j satisfies (j-s) minimum, otherwise, the value of j satisfies (s-j) maximum; but the handshake signal ack _ out is due to the characteristics of the C-cell_sStill remains 1, all other strobe signals are 0, so the j-th stage strobe signal is actually latched in the mutex; until the data _ in_sAfter the transmission is finished and the next stage pipeline confirms the reception, the global pipeline carries out reset action, the handshake signal ack _ in is pulled down, the jth stage strobe signal is unlocked, and the corresponding strobe signal sel_jPull-up, output handshake signal ack _ out_jPull high, multiplex part will data _ in_jOutput as valid data; after the multi-path selection part finishes the output of the data _ out, the handshake signal ack _ in transmitted by the post-stage pipeline structure is pulled high, so that the C unit of the j-th stage exclusive unit outputs the handshake signal ack _ out_jThen pulling up to inform the former-stage unit that the data transmission is completed; the rest handshake signals transmitted to the preceding stage are still kept low, and the weight information p_j+1The weight signals are pulled high, and the rest weight signals are set lowAnd finishing the updating of the weight information again, and continuously repeating the process.

Technical Field

The invention relates to the field of integrated circuits, in particular to a polling priority arbiter for routing scheduling of asynchronous circuits.

Background

An arbiter is a common structure for scheduling and allocating shared resources in a digital integrated system, and mainly functions to respond according to a certain rule according to a request for the shared resources. One common arbiter usage scenario is: in the bus system, a plurality of main modules share the same bus, each main module firstly sends a request to the arbiter before occupying the bus to transmit data, if the requests of a plurality of modules arrive at the same time, the arbiter determines the sequence of using the bus by each module according to the designed priority rule, so that the data transmission of each module can be executed in order, and the data loss or error caused by conflict is avoided.

One important characteristic of an arbiter is fairness. If the arbiter gives a fixed priority to requests from different modules, although the high priority module can transmit data without blocking, the request of the low priority module may not be responded to, and the bus is always occupied by the high priority module and the data of the low priority module is blocked. In view of the above problems, structures such as a variable priority arbiter, a round robin arbiter, etc. have appeared. A basic n-input polling arbitrator structure is shown in FIG. 1, and is composed of multiple stages of arbitrator units with weight input, D flip-flops, etc., wherein the output end Q of the D flip-flop is connected with the weight input port of the next stage of arbitrator unit, and there is only one weight signal p in the same clock cycle_iAnd the priority level is set to be high, the priority level of the arbitration unit at the level is the highest, and the priority levels of the rest units are sequentially arranged in a descending order. For the sake of illustration, assuming that all data transmission processes can be completed in one clock cycle, in a certain clock cycle, if the i-th arbitration unit receives the request signal and has the highest priority in all arbitration units receiving valid requests, the response signal g of the arbitration unit_iWith request signal r_iPulling high, the high level signal passes through the D flip-flop, and is transmitted to the weight input port of the i +1 th level arbitration unit when the next clock cycle arrives, namely p_i+1Will be set to high level, in which clock cycle the i +1 th level arbitration unit has the highest priority, and the above circuit action completes the update of the whole arbiter weight. When there is no clock cycleAny valid request signal, i.e. r_iWhen all are 0, g_iAll 0, if updated to p_iAll 0 s will cause arbitration failure, so a logic gate structure composed of a multi-input NOR gate and a multi-stage NAND gate is added between the arbitration unit and the D flip-flop, which has the function when g is_iAll 0 s, the D flip-flop passes the original p in the next clock cycle_iSignals, i.e. all p_iThe signals remain unchanged, with the priority unchanged, until one or more request signals are pulled high and updated.

The arbitration unit in the polling arbiter is essentially an arbitration unit structure with variable weights, and is composed of a plurality of logic gates, as shown in fig. 2. For an n-level cascade arbitration structure, the response signal g output by the i-th level arbitration unit_iThe essential conditions for the drawing-up are as follows: 1. request signal r_iActive, put at high level; 2. carry input signal c from stage i-1_iPull-up, or weight, signal p_iIs placed at a high level. Carry signal c for outputting the ith stage arbitration unit to the (i + 1) th stage_i+1The essential conditions for the drawing-up are as follows: 1. request signal r_iInvalid, put low level; 2. carry input signal c from stage i-1_iPull-up, or weight, signal p_iIs placed at a high level. Therefore, the structure ensures that at most one response signal g exists in the same clock cycle_iAt high level, the carry signal ensures the priority of each stage of arbitration unit to be weighted by the weight signal p_iThe ith-stage units which are put at high level start to be sequentially arranged in descending order.

Under the circumstances that the requirements for the speed and the power consumption of an integrated circuit are more and more strict, particularly along with the rise and the wide application of a system on a chip and a network on a chip, the realization of a global synchronous clock is more and more difficult, and the problem of the power consumption generated by the clock can not be well solved; asynchronous circuits that do not rely on a global clock are therefore gaining increasing attention as a promising solution. However, the polling arbiter is only applicable to synchronous circuits, needs to update the weights by using a D flip-flop and a synchronous clock signal, and is not applicable to asynchronous circuits.

Disclosure of Invention

In order to overcome the defects of the prior art and solve the problem that the conventional polling arbitration structure is not suitable for an asynchronous circuit, the invention aims to design a polling arbiter suitable for the asynchronous circuit and a method thereof, and the dependence on a global clock is eliminated.

The technical scheme adopted by the invention is as follows:

a polling arbiter adapted for an asynchronous circuit, the polling arbiter comprising an arbitration section, a mutual exclusion lock section, and a multiplexing section; the arbitration part is formed by cascading a plurality of levels of arbitration units, the input of the arbitration part is a request signal and weight information of each request, and the output of the arbitration part is a response signal reflecting an arbitration result; the mutual exclusion locking part is formed by cascading a plurality of stages of mutual exclusion units, the input of the mutual exclusion locking part is a response signal output from the arbitration part and a handshake signal output from the later stage pipeline structure, and the output of the mutual exclusion locking part is a gating signal and a handshake signal transmitted to the former stage pipeline structure; the input of the multi-path selection part is the gating signal and the input data output by the mutual exclusion lock part, and the output of the multi-path selection part is the valid data with the highest arbitration priority.

Further, the mutual exclusion unit is formed by cascading a plurality of stages of C units and a multi-input NOT gate.

The arbitration method of the polling arbiter is utilized by the invention, and the specific process is as follows: assume that the polling arbiter with n inputs receives multiple valid request signals at the same time, i.e. r_i，r_i+m0，r_i+m1,，……,r_i+mnPull high, data _ in_i，data_in_i+m0，data_in_i+m1,，……,data_in_i+mnIs a non-empty effective input, wherein m0 is more than m1 is more than … … is more than mn, the integers are positive integers, i is more than or equal to 0 and more than i + mn is more than or equal to n; suppose that weight information p requested at this time_q1, i.e. the q-th arbitration unit has the highest priority; at this time, the priority is calculated in descending order from the q-level by the request signal r_sObtaining the response signal g with the highest priority and output by the corresponding exclusive lock part_sIs pulled up when q is present<When s is less than or equal to n, the value of s satisfies (s-q) minimum, otherwise, the value of s satisfies (q-s) maximum; the exclusive lock part being responsive to the signal g_sAfter being pulled upThe corresponding strobe signal sel_sPull high, multiplex part will data _ in_sOutput as valid data; after the multi-path selection part finishes the output of the data _ out, the handshake signal ack _ in transmitted by the later stage pipeline structure is pulled high, so that the C unit of the s-th stage mutex unit outputs the handshake signal ack _ out_sThen pulling up to inform the former-stage unit that the data transmission is completed; the rest handshake signals transmitted to the preceding stage are still kept low, and the weight information p_s+1The weight signals are pulled high, and the rest weight signals are set low, so that the updating of the weight information is completed; in this case, the priorities are calculated in descending order starting from the s +1 level, based on the request signal r_jObtaining the response signal g with the highest priority and output by the corresponding exclusive lock part_jIs pulled up when s is present<When j is less than or equal to n, the value of j satisfies (j-s) minimum, otherwise, the value of j satisfies (s-j) maximum; but the handshake signal ack _ out is due to the characteristics of the C-cell_sStill remains 1, all other strobe signals are 0, so the j-th stage strobe signal is actually latched in the mutex; until the data _ in_sAfter the transmission is finished and the next stage pipeline confirms the reception, the global pipeline carries out reset action, the handshake signal ack _ in is pulled down, the jth stage strobe signal is unlocked, and the corresponding strobe signal sel_jPull-up, output handshake signal ack _ out_jPull high, multiplex part will data _ in_jOutput as valid data; after the multi-path selection part finishes the output of the data _ out, the handshake signal ack _ in transmitted by the post-stage pipeline structure is pulled high, so that the C unit of the j-th stage exclusive unit outputs the handshake signal ack _ out_jThen pulling up to inform the former-stage unit that the data transmission is completed; the rest handshake signals transmitted to the preceding stage are still kept low, and the weight information p_j+1The weight signals are pulled high, the rest weight signals are set low, the weight information is updated again, and the process is continuously repeated.

The invention is based on a basic polling arbitration structure, replaces a D trigger by a mutual exclusion lock part constructed by a multistage C unit and a multi-input non-AND gate cascade, and realizes the polling arbiter suitable for an asynchronous circuit by orderly updating weight information and orderly outputting data by means of handshake signals of a pipeline structure.

Drawings

Fig. 1 is a diagram illustrating a basic structure of an n-input polling arbiter in the prior art.

Fig. 2 is a diagram illustrating a basic arbitration unit structure in the prior art.

FIG. 3 is a schematic diagram of a polling arbiter for asynchronous circuits according to the present invention.

FIG. 4 is a diagram of a mutex unit according to an embodiment of the present invention.

Fig. 5 is a circuit diagram of a C unit according to an embodiment of the present invention.

Detailed Description

The polling arbiter structure suitable for the asynchronous circuit adopted by the invention is shown in fig. 3, and the arbiter comprises an arbitration part, a mutual exclusion lock part and a multi-path selection part by means of a pipeline structure of the asynchronous circuit. Wherein the arbitration part is formed by cascading multiple stages of arbitration units shown in FIG. 2, r₀To r_nFor request signals, p₀To p_nFor each request weight information, output g₀To g_nA response signal reflecting the arbitration result.

The mutual exclusion lock part is formed by cascading a plurality of mutually exclusive units as shown in FIG. 4, and the input is except for the response signal g obtained from the arbitration part₀To g_nAnd ack _ in handshake signals obtained from the pipeline structure of the later stage, and sel is output₀To sel_nAck _ out as a strobe signal₀To ack _ out_nA handshake signal transmitted to the front-stage pipeline structure; input of multiplex section other than sel₀To sel_nFurther includes data _ in₀To data _ in_nThe data with the highest arbitration priority is output as data _ out, and the function of the part is described as follows: when and only when the communication signal sel_iPull high while data _ in_iFor valid data input, the data _ out has valid output data _ in_i. In addition, the C unit used by the mutex lock portion is a circuit structure of a Muller C unit, and as shown in fig. 5, the function of the C unit is described as follows: when the two inputs are all 0, the output is set to 0; when the two inputs are all 1, the output is set to 1; if not, then,the output does not change.

The working principle and process of the polling arbiter of the present embodiment are described as follows:

assume that a polling arbiter having n inputs receives multiple valid request signals at the same time, i.e., r_i，r_i+m0，r_i+m1,，……,r_i+mn(m0 is more than m1 is more than m … … is more than mn and is a positive integer, i is more than or equal to 0 and is more than i + mn is more than or equal to n) pull-up height, data _ in_i，data_in_i+m0，data_in_i+m1,，……,data_in_i+mnFor non-null valid inputs, assume that p is now present_qIs 1, i.e. the q-th arbitration unit has the highest priority. At this time, the priority is calculated in descending order from the q-level, and there is a request signal r_sObtaining the response signal g with the highest priority and corresponding output_sAnd (5) drawing high. The exclusive lock part is in g_sAfter being pulled high, the corresponding strobe signal sel_sPull high, multiplex part will data _ in_sOutput as valid data; after the data _ out is output, the ack _ in signal transmitted by the pipeline structure of the later stage is pulled high, so the C unit of the s-th stage exclusive unit outputs a handshake signal ack _ out_sThen pulling up to inform the former-stage unit that the data transmission is completed; the remaining handshake signals transmitted to the preceding stage remain low, p_s+1The weight signals are pulled high, and the rest weight signals are set low, so that the update of the weight information is completed.

At this time, the priorities are calculated in descending order from the s +1 level, and there is a request signal r_jObtaining the response signal g with the highest priority and corresponding output_jAnd (5) drawing high. But ack _ out due to the characteristics of the C cell_sStill remains at 1 and all remaining strobe signals are 0, so the strobe signal of the j-th stage is effectively "latched" in the mutex. Up to data _ in_sAfter the data transmission is finished and the next stage pipeline confirms the reception, the overall pipeline carries out reset action, ack _ in is pulled low, the gating signal of the j stage is unlocked, and the corresponding gating signal sel_jPull-up, output handshake signal ack _ out_jPull high, multiplex part will data _ in_jOutput as valid data; after the data _ out is output, the ack _ in signal transmitted from the next stage pipeline structure is pulled high, so that the j-th stage mutexThe C unit of the unit outputs a handshake signal ack _ out_jThen pulling up to inform the former-stage unit that the data transmission is completed; the remaining handshake signals transmitted to the preceding stage remain low, p_j+1The weight signals are pulled high, the rest weight signals are set low, the weight information is updated again, and the process is continuously repeated.