阅读说明：本技术 一种子模块测试装置和方法 (Submodule testing device and method ) 是由 姚宏洋 谢晔源 姜田贵 杨勇 李琦 刘亚萍 晁阳 王加龙 朱毅 于 2020-05-26 设计创作，主要内容包括：本发明公开了一种子模块测试装置和方法,子模块为全桥拓扑或半桥拓扑,子模块的端口处并联有晶闸管,测试装置包括至少一个电流输出端口和至少一对通讯接口,一对通讯接口是指发送接口和接收接口,发送接口和接收接口对应连接子模块的接收接口和发送接口,测试装置内部的电压源的一端经依次串联的限流电阻和开关与电流输出端口的一端相连,电压源的另一端与电流输出端口的另一端相连,电流输出端口并联在前述晶闸管的两端,当子模块为半桥拓扑时,测试装置还包括至少一个电流测量端口,电流测量端口与前述晶闸管串联。本发明解决了子模块端口并联晶闸管检测困难的问题,具有接线方便、不需要改变原有设备的电气接线以及自动化程度高的优势。(The invention discloses a submodule testing device and a method, wherein a submodule is in a full-bridge topology or a half-bridge topology, a thyristor is connected in parallel at a port of the submodule, the testing device comprises at least one current output port and at least one pair of communication interfaces, the pair of communication interfaces are a sending interface and a receiving interface, the sending interface and the receiving interface are correspondingly connected with the receiving interface and the sending interface of the submodule, one end of a voltage source in the testing device is connected with one end of the current output port through a current limiting resistor and a switch which are sequentially connected in series, the other end of the voltage source is connected with the other end of the current output port, the current output port is connected in parallel with two ends of the thyristor, and when the submodule is in the half-bridge topology, the testing device also comprises at least one current measuring port which is connected in series with the thyristor. The invention solves the problem of difficult detection of the parallel thyristor of the submodule port, and has the advantages of convenient wiring, no need of changing the electrical wiring of the original equipment and high automation degree.)

1. The utility model provides a submodule piece testing arrangement, the submodule piece is full-bridge topology or half-bridge topology, and the port department of submodule piece is parallelly connected with thyristor, its characterized in that: the testing device comprises at least one current output port and at least one pair of communication interfaces, wherein the pair of communication interfaces are a sending interface and a receiving interface, the sending interface and the receiving interface are correspondingly connected with a receiving interface and a sending interface of a submodule, one end of a voltage source in the testing device is connected with one end of the current output port through a current limiting resistor and a switch which are sequentially connected in series, the other end of the voltage source is connected with the other end of the current output port, the current output port is connected in parallel with two ends of the thyristor, when the submodule is in a half-bridge topology, the testing device further comprises at least one current measuring port, and the current measuring port is connected with the thyristor in series.

2. The sub-module testing apparatus of claim 1, wherein: the testing device further comprises at least one direct current output port, the direct current output port is connected in parallel to two ends of the energy storage element of the submodule, and the direct current output port is provided with a discharging circuit.

3. The sub-module testing apparatus of claim 1, wherein: the voltage source is an alternating current voltage source or a direct current voltage source.

4. The sub-module testing apparatus of claim 1, wherein: the switch is a mechanical switch controlled by a relay or a controllable semiconductor device switch.

5. The sub-module testing apparatus of claim 1, wherein: the communication interface comprises at least one of an Ethernet interface, an RS485 interface and an S232 interface.

6. The sub-module testing apparatus of claim 1, wherein: the voltage amplitude of the voltage source is lower than that of the energy storage unit of the sub-module.

7. A thyristor test method based on the submodule test device of claim 1, characterized in that: when the voltage source is an alternating current voltage source and the submodule is in a full-bridge topology, the switch is switched on, the testing device controls the submodule to issue thyristor trigger pulses through the communication interface after detecting that the voltage of the current output port is positive, if the absolute value of the current flowing through the current limiting resistor before the trigger pulses are issued is smaller than a set value, the value of the current flowing through the current limiting resistor after the trigger pulses are issued is equal to the voltage of the current output port divided by the resistance value of the current limiting resistor, and after the voltage of the current output port is detected to finish the first zero crossing after the trigger pulses are issued, the absolute value of the current flowing through the current limiting resistor is smaller than the set value, the state of the thyristor is judged to be normal, otherwise, the thyristor is judged to be in fault.

8. A thyristor test method based on the submodule test device of claim 1, characterized in that: when the voltage source is an alternating current voltage source and the submodule is in a half-bridge topology, the switch is switched on, after the voltage of the current output port is detected to be positive, the testing device controls the submodule to issue a thyristor trigger pulse through the communication interface, if the absolute value of the current flowing through the thyristor before the trigger pulse is issued is smaller than a set value, the current flowing through the thyristor after the trigger pulse is issued is larger than M times the current flowing through the current limiting resistor, the current is 0< M <1, and after the voltage of the current output port is detected to finish the first zero-crossing after the trigger pulse is issued, the absolute value of the current flowing through the thyristor is smaller than the set value, the state of the thyristor is judged to be normal, otherwise, the thyristor is judged to be in fault.

9. A thyristor test method based on the submodule test device of claim 1, characterized in that: when the voltage source is a direct-current voltage source and the submodule is in a full-bridge topology, the switch is switched on, the testing device controls the submodule to send a thyristor trigger pulse through the communication interface, the absolute value of the detected voltage of the current output port is smaller than a set value, the detected current value flowing through the current limiting resistor is equal to the voltage of the current output port divided by the resistance value of the current limiting resistor, after the switch is switched off, the switch is switched on again at an interval time T1, and if the absolute value of the voltage source subtracted from the detected voltage of the current output port is smaller than the set value, the state of the thyristor is judged to be normal, otherwise, the thyristor is judged to be in a fault; wherein the time length of the thyristor trigger pulse is less than T1.

10. A thyristor test method based on the submodule test device of claim 1, characterized in that: when the voltage source is a direct-current voltage source and the submodule is in a half-bridge topology, the switch is switched on, the testing device controls the submodule to issue thyristor trigger pulses through the communication interface, if the absolute value of current flowing through the thyristor before the trigger pulses are issued is smaller than a set value, the current flowing through the thyristor after the trigger pulses are issued is larger than M times of the current flowing through the current limiting resistor, M is larger than 0 and smaller than 1, the switch is switched off, the switch is switched on again at an interval time T1, the absolute value of the current flowing through the thyristor is smaller than the set value, the state of the thyristor is judged to be normal, and otherwise, the thyristor is judged to be in fault; wherein the time length of the thyristor trigger pulse is less than T1.

Technical Field

The invention belongs to the field of flexible power transmission application, and particularly relates to a test technology of a submodule.

Background

In the field of flexible power transmission application, flexible direct current converters, chain type reactive compensation devices and the like are mostly in modular design, submodule topologies are mostly in a half-bridge or full-bridge structure, thyristors are generally required to be connected in parallel at submodule ports for protecting the safety of submodules under fault conditions, and due to topological limitation and the characteristics of the thyristors, the existing submodule testing devices cannot integrate thyristor state testing functions.

Disclosure of Invention

In order to solve the technical problems mentioned in the background art, the present invention provides a submodule testing apparatus and method.

In order to achieve the technical purpose, the technical scheme of the invention is as follows:

the utility model provides a submodule testing arrangement, the submodule piece is full-bridge topology or half-bridge topology, and the port department of submodule piece is parallelly connected has the thyristor, testing arrangement includes at least one current output port and at least a pair of communication interface, and a pair of communication interface indicates send interface and receive interface, send interface and receive interface correspond the receive interface and the send interface of connecting the submodule piece, the one end of the inside voltage source of testing arrangement through the current-limiting resistance and the switch of establishing ties in proper order with current output port's one end links to each other, the other end of voltage source with current output port's the other end links to each other, current output port connects in parallel at the both ends of aforementioned thyristor, when the submodule piece is half-bridge topology, testing arrangement still includes at least one current measurement port, current measurement port establishes ties with aforementioned thyristor.

Furthermore, the testing device further comprises at least one direct current output port, the direct current output port is connected in parallel to two ends of the energy storage element of the submodule, and the direct current output port is provided with a discharging circuit.

Further, the voltage source is an alternating current voltage source or a direct current voltage source.

Further, the switch is a mechanical switch controlled by a relay, or a controllable semiconductor device switch.

Further, the communication interface includes at least one of an ethernet interface, an RS485 interface, and an S232 interface.

Further, the voltage amplitude of the voltage source is lower than the voltage amplitude of the energy storage unit of the submodule.

According to the thyristor test method based on the submodule test device, when a voltage source is an alternating current voltage source and the submodule is in a full-bridge topology, the switch is closed, the voltage of the current output port is detected to be positive, the test device controls the submodule to issue thyristor trigger pulses through the communication interface, if the absolute value of the current flowing through the current limiting resistor before the trigger pulses are issued is smaller than a set value, the value of the current flowing through the current limiting resistor after the trigger pulses are issued is equal to the voltage of the current output port divided by the resistance value of the current limiting resistor, and when the absolute value of the current flowing through the current limiting resistor is smaller than the set value after the voltage of the current output port is detected to finish the first zero crossing after the trigger pulses are issued, the state of the thyristor is judged to be normal, and otherwise the thyristor is judged to be in a fault state.

According to the thyristor test method based on the submodule test device, when a voltage source is an alternating current voltage source and the submodule is in a half-bridge topology, the switch is closed, after the voltage of a current output port is detected to be positive, the test device controls the submodule to issue thyristor trigger pulses through the communication interface, if the absolute value of the current flowing through the thyristor before the trigger pulses are issued is smaller than a set value, the current flowing through the thyristor after the trigger pulses are issued is larger than M times of the current flowing through the current limiting resistor, the value of 0< M <1, and when the absolute value of the current flowing through the thyristor after the voltage of the current output port is detected to complete the first zero crossing after the trigger pulses are issued is smaller than the set value, the state of the thyristor is judged to be normal, and otherwise the thyristor is judged to be in a fault state.

According to the thyristor test method based on the submodule test device, when a voltage source is a direct-current voltage source and the submodule is in a full-bridge topology, the switch is turned on, the test device controls the submodule to send out thyristor trigger pulses through the communication interface, the absolute value of the detected voltage of the current output port is smaller than a set value, the detected current value flowing through the current limiting resistor is equal to the voltage of the current output port divided by the resistance value of the current limiting resistor, after the switch is turned off, the switch is turned on again at an interval time T1, and if the absolute value of the voltage source subtracted from the detected voltage of the current output port is smaller than the set value, the state of the thyristor is judged to be normal, otherwise, the thyristor is judged to be in a fault state; wherein the time length of the thyristor trigger pulse is less than T1.

According to the thyristor test method based on the submodule test device, when a voltage source is a direct-current voltage source and a submodule is in a half-bridge topology, a switch is switched on, the test device controls the submodule to issue thyristor trigger pulses through a communication interface, if the absolute value of current flowing through the thyristor before the trigger pulses are issued is smaller than a set value, the current flowing through the thyristor after the trigger pulses are issued is larger than M times of current flowing through a current limiting resistor, the M is more than 0 and less than 1, the switch is switched off, the switch is switched on again at an interval time T1, the state of the thyristor is judged to be normal, and otherwise, the thyristor is judged to be in a fault state; wherein the time length of the thyristor trigger pulse is less than T1.

Adopt the beneficial effect that above-mentioned technical scheme brought:

(1) the submodule testing device and the method provided by the invention can meet the testing items of the submodule IGBT, the bypass switch, the sampling and the communication and the like, and also have the thyristor state testing function, and have the characteristic of comprehensive testing items;

(2) the submodule testing device and the submodule testing method do not need to change the electrical wiring of the original equipment, and the wiring is simple;

(3) the submodule testing device and the submodule testing method provided by the invention have perfect protection logic, and can automatically and quickly carry out discharge processing on the tested module when the tested module has electrical faults, so that the safety of operators is ensured.

Drawings

FIG. 1 is a schematic diagram of a testing apparatus with a half-bridge topology of the sub-modules;

fig. 2 is a schematic diagram of the testing apparatus when the sub-modules are in a full-bridge topology.

Detailed Description

The technical scheme of the invention is explained in detail in the following with the accompanying drawings.

Fig. 1 is a schematic diagram of the test applied to a half-bridge topology sub-module, and fig. 2 is a schematic diagram of the test applied to a full-bridge topology sub-module. The communication interface of the testing device is integrated on the control board in the figure, and the communication interface of the corresponding tested sub-module is integrated on the control and drive module in the figure. Before testing, the communication port of the sub-module testing device is connected to the communication interface of the tested sub-module. The positive electrode and the negative electrode of the direct current output port are respectively connected to the positive electrode and the negative electrode of the energy storage unit (capacitor in the figure) of the sub-module to be tested. And the current output port of the testing device is connected to the high-voltage terminal of the tested submodule through a lead. When the functions of the IGBT, the bypass switch, the communication and the like are tested, the testing device sends a control instruction to the submodule through a sending interface TX1, receives state information and control instruction execution return information returned by the submodule through a receiving interface RX1, compares an analog quantity value acquired by a measuring port with the returned information, judges the fault of the submodule to be tested if the return information executed by the control instruction is not received or abnormal information is received or the acquired analog quantity value is abnormal, immediately blocks the control instruction and displays detailed fault information, and simultaneously carries out discharging operation on the submodule energy storage unit.

(1) When the voltage source is an alternating current voltage source and the submodule is in a full-bridge topology, the switch K is closed, the voltage Ucom of the current output port is detected to be positive (the positive end connected to the anode of the thyristor is defined to be positive, and the negative end connected with the cathode of the thyristor is defined to be negative), the testing device controls the submodule to issue thyristor trigger pulse through the communication interface, if the absolute value of the current flowing through the current limiting resistor R before the trigger pulse is issued is smaller than a set value, the value of the current flowing through the current limiting resistor R after the trigger pulse is issued is equal to the voltage of the current output port divided by the resistance value of the current limiting resistor, and when the voltage Ucom of the current output port is detected to finish the first zero crossing after the trigger pulse is issued, the absolute value of the current flowing through the current limiting resistor R is smaller than the set value, the state of the thyristor is judged to be normal, otherwise, the thyristor is judged to be in fault.

(2) When the voltage source is an alternating current voltage source and the submodule is in a half-bridge topology, the switch K is closed, the testing device controls the submodule to issue thyristor trigger pulses through the communication interface after detecting that the voltage Ucom of the current output port is positive, if the absolute value of the current flowing through the thyristor before the trigger pulses are issued is smaller than a set value, the current flowing through the thyristor after the trigger pulses are issued is larger than M times of the current flowing through the current limiting resistor R, and the M is more than 0 and less than 1, and when the absolute value of the current flowing through the thyristor after the voltage Ucom of the current output port is detected to finish the first zero crossing after the trigger pulses are issued is smaller than the set value, the state of the thyristor is judged to be normal, otherwise, the thyristor is judged to be in a fault state.

(3) When the voltage source is a direct-current voltage source and the submodule is in a full-bridge topology, switching on a switch K, controlling the submodule to send a thyristor trigger pulse by a testing device through a communication interface, wherein the absolute value of the detected current output port voltage Ucom is smaller than a set value, the detected current value flowing through a current limiting resistor R is equal to the current output port voltage divided by the resistance value of the current limiting resistor, switching off the switch K, switching on the switch K again at an interval time T1, and judging that the state of the thyristor is normal if the absolute value of the voltage U subtracted from the detected current output port voltage Ucom is smaller than the set value, or judging that the thyristor fails; wherein the time length of the thyristor trigger pulse is less than T1.

(4) When the voltage source is a direct-current voltage source and the submodule is in a half-bridge topology, switching on a switch K, controlling the submodule to issue thyristor trigger pulses by the testing device through a communication interface, if the absolute value of current flowing through the thyristor before the trigger pulses are issued is smaller than a set value, the current flowing through the thyristor after the trigger pulses are issued is larger than M times of the current flowing through a current-limiting resistor R, when the absolute value of the current flowing through the thyristor is smaller than the set value, switching off the switch K, switching on the switch K again at an interval time T1, and judging that the state of the thyristor is normal if the absolute value of the current flowing through the thyristor is smaller than the set value, or judging that the thyristor fails; wherein the time length of the thyristor trigger pulse is less than T1.

The embodiments are only for illustrating the technical idea of the present invention, and the technical idea of the present invention is not limited thereto, and any modifications made on the basis of the technical scheme according to the technical idea of the present invention fall within the scope of the present invention.