Equal-precision frequency resolving device and method

文档序号:1920041 发布日期:2021-12-03 浏览:11次 中文

阅读说明:本技术 一种等精度频率解算装置及解算方法 (Equal-precision frequency resolving device and method ) 是由 屈盼让 蔡晓乐 孙少华 呼明亮 肖鹏 张倩倩 于 2021-09-01 设计创作,主要内容包括:本发明公开一种等精度频率解算装置及解算方法,装置包括:频率采集单元和等精度解算单元;频率采集单元包括计周法采集模块和数据存储FIFO模块,用于采用计周法采集模块根据系统时钟对输入方波信号的每个周期进行计数,并将方波信号的每个周期的计数结果依次存储到数据存储FIFO模块;等精度解算单元中预先配置有固定的运行周期,用于从数据存储FIFO模块读取计数结果,并根据读取的计数结果、计数结果的数量和系统时钟,解算出一个运行周期内方波信号的平均频率。本发明的技术方案解决了现有计周测频法,由于采用单次计数数量进行解算,存在测量频率可能出现跳变,以及测量精度受被测信号的频率高低影响的问题。(The invention discloses an equal-precision frequency resolving device and a resolving method, wherein the device comprises: the device comprises a frequency acquisition unit and an equal-precision resolving unit; the frequency acquisition unit comprises a cycle counting method acquisition module and a data storage FIFO module, and is used for counting each period of the input square wave signals by the cycle counting method acquisition module according to a system clock and sequentially storing the counting result of each period of the square wave signals to the data storage FIFO module; the equal-precision calculating unit is pre-configured with a fixed running period and used for reading counting results from the data storage FIFO module and calculating the average frequency of square wave signals in one running period according to the read counting results, the number of the counting results and a system clock. The technical scheme of the invention solves the problems that the measurement frequency is likely to jump due to the fact that the single counting number is adopted for resolving in the existing frequency measuring method, and the measurement precision is influenced by the frequency of the measured signal.)

1. An equal-precision frequency resolver is characterized by comprising: the device comprises a frequency acquisition unit and an equal-precision resolving unit;

the frequency acquisition unit includes: the system comprises a cycle counting method acquisition module and a data storage FIFO module which are built on an FPGA, wherein a system clock is configured in the FPGA;

the frequency acquisition unit is used for counting each period of the input square wave signals by the cycle method acquisition module according to the system clock and sequentially storing the counting result of each period of the square wave signals to the data storage FIFO module;

the equal-precision calculating unit is a calculating program configured on the CPU, and the calculating program is pre-configured with a fixed running period; and the equal-precision calculating unit is used for reading counting results from the data storage FIFO module and calculating the average frequency of square wave signals in one operating period according to the read counting results, the number of the counting results and the system clock.

2. The equal-precision frequency solver according to claim 1, wherein the depth of the data storage FIFO module is determined according to the operating Period of the solver program and the maximum frequency Fre of the input square wave signalmaxConfigured, the depth is:

Depth=Period×Fremax

3. the equal-precision frequency solver according to claim 2,

the data storage FIFO module is also provided with an FIFO empty identifier, and the FIFO empty identifier is used for setting to 1 when no counting result exists in the data storage FIFO module, and indicating non-empty when the counting result is 0.

4. The equal-precision frequency solver according to claim 3, wherein the equal-precision solver comprises: the device comprises a data driving module and a frequency resolving module;

the data driving module is provided with an array for storing counting results and a counting amount for counting the number of the counting results, and is used for judging whether the data storage FIFO module is empty or not by reading the FIFO empty identifier, and sequentially reading and storing the counting results in the data storage FIFO module in the array when the data storage FIFO module is not empty, wherein 1 is added to the counting amount when one counting result is stored;

and the frequency calculating module is used for calculating the average frequency of the square wave signal in one operating period according to each counting result, the counting amount and the system clock in the array when the counting amount is not 0.

5. The equal-precision frequency calculation device according to claim 4, wherein the frequency calculation module calculates the average frequency of the square wave signal in one operation period, and comprises:

and calculating the average value of all counting results according to each counting result in the array and the counting number of the counting results, and calculating the average frequency of the square wave signal in the running period according to the average value of all counting results and a system clock.

6. The equal-precision frequency solver according to claim 4,

the data driving module is further configured to, when the data storage FIFO module is judged to be empty by reading the FIFO empty flag, count the count of the count result in the array of the data storage FIFO module to be 0, so that the frequency calculation module outputs the frequency calculation result of the previous operation cycle.

7. An equal-precision frequency calculation method, which is implemented by using the equal-precision frequency calculation device according to any one of claims 1 to 6, and comprises the following steps: counting the period of the input square wave signal, and carrying out frequency calculation on the input signal in each operation by a calculation program;

the counting of the period of the input square wave signal includes: counting each period of the input square wave signal according to a system clock, recording the counting result of each period of the square wave signal and storing the counting result in a data storage FIFO module;

the resolving program performs frequency resolution on the input signal in each operation thereof, including:

and reading the counting result from the data storage FIFO module, and calculating the average frequency of square wave signals in one operating period of the calculation program according to the read counting result, the counting number of the counting result and the system clock.

8. The equal-precision frequency calculation method according to claim 7, wherein the calculation program performs frequency calculation on the input signal in each operation thereof, and includes: a data driving process operated by the data driving module and a frequency resolving process operated by the frequency resolving module;

wherein the data-driven process comprises:

step 11, initializing an array for storing counting results in the data driving module, and setting the number of the counting results to be 0;

step 12, reading the FIFO empty identifier in the data storage FIFO module, and judging whether the data storage FIFO module is empty;

step 13, if the data storage FIFO module is judged to be not empty in step 12, reading the counting result, storing the counting result in an array, adding 1 to the counting amount of the counting result in the array, and turning to step 12; if the data storage FIFO module is judged to be empty in the step 12, ending the data driving process and switching to a frequency resolving process;

the frequency calculation process comprises the following steps:

step 21, judging whether the counting quantity of the counting result is equal to 0; if the counting number is judged to be 0, outputting a frequency resolving result of the last operation period, and ending the resolving process; if the counting number is judged not to be 0, the step 22 is carried out;

step 22, calculating the average value of all counting results according to all counting results and counting quantity in the array;

and step 23, calculating and outputting the average frequency of the square wave signal according to the average value of the counting result and the system clock of the FPGA.

Technical Field

The invention relates to the technical field of digital circuits, in particular to an equal-precision frequency calculating device and a calculating method.

Background

At present, the frequency of a signal is accurately measured by using a 'cycle counting and frequency measuring method' in the field of industrial frequency measurement, and the principle is to obtain the counting number of a system clock in a single period of the acquired signal and calculate the frequency of the acquired signal through the frequency of the system clock and the counting number.

In general, the "frequency measurement by cycle" has a frequency much higher than that of the signal to be acquired, and therefore has a high acquisition accuracy. However, conventional cycle counting frequency measurement systems suffer from two problems: (i) only one cycle counting result participates in frequency calculation, the smoothness of the calculation result is poor, the anti-interference capability is poor, and jump occurs in the measurement frequency; (ii) the measurement accuracy is not equal, the higher the frequency of the measured signal is, the lower the measurement accuracy is, and especially when the frequency of the measured signal is close to the system clock, the lower the calculation result accuracy is.

Disclosure of Invention

The purpose of the invention is as follows: in order to solve the problems in the background art, the embodiment of the invention provides an equal-precision frequency calculating device and a calculating method, so as to solve the problems that the measurement frequency may jump and the measurement precision is affected by the frequency of a measured signal in the existing frequency measuring method due to the fact that the single counting number is adopted for calculating.

The technical scheme of the invention is as follows: the embodiment of the invention provides an equal-precision frequency resolving device, which comprises: the device comprises a frequency acquisition unit and an equal-precision resolving unit;

the frequency acquisition unit includes: the system comprises a cycle counting method acquisition module and a data storage FIFO module which are built on an FPGA, wherein a system clock is configured in the FPGA;

the frequency acquisition unit is used for counting each period of the input square wave signals by the cycle method acquisition module according to the system clock and sequentially storing the counting result of each period of the square wave signals to the data storage FIFO module;

the equal-precision calculating unit is a calculating program configured on the CPU, and the calculating program is pre-configured with a fixed running period; and the equal-precision calculating unit is used for reading counting results from the data storage FIFO module and calculating the average frequency of square wave signals in one operating period according to the read counting results, the number of the counting results and the system clock.

Optionally, in the equal-precision frequency calculating device as described above, the depth of the data storage FIFO module is a Period according to a calculating program and a maximum frequency Fre of an input square wave signalmaxConfigured, the depth is:

Depth=Period×Fremax

alternatively, in the equal-precision frequency solver as described above,

the data storage FIFO module is also provided with an FIFO empty identifier, and the FIFO empty identifier is used for setting to 1 when no counting result exists in the data storage FIFO module, and indicating non-empty when the counting result is 0.

Optionally, in the equal-precision frequency calculating device as described above, the equal-precision calculating unit includes: the device comprises a data driving module and a frequency resolving module;

the data driving module is provided with an array for storing counting results and a counting amount for counting the number of the counting results, and is used for judging whether the data storage FIFO module is empty or not by reading the FIFO empty identifier, and sequentially reading and storing the counting results in the data storage FIFO module in the array when the data storage FIFO module is not empty, wherein 1 is added to the counting amount when one counting result is stored;

and the frequency calculating module is used for calculating the average frequency of the square wave signal in one operating period according to each counting result, the counting amount and the system clock in the array when the counting amount is not 0.

Optionally, in the equal-precision frequency calculating device, the frequency calculating module calculates an average frequency of the square wave signal in an operating cycle, and includes:

and calculating the average value of all counting results according to each counting result in the array and the counting number of the counting results, and calculating the average frequency of the square wave signal in the running period according to the average value of all counting results and a system clock.

Alternatively, in the equal-precision frequency solver as described above,

the data driving module is further configured to, when the data storage FIFO module is judged to be empty by reading the FIFO empty flag, count the count of the count result in the array of the data storage FIFO module to be 0, so that the frequency calculation module outputs the frequency calculation result of the previous operation cycle.

The embodiment of the invention also provides an equal-precision frequency calculation method, which is implemented by adopting any one of the equal-precision frequency calculation devices, and comprises the following steps: counting the period of the input square wave signal, and carrying out frequency calculation on the input signal in each operation by a calculation program;

the counting of the period of the input square wave signal includes: counting each period of the input square wave signal according to a system clock, recording the counting result of each period of the square wave signal and storing the counting result in a data storage FIFO module;

the resolving program performs frequency resolution on the input signal in each operation thereof, including:

and reading the counting result from the data storage FIFO module, and calculating the average frequency of square wave signals in one operating period of the calculation program according to the read counting result, the counting number of the counting result and the system clock.

Optionally, in the equal-precision frequency calculation method, the calculating program performs frequency calculation on the input signal in each operation thereof, and includes: a data driving process operated by the data driving module and a frequency resolving process operated by the frequency resolving module;

wherein the data-driven process comprises:

step 11, initializing an array for storing counting results in the data driving module, and setting the number of the counting results to be 0;

step 12, reading the FIFO empty identifier in the data storage FIFO module, and judging whether the data storage FIFO module is empty;

step 13, if the data storage FIFO module is judged to be not empty in step 12, reading the counting result, storing the counting result in an array, adding 1 to the counting amount of the counting result in the array, and turning to step 12; if the data storage FIFO module is judged to be empty in the step 12, ending the data driving process and switching to a frequency resolving process;

the frequency calculation process comprises the following steps:

step 21, judging whether the counting quantity of the counting result is equal to 0; if the counting number is judged to be 0, outputting a frequency resolving result of the last operation period, and ending the resolving process; if the counting number is judged not to be 0, the step 22 is carried out;

step 22, calculating the average value of all counting results according to all counting results and counting quantity in the array;

and step 23, calculating and outputting the average frequency of the square wave signal according to the average value of the counting result and the system clock of the FPGA.

The invention has the beneficial effects that: the embodiment of the invention provides an equal-precision frequency calculating device and a calculating method, which effectively solve the problem that the frequency precision of the conventional frequency calculating method is inconsistent in a full-scale range; firstly, it is explained that the frequency calculation error is caused by a synchronization error from an input square wave signal to a system clock domain, the synchronization error is less than or equal to one system clock cycle, the conventional method calculates the frequency only according to a one-time system clock counting result of the input square wave signal, when the frequency of the input square wave signal is high, the ratio of the synchronization error to the input square wave signal cycle is large, the frequency accuracy is low, when the frequency of the input square wave signal is low, the ratio of the synchronization error to the input square wave signal cycle is small, the frequency accuracy is high, that is, the above is the reason that the equal-accuracy calculation cannot be realized in the conventional frequency calculation method, the height of the calculated frequency accuracy is affected by the height of the frequency of the input square wave signal, and therefore, the conventional frequency calculation method is the unequal-accuracy frequency calculation. According to the equal-precision frequency calculating device and the calculating method provided by the embodiment of the invention, the frequency is calculated according to the sum of the counting results of all system clocks of the input square wave signals of the software in one operation period, when the operation period of the software is not changed, the sum of the counting results is approximately equal no matter how the frequency of the input square wave signals is changed, and the ratio of synchronous errors to the sum of the counting results is not changed, so that the equal-precision requirement of frequency calculation in a full-scale range can be suitable for application scenes with wide range, equal precision and high reliability.

Drawings

Fig. 1 is a schematic structural diagram of an equal-precision frequency calculating device according to an embodiment of the present invention;

fig. 2 is a schematic diagram illustrating a work flow of a medium-precision calculating unit in the constant-precision frequency calculating device according to the embodiment of the present invention;

FIG. 3 is a schematic diagram illustrating a principle of synchronization error caused by a conventional "frequency measurement method for frequency calculation" adopted in a conventional frequency calculation method;

fig. 4 is a schematic diagram of a principle of frequency calculation by using the equal-precision frequency calculation device and the calculation method provided by the embodiment of the invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be noted that the embodiments and features of the embodiments in the present application may be arbitrarily combined with each other without conflict.

As described in the above background art, the "frequency measurement method by cycle counting" is used to calculate the frequency of the acquired signal through the system clock frequency and the number of counts, and this method only has the number of counts in one cycle involved in frequency calculation, and has the problems that the measurement frequency may jump and the measurement accuracy is affected by the frequency of the measured signal.

In application scenes with wide-range, equal-precision and high-reliability frequency measurement requirements such as aerospace and the like, the implementation mode of equal-precision frequency calculation with high robustness has important application value. In view of the above requirements, the embodiment of the invention provides an equal-precision frequency calculating device and a calculating method, which are particularly suitable for a wide-range equal-precision frequency measurement scene.

The following specific embodiments of the present invention may be combined, and the same or similar concepts or processes may not be described in detail in some embodiments.

Fig. 1 is a schematic structural diagram of an equal-precision frequency calculating device according to an embodiment of the present invention. As shown in fig. 1, the equal-precision frequency calculating apparatus in the embodiment of the present invention may include: the frequency acquisition unit and the equal precision calculation unit.

In the structure of the equal-precision frequency resolver shown in fig. 1, the frequency acquisition unit may include: the system comprises a cycle counting acquisition module and a data storage FIFO module which are built on an FPGA, and a system clock is configured in the FPGA.

Based on the structure of the frequency acquisition unit in the embodiment of the invention, the frequency acquisition unit has the functions of: and the cycle method acquisition module is used for counting each cycle of the input square wave signals according to the system clock and sequentially storing the counting result of each cycle of the square wave signals to the data storage FIFO module.

The equal-precision calculating unit in the embodiment of the invention is a calculating program configured on a CPU, and the calculating program is pre-configured with a fixed running period; based on the configuration form and content of the equal precision calculating unit, the function of the equal precision calculating unit is as follows: and reading the counting result from the data storage FIFO module, and calculating the average frequency of square wave signals in one operating period according to the read counting result, the number of the counting results and the system clock.

It should be noted that the cycle counting method acquisition module and the data storage FIFO module in the frequency acquisition unit according to the embodiment of the present invention are implemented based on an FPGA.

In the embodiment of the invention, the Depth (Depth) of a data storage FIFO module in the frequency acquisition unit is the maximum frequency Fre according to the operating Period of a resolving program and an input square wave signalmaxIs configured. In a specific implementation, the depth of the data storage FIFO module may be:

Depth=Period×Fremax

in the embodiment of the invention, a FIFO empty identifier is also configured in the data storage FIFO module in the frequency acquisition unit. Specifically, the FIFO empty flag is set to 1 when there is no counting result in the data storage FIFO module, and it is set to 0 to indicate that the counting result of the data storage FIFO module is not empty.

In the structure of the equal-precision frequency calculating device shown in fig. 1, the equal-precision calculating unit may include: the data driving module and the frequency calculating module are realized based on a CPU. As shown in fig. 2, it is a schematic diagram of a work flow of an equal-precision calculating unit in the equal-precision frequency calculating device according to the embodiment of the present invention; the data driving module executes a data driving process, and the frequency calculating module executes a frequency calculating process.

In the embodiment of the present invention, the data driving module is configured with an array for storing the counting result and a counting amount for counting the number of the counting result, and the data driving module is configured to determine whether the data storage FIFO module is empty by reading the FIFO empty flag, and when the data storage FIFO module is not empty, sequentially read out and store the counting result in the data storage FIFO module in the array, and each time one counting result is stored, add 1 to the counting amount.

The frequency calculation module in the embodiment of the invention is used for calculating the average frequency of the square wave signal in one operating period according to each counting result, the counting amount and the system clock in the array when the counting amount is not 0.

As can be seen from the above work flow of the equal-precision calculating unit, the data storage FIFO module in the embodiment of the present invention provides, in addition to the counting result (i.e., the count value of the system clock in one period of the input square wave signal) to the data driving module, an FIFO empty flag indicating that the FIFO module is empty, for data driving and frequency calculating of the equal-precision calculating unit.

In an implementation manner of the embodiment of the present invention, a specific implementation manner in which the frequency calculation module calculates an average frequency of the square wave signal in one operation period may include:

and calculating the average value of all counting results according to each counting result in the array and the counting number of the counting results, and calculating the average frequency of the square wave signal in the running period according to the average value of all counting results and a system clock.

In a specific implementation of the embodiment of the present invention, the data driving module is further configured to, when the FIFO empty flag is read and the data storage FIFO module is determined to be empty, because the count of the count result in the array is 0, at this time, the frequency calculation module outputs the frequency calculation result of the previous operation cycle.

Based on the equal-precision frequency calculating device provided by each embodiment of the invention, an embodiment of the invention also provides an equal-precision frequency calculating method, which is executed by the equal-precision frequency calculating device provided by each embodiment of the invention, and the method mainly comprises two parts: one part is as follows: counting the period of the input square wave signal; the other part is as follows: the resolving routine performs frequency resolution on the input signal in each operation thereof.

In the equal-precision frequency calculation method provided in the embodiment of the present invention, the specific implementation manner of counting the period of the input square wave signal may include: and counting each period of the input square wave signal according to the system clock, recording the counting result of each period of the square wave signal and storing the counting result in the data storage FIFO module.

In the equal-precision frequency calculating method provided in the embodiment of the present invention, a specific implementation manner of the calculating program performing frequency calculation on the input signal in each operation may include:

and reading the counting result from the data storage FIFO module, and calculating the average frequency of square wave signals in one operating period of the calculation program according to the read counting result, the counting number of the counting result and the system clock.

Further, in the embodiment of the present invention, the frequency calculation is performed on the input signal in each operation by a calculation program, specifically including two parts, namely, data driving and frequency calculation, that is, including: a data driving process operated by the data driving module and a frequency resolving process operated by the frequency resolving module;

referring to the work flow of the equal-precision calculating unit shown in fig. 2, the data-driven flow may include the following specific steps:

step 11, initializing an array for storing counting results in the data driving module, and setting the number of the counting results to be 0, namely, the count is 0;

step 12, reading the FIFO empty identifier in the data storage FIFO module, and judging whether the data storage FIFO module is empty;

step 13, if the data storage FIFO module is judged to be not empty in step 12, reading the counting result, storing the counting result in an array, adding 1 to the counting amount of the counting result in the array, and turning to step 12; if the data storage FIFO module is empty in the step 12, the data driving process is ended, and the frequency calculation process is switched to. At this time, the frequency of the input square wave signal is less than the software running frequency, and there may be the following cases: because the square wave signal period is greater than the CPU running period, after the CPU collects the counting result in the FIFO last time, the cycle counting method collection module does not store a new counting result in the FIFO, and therefore the data volume in the FIFO is 0.

Referring to the work flow of the equal-precision calculating unit shown in fig. 2, the frequency calculating flow may include the following specific steps:

step 21, judging whether the counting quantity of the counting result is equal to 0, if so, indicating that the period of the square wave information is large, if not updating the counting result in the FIFO module, outputting the frequency resolving result of the last operation period, and ending the resolving process; otherwise, go to step 22;

step 22, calculating the average value of all counting results according to all counting results and counting quantity in the array;

and step 23, calculating and outputting the average frequency of the square wave signal according to the average value of the counting result and the system clock of the FPGA.

The equal-precision frequency calculating device and the calculating method provided by the embodiment of the invention effectively solve the problem that the frequency precision of the conventional frequency calculating method is inconsistent in a full-scale range; firstly, it is explained that the frequency calculation error is caused by a synchronization error from an input square wave signal to a system clock domain, the synchronization error is less than or equal to one system clock cycle, the conventional method calculates the frequency only according to a one-time system clock counting result of the input square wave signal, when the frequency of the input square wave signal is high, the ratio of the synchronization error to the input square wave signal cycle is large, the frequency accuracy is low, when the frequency of the input square wave signal is low, the ratio of the synchronization error to the input square wave signal cycle is small, the frequency accuracy is high, that is, the above is the reason that the equal-accuracy calculation cannot be realized in the conventional frequency calculation method, the height of the calculated frequency accuracy is affected by the height of the frequency of the input square wave signal, and therefore, the conventional frequency calculation method is the unequal-accuracy frequency calculation. According to the equal-precision frequency calculating device and the calculating method provided by the embodiment of the invention, the frequency is calculated according to the sum of the counting results of all system clocks of the input square wave signals of the software in one operation period, when the operation period of the software is not changed, the sum of the counting results is approximately equal no matter how the frequency of the input square wave signals is changed, and the ratio of synchronous errors to the sum of the counting results is not changed, so that the equal-precision requirement of frequency calculation in a full-scale range can be suitable for application scenes with wide range, equal precision and high reliability.

The following detailed description of the synchronization error of the conventional "frequency measurement method for measuring the frequency" adopted by the conventional frequency calculation method includes the following two cases:

fig. 3 is a schematic diagram of a principle that a conventional "frequency measurement method by cycle counting" adopted in a conventional frequency calculation method causes synchronization errors. As shown in fig. 3, the conventional "frequency measuring method for measuring the frequency of the cycle" counts the cycle of the input square wave signal according to the system clock, and the synchronization errors Δ 1 and Δ 2 are the main factors causing the frequency acquisition error, when the system clock frequency is fsystemThen, the frequency value obtained by resolving according to the single-cycle counting result is:where N is the counting result, and the frequency of the actual input square wave signal can be expressed as:in the formula, | Delta12L is less than one system clock period PsystemIs therefore frequency-dependentThe rate error is:it can be seen that the frequency error is related to the period count result N, and the frequency error is smaller when N is larger, and the frequency error is larger when N is smaller.

Fig. 4 is a schematic diagram of a principle of frequency calculation by using the equal-precision frequency calculation device and the calculation method provided by the embodiment of the invention. As shown in fig. 4, in the embodiment of the present invention, the frequency is calculated according to all the counting results and the count of the counting results in the square wave signal input by the software within one operating Period, and the obtained frequency calculation value isWherein N isiIs the ith count result, fsystemIs the system clock frequency, and the actual frequency values are:wherein, Delta is the acquisition error of the input square wave signal in the corresponding counting result, and in the formula, | Delta1countL is less than one system clock period PsystemSo the frequency error is:whileThe frequency error is independent of the frequency of the input square wave signal and only dependent on the gate time and the frequency of the standard signal, namely the equal-precision measurement of the whole test frequency band is realized in the embodiment of the invention.

Based on the above analysis, as shown in fig. 4, the acquisition error of the first counting result of the input square wave signal is Δ12The error of the second counting is delta23The error of the third counting is Δ34Then, the cumulative error of the results of the three counts is (Δ)12)+(Δ23)+(Δ34)=Δ14It can be seen that, when the device and the method provided by the embodiment of the invention are used for frequency calculation, the synchronous error of continuous counting for multiple times is also smaller than one system clock period PsystemAnd equal-precision frequency resolution is realized.

In an optional implementation manner of the embodiment of the present invention, the cycle counting method of outputting the square wave signal by the conditioning circuit is implemented based on the cycle counting method acquisition module, the counting result is stored in the data storage FIFO module with a specified size, the CPU periodically reads the empty data storage FIFO module, sorts the counting result, eliminates the maximum value and the minimum value, calculates the average value of the counting result, and calculates the frequency according to the average value of the counting result.

The following describes a specific implementation of the equal-precision frequency calculation device and the calculation method according to the embodiments of the present invention with a specific implementation example.

As shown in fig. 1, the equal-precision frequency calculating apparatus provided in this embodiment specifically includes: the device comprises a frequency acquisition unit and an equal-precision resolving unit; wherein, frequency acquisition unit specifically includes: the system comprises a cycle counting method acquisition module and a data storage FIFO module, wherein a frequency acquisition unit specifically comprises: the device comprises a data driving module and a frequency resolving module.

In specific implementation, the cycle counting method acquisition module and the data storage FIFO module are realized on the basis of an FPGA; the data driving module and the frequency resolving module are realized based on a CPU.

The measured signal generates a square wave signal with maintained frequency through conditioning and hysteresis comparison, the square wave signal is input into a cycle counting method acquisition module through an FPGA pin, the cycle counting method acquisition module synchronizes the input square wave signal under a system clock domain through two stages of D triggers, a single pulse signal indicating the rising edge of the input square wave signal is generated through operation, the single pulse signal is used as an enabling signal to trigger the system clock counting of a single cycle of the frequency input signal, and is used as a storage process of the enabling signal to trigger the counting result; the data storage FIFO module is used for storing the counting result of the input method signal single-cycle system clock, the width of the data storage FIFO module is equal to the width of a counter of the cycle counting method acquisition module, and the depth De of the data storage FIFO modulepth can be determined according to the software running Period of the data driving module and the frequency resolving module and the maximum frequency Fre of the measured signalmaxThe configuration is specifically Depth ═ Period × FremaxIn addition, the data storage FIFO module also contains a FIFO empty flag empty indicating whether it is empty or not.

The data driving module in this specific embodiment maintains an array and a count, clears the array and the count by 0 at the beginning of a software cycle, reads an empty flag empty of the data storage FIFO module, ends the data driving process if the empty flag empty is equal to 1, indicates that the data storage FIFO module is empty, and shifts to a frequency calculation process, otherwise, circularly reads a count result, and adds 1 to the count until the empty flag empty is at a position of 1. The data calculation module in this embodiment determines whether the count is 0, if 0 indicates that the frequency is not updated, the data calculation module directly outputs the frequency calculation result of the previous software cycle, if not, the data calculation module performs mean filtering on the count result, then calculates and outputs the frequency, and if the mean value of the count result is CodeavgSystem clock frequency FresystemFrequency calculation result Freresult=Fresystem/Codeavg

Although the embodiments of the present invention have been described above, the above description is only for the convenience of understanding the present invention, and is not intended to limit the present invention. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

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