阅读说明：本技术 电路网表验证方法、装置、系统及相关设备 (Circuit netlist verification method, device, system and related equipment ) 是由 薛明达 滕辉 于 2021-09-10 设计创作，主要内容包括：本申请实施例提供一种电路网表验证方法、装置、系统及相关设备,所述方法包括：获取设计电路的电路网表,所述电路网表包含器件单元以及各器件单元之间的连接线路,其中,所述连接线路标记有标记电压；遍历所述电路网表中的连接线路,基于所述连接线路中的运行电压为所述连接线路分类；判断所述连接线路所标记的标记电压是否与该连接线路所属的类别相匹配；若匹配,则所述电路网表通过验证,避免了标记电压错误可能造成的电路设计错误。(The embodiment of the application provides a circuit netlist verification method, a device, a system and related equipment, wherein the method comprises the following steps: acquiring a circuit netlist of a design circuit, wherein the circuit netlist comprises device units and connecting circuits among the device units, and the connecting circuits are marked with marking voltages; traversing a connection circuit in the circuit netlist, classifying the connection circuit based on an operating voltage in the connection circuit; judging whether the marked voltage marked by the connecting line is matched with the category of the connecting line; if the circuit netlist is matched with the circuit netlist, the circuit netlist passes verification, and circuit design errors possibly caused by marking voltage errors are avoided.)

1. A method for circuit netlist verification, comprising:

acquiring a circuit netlist of a design circuit, wherein the circuit netlist comprises device units and connecting circuits among the device units, and the connecting circuits are marked with marking voltages;

traversing a connection circuit in the circuit netlist, classifying the connection circuit based on an operating voltage in the connection circuit;

judging whether the marked voltage marked by the connecting line is matched with the category of the connecting line;

and if the circuit netlist is matched with the circuit netlist, the circuit netlist passes verification.

2. The method of claim 1, wherein classifying the connection line based on an operating voltage in the connection line comprises:

determining a voltage range in which the operating voltage of the connecting line is based on the connection relationship in the connecting line;

determining the type of the connecting line according to the voltage range of the operating voltage of the connecting line;

if the voltage range in which the operating voltage of the connecting line is located is a first voltage range, the connecting line belongs to a first category; and if the voltage range in which the operating voltage of the connecting line is located is a second voltage range, the connecting line belongs to a second category.

3. The method of claim 2, wherein determining whether the marked voltage marked by the connection line matches the category to which the connection line belongs comprises:

and judging whether the voltage of the mark of the connecting line is in the matching voltage range or not according to the matching voltage range corresponding to the category of the connecting line, if so, matching the mark voltage marked by the connecting line with the category of the connecting line.

4. A method according to claim 2 or 3, characterized in that the first category is in particular a power supply connection providing a voltage for a device cell, and the second category is in particular a ground connection providing a ground path for a device cell; the classifying the connection lines based on connection relationships in the connection lines includes:

in the circuit netlist, a connecting circuit connected between a power line and a device unit is used as a power connecting line;

taking a connecting circuit connected with a ground wire in the circuit netlist as a ground wire connecting wire;

and tracking connecting lines connected among the device units in the circuit netlist, wherein the connecting lines connected to the power supply side of the device units are used as power supply connecting lines, and the connecting lines connected to the ground side of the device units are used as ground connecting lines.

5. The method according to claim 4, wherein the obtaining of the circuit netlist of the design circuit specifically comprises: converting a layout of a design circuit to obtain a circuit netlist of the design circuit;

the layout of the design circuit comprises a line marked by an abnormal identification layer, and a connecting line corresponding to the line marked by the abnormal identification layer in the circuit netlist is an abnormal marking line.

6. The method of claim 5, wherein determining whether the marked voltage marked by the connection line matches the category to which the connection line belongs comprises:

and judging whether the marking voltage of the abnormal marking line in the connecting line is matched with the type of the connecting line.

7. The method according to claim 6, wherein the determining whether the flag voltage of the abnormal flag line in the connection line matches the category to which the connection line belongs comprises:

if the connecting line is a power supply connecting line, judging whether the highest voltage in the marking voltages of the abnormal marking line is greater than or equal to a first preset voltage value or not; if so, matching the marking voltage marked by the abnormal marking line with the category to which the abnormal marking line belongs;

if the connecting line is a ground wire connecting line, judging whether the lowest voltage in the marking voltages of the abnormal marking line is smaller than or equal to a second preset voltage value or not; if yes, the marking voltage marked by the abnormal marking line is matched with the category of the abnormal marking line.

8. The method as claimed in claim 7, wherein after determining whether the flag voltage of the abnormal flag line in the connection line matches the category to which the connection line belongs, the method further comprises:

if not, the abnormal marking circuit is not verified, and the marking voltage error of the abnormal marking circuit is prompted.

9. A circuit netlist verification apparatus, comprising:

the circuit netlist obtaining module is used for obtaining a circuit netlist of a design circuit, wherein the circuit netlist comprises device units and connecting circuits among the device units, and the connecting circuits are marked with marking voltages;

the circuit classification module is used for traversing the connecting circuits in the circuit netlist and classifying the connecting circuits based on the operating voltage in the connecting circuits;

the netlist verification module is used for judging whether the marked voltage marked by the connecting line is matched with the category to which the connecting line belongs; and if the circuit netlist is matched with the circuit netlist, the circuit netlist passes verification.

10. A chip verification system configured to perform the circuit netlist verification method of any one of claims 1-8.

11. A computer device, comprising: at least one memory and at least one processor; the memory stores one or more computer-executable instructions that are called by the processor to perform the circuit netlist verification method of any one of claims 1-8.

12. A storage medium storing one or more executable instructions for performing the circuit netlist verification method of any one of claims 1-8.

Technical Field

The embodiment of the application relates to the technical field of chips, in particular to a circuit netlist verification method, a circuit netlist verification device, a circuit netlist verification system and related equipment.

Background

In the design flow of an integrated circuit, the circuit design needs to undergo a plurality of different tests or verifications to ensure that the circuit design conforms to the corresponding rules. During these testing or verification processes, the circuit design is adjusted and modified accordingly based on different considerations. Therefore, in an actual design flow, the circuit design is adjusted and modified many times in many ways.

However, the modified circuit design has a high possibility of circuit design errors.

Disclosure of Invention

In view of this, embodiments of the present disclosure provide a circuit netlist verification method, apparatus, system and related device, so as to avoid circuit design errors possibly caused by a tag voltage error.

In order to achieve the above object, the embodiments of the present application provide the following technical solutions.

In a first aspect, an embodiment of the present application provides a circuit netlist verification method, including:

acquiring a circuit netlist of a design circuit, wherein the circuit netlist comprises device units and connecting circuits among the device units, and the connecting circuits are marked with marking voltages;

traversing a connection circuit in the circuit netlist, classifying the connection circuit based on an operating voltage in the connection circuit;

judging whether the marked voltage marked by the connecting line is matched with the category of the connecting line;

and if the circuit netlist is matched with the circuit netlist, the circuit netlist passes verification.

Optionally, classifying the connection line based on the operating voltage in the connection line includes:

determining a voltage range in which the operating voltage of the connecting line is based on the connection relationship in the connecting line;

determining the type of the connecting line according to the voltage range of the operating voltage of the connecting line;

if the voltage range in which the operating voltage of the connecting line is located is a first voltage range, the connecting line belongs to a first category; and if the voltage range in which the operating voltage of the connecting line is located is a second voltage range, the connecting line belongs to a second category.

Optionally, the determining whether the marked voltage marked by the connection line matches the category to which the connection line belongs includes:

and judging whether the voltage of the mark of the connecting line is in the matching voltage range or not according to the matching voltage range corresponding to the category of the connecting line, if so, matching the mark voltage marked by the connecting line with the category of the connecting line.

Optionally, the first category is specifically a power supply connection line for providing voltage to the device unit, and the second category is specifically a ground connection line for providing a ground path to the device unit; the classifying the connection lines based on connection relationships in the connection lines includes:

in the circuit netlist, a connecting circuit connected between a power line and a device unit is used as a power connecting line;

taking a connecting circuit connected with a ground wire in the circuit netlist as a ground wire connecting wire;

and tracking connecting lines connected among the device units in the circuit netlist, wherein the connecting lines connected to the power supply side of the device units are used as power supply connecting lines, and the connecting lines connected to the ground side of the device units are used as ground connecting lines.

Optionally, the obtaining of the circuit netlist of the design circuit specifically includes: converting a layout of a design circuit to obtain a circuit netlist of the design circuit;

the layout of the design circuit comprises a line marked by an abnormal identification layer, and a connecting line corresponding to the line marked by the abnormal identification layer in the circuit netlist is an abnormal marking line.

Optionally, the determining whether the marked voltage marked by the connection line matches the category to which the connection line belongs includes:

and judging whether the marking voltage of the abnormal marking line in the connecting line is matched with the type of the connecting line.

Optionally, the determining whether the flag voltage of the abnormal flag line in the connection line matches the category to which the connection line belongs includes:

if the connecting line is a power supply connecting line, judging whether the highest voltage in the marking voltages of the abnormal marking line is greater than or equal to a first preset voltage value or not; if so, matching the marking voltage marked by the abnormal marking line with the category to which the abnormal marking line belongs;

if the connecting line is a ground wire connecting line, judging whether the lowest voltage in the marking voltages of the abnormal marking line is smaller than or equal to a second preset voltage value or not; if yes, the marking voltage marked by the abnormal marking line is matched with the category of the abnormal marking line.

Optionally, after determining whether the flag voltage of the abnormal flag line in the connection line matches the category to which the connection line belongs, the method further includes:

if not, the abnormal marking circuit is not verified, and the marking voltage error of the abnormal marking circuit is prompted.

In a second aspect, an embodiment of the present application provides a circuit netlist verification apparatus, including:

the circuit netlist obtaining module is used for obtaining a circuit netlist of a design circuit, wherein the circuit netlist comprises device units and connecting circuits among the device units, and the connecting circuits are marked with marking voltages;

the circuit classification module is used for traversing the connecting circuits in the circuit netlist and classifying the connecting circuits based on the operating voltage in the connecting circuits;

the netlist verification module is used for judging whether the marked voltage marked by the connecting line is matched with the category to which the connecting line belongs; and if the circuit netlist is matched with the circuit netlist, the circuit netlist passes verification.

In a third aspect, an embodiment of the present application provides a chip verification system, where the chip verification system is configured to execute the circuit netlist verification method provided in the embodiment of the present application.

In a fourth aspect, embodiments of the present application provide a computer device, including at least one memory and at least one processor; the memory stores one or more computer-executable instructions that are invoked by the processor to perform the circuit netlist verification method provided by the embodiments of the present application.

In a fifth aspect, an embodiment of the present application provides a storage medium, where the storage medium stores one or more executable instructions, and the one or more executable instructions are used to execute the circuit netlist verification method provided in the embodiment of the present application.

The circuit netlist verification method, device, system and related equipment provided by the embodiment of the application comprise the following steps: acquiring a circuit netlist of a design circuit, wherein the circuit netlist comprises device units and connecting circuits among the device units, and the connecting circuits are marked with marking voltages; traversing a connection circuit in the circuit netlist, classifying the connection circuit based on an operating voltage in the connection circuit; judging whether the marked voltage marked by the connecting line is matched with the category of the connecting line; and if the circuit netlist is matched with the circuit netlist, the circuit netlist passes verification.

It can be seen that, in the embodiment of the present invention, based on the fact that the operating voltage in the connection line is usually a fixed value, such as a power voltage value or a zero value (ground voltage), by traversing the connection line in the circuit netlist, classifying the connection line based on the operating voltage in the connection line, and further determining whether the marked voltage marked by the connection line matches with the class to which the connection line belongs, it is possible to determine whether the marked voltage marked by the connection line is correct, and thus, a circuit design error possibly caused by a mark voltage error is avoided.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.

FIG. 1 is an alternative flowchart of a circuit netlist verification method according to an embodiment of the present application;

FIG. 2 is another alternative flowchart of a circuit netlist verification method provided in an embodiment of the present application;

fig. 3 is an alternative flowchart of step S11 provided in the embodiment of the present application;

FIG. 4 is a flowchart of a circuit netlist verification method according to an embodiment of the present application;

fig. 5 is an alternative flowchart of step S32 provided in the embodiment of the present application;

FIG. 6 is an alternative block diagram of a circuit netlist verification apparatus provided in an embodiment of the present application;

FIG. 7 is an alternative block diagram of a circuit netlist verification apparatus according to an embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

As described in the background, in the design flow of an integrated circuit, the circuit design needs to undergo a plurality of different tests or verifications to ensure that the circuit design conforms to the corresponding rules. During these testing or verification processes, the circuit design is adjusted and modified accordingly based on different considerations. Therefore, in an actual design flow, the circuit design is adjusted and modified many times in many ways.

However, the modified circuit design has a high possibility of circuit design errors.

The inventor finds that in the design flow of the integrated circuit, the voltage of the connecting line often has the condition of error marking caused by modification or adjustment, thereby causing the circuit design error. For example, the layout design needs to meet the physical design and process rule of FAB (wafer manufacturer), for example, if the differential pressure is greater than 1.8V, two adjacent connecting lines in the layout design need to have a distance between them greater than 0.9V. To satisfy these rules, a layout engineer may adaptively modify the voltage marked on the connecting lines in the layout design, for example, modify the voltage of one of two adjacent connecting lines, so that the voltage difference between the adjacent connecting lines satisfies the distance rule. However, such modifications may cause circuit design errors.

Based on this, an embodiment of the present invention provides a circuit netlist verification method, where the method includes: acquiring a circuit netlist of a design circuit, wherein the circuit netlist comprises device units and connecting circuits among the device units, and the connecting circuits are marked with marking voltages; traversing a connection circuit in the circuit netlist, classifying the connection circuit based on an operating voltage in the connection circuit; judging whether the marked voltage marked by the connecting line is matched with the category of the connecting line; and if the circuit netlist is matched with the circuit netlist, the circuit netlist passes verification.

It can be seen that, in the embodiment of the present invention, based on the fact that the operating voltage in the connection line is usually a fixed value, such as a power voltage value or a zero value (ground voltage), by traversing the connection line in the circuit netlist and classifying the connection line based on the operating voltage in the connection line, it is further determined whether the marked voltage marked by the connection line matches with the class to which the connection line belongs, so that it is possible to simply and conveniently determine whether the marked voltage marked by the connection line is correct, and a circuit design error possibly caused by a mark voltage error is avoided.

In a preferred example, when the verification of the connection lines of the layout is required, the corresponding connection lines can be verified by converting the layout into a circuit netlist.

In an alternative implementation, fig. 1 schematically shows an alternative flow chart of a circuit netlist verification method provided by an embodiment of the present application. As shown in fig. 1, the method includes:

step S10: obtaining a circuit netlist of a design circuit;

the circuit netlist comprises device units and connecting lines among the device units, and the connecting lines are marked with marking voltages.

In a circuit netlist, parameters corresponding to a connection line are usually marked on the connection line, the marked voltage is an expected operation voltage of the connection line, and accordingly, simulation and test of a design circuit are executed based on the parameters.

It can be understood that if the tag voltage in the circuit netlist is incorrect, each link in the corresponding simulation, test and design flows may be affected, so that a circuit design error is generated, and the error is difficult to find. In the embodiment of the invention, the verification of the marking voltage is carried out based on the obtained circuit network table, so that the circuit design error possibly caused by the marking voltage error can be avoided.

Step S11: traversing a connection circuit in the circuit netlist, classifying the connection circuit based on an operating voltage in the connection circuit;

it can be understood that the operating voltage in the connecting line is usually a fixed number of values, for example a supply voltage value or a zero value (ground voltage), by means of which the corresponding classification of the connecting line can be carried out, so that the verification of the marking voltage of the connecting line can be carried out simply and conveniently.

It is right the connecting wire is categorised, can be categorised different operation voltage value for different categories, also can classify based on different voltage range, for example, can be 0.9V and 1.8V's connecting wire with operation voltage and divide into a category to can control the accurate degree of verification process to a certain extent.

And traversing the connecting lines in the circuit netlist to classify all the connecting lines in the circuit netlist, so as to verify the marking voltage based on the corresponding classification.

Step S12: judging whether the marked voltage marked by the connecting line is matched with the category of the connecting line;

and if the circuit netlist is matched with the circuit netlist, the circuit netlist passes verification. If not, the connection line can be recorded, and the mark voltage error of the connection line is prompted.

It is understood that the judgment of the marking voltage is made based on the category, and the criterion of the judgment can be controlled to some extent, so that the adjustment can be made based on the actual design rule. For example, for a class in which the operating voltage is 0.9V to 1.8V, the matching voltage range of the corresponding tag voltage may be greater than or equal to (0.9-c1) V and greater than or equal to (1.8+ c2) V, where c1 is the voltage floating value when the operating voltage is 0.9V and c2 is the voltage floating value when the operating voltage is 1.8V.

It can be seen that, in the embodiment of the present invention, based on the fact that the operating voltage in the connection line is usually a fixed value, such as a power voltage value or a zero value (ground voltage), by traversing the connection line in the circuit netlist and classifying the connection line based on the operating voltage in the connection line, it is further determined whether the marked voltage marked by the connection line matches with the class to which the connection line belongs, so that it is possible to simply and conveniently determine whether the marked voltage marked by the connection line is correct, and a circuit design error possibly caused by a mark voltage error is avoided.

In an alternative example, the category of the connection line may be classified based on a voltage range of the operating voltage, and in particular, the category of the connection line may include at least a first category in which the operating voltage is in a first voltage range and a second category in which the operating voltage is in a second voltage range. Referring to FIG. 2, another alternative flow diagram of a circuit netlist verification method is shown, the method comprising:

step S20: obtaining a circuit netlist of a design circuit;

the description of step S20 may refer to step S10 in fig. 1, and is not repeated here.

Step S21: traversing the connecting lines in the circuit netlist, and determining the voltage range of the operating voltage of the connecting lines based on the connection relation in the connecting lines;

it can be understood that, based on the connection relationship in the connection line, the operating voltage of the connection line can be obtained by judgment according to the electrical principle in circuit connection, and then the voltage range where the operating voltage of the connection line is located can be determined.

Step S22: determining the type of the connecting line according to the voltage range of the operating voltage of the connecting line;

if the voltage range in which the operating voltage of the connecting line is located is a first voltage range, the connecting line belongs to a first category; and if the voltage range in which the operating voltage of the connecting line is located is a second voltage range, the connecting line belongs to a second category.

Step S23: judging whether the marker voltage of the connecting line is in the matching voltage range or not according to the matching voltage range corresponding to the type of the connecting line;

in some optional examples, the matching voltage range may be a classification range of a class to which the connection line belongs, for example, a first class corresponds to a first voltage range, and a second class corresponds to a second voltage range; in other alternative examples, the matching voltage range may be different from the classification range of the category to which the connection line belongs, for example, the matching voltage range may be included in the classification range of the category to which the connection line belongs, or, in the case of some abnormal connection lines, the matching voltage range may be set to a smaller range based on a stricter criterion so as to avoid the error of the abnormal connection lines. Specifically, the matching voltage range may be determined according to actual design requirements, and the embodiment of the present invention is not specifically limited herein.

If the voltage of the mark of the connecting line is in the matching voltage range, the mark voltage marked by the connecting line is matched with the category of the connecting line.

Therefore, classification is carried out based on different voltage ranges, judgment of marking voltage is carried out based on corresponding matching voltage ranges, different design requirements can be met, and corresponding design circuits can be verified.

It should be noted that the classification of the connection lines is not limited to two, and in other optional examples, the connection lines may be further divided into three or more types based on different operating voltages, so as to perform more precise classification on the connection lines to meet different verification requirements.

In an optional example, the first category may specifically be a power supply connection line providing a voltage for the device unit, and the second category may specifically be a ground connection line providing a ground path for the device unit; correspondingly, the first voltage range corresponding to the power connection line may be greater than or equal to a preset voltage value, the preset voltage value may be the lowest operating voltage of the device unit in the circuit design, the second voltage range corresponding to the ground connection line may be less than or equal to a preset voltage value, the preset voltage value may be a zero value or a value slightly higher than the zero value, correspondingly, referring to the optional flowchart of step S11 shown in fig. 3, the classifying the connection lines based on the operating voltage in the connection lines in step S11 may specifically include:

step S110: in the circuit netlist, a connecting circuit connected between a power line and a device unit is used as a power connecting line;

it can be understood that the connecting line connected between the power line and the device unit is used for providing voltage for the device unit, and correspondingly, the operating voltage of the connecting line is bound to be in the first voltage range, so that the voltage range where the operating voltage of the connecting line is located can be determined directly based on the connection relation, and then the connecting line connected between the power line and the device unit is determined to be the power connecting line.

Step S111: taking a connecting circuit connected with a ground wire in the circuit netlist as a ground wire connecting wire;

correspondingly, the connecting circuit connected with the ground wire is used for providing a ground wire passage for the device unit, correspondingly, the operating voltage of the connecting circuit is necessarily in the second voltage range, and therefore the voltage range where the operating voltage of the connecting circuit is located can be determined directly based on the connection relation, and the connecting circuit connected with the ground wire is determined to be a ground wire connecting wire.

Step S112: and tracing connecting lines connected among the device units in the circuit netlist, wherein the connecting lines used for creating power supply paths are used as power supply connecting lines, and the connecting lines used for creating ground line paths are used as ground line connecting lines.

In the circuit netlist, there are also connecting lines connected between the device units, and correspondingly, these connecting lines may be tracked based on preset rules, for example, connecting lines indirectly connected to the power line through the device units (e.g., MOS transistors) may be considered to create a power path and thus may serve as a power connecting line, and connecting lines indirectly connected to the ground line through the device units (e.g., MOS transistors) may be considered to create a ground line path and thus may serve as a ground connecting line. Alternatively, a preset trace rule may be set based on an electrical principle, so as to trace and confirm the kind of the connection line. In an alternative example, the tracing process may be performed from only one direction, or may be performed simultaneously based on two directions, so as to determine the type of each connection line.

It can be understood that, the connection line traced by the direction of the voltage-providing side of the device unit is indirectly connected to the power line, the operation voltage of the connection line is necessarily in the first voltage range, so that the connection line can be determined as the power connection line; the device unit provides that the connecting circuit that the direction of ground wire route one side was tracked and is obtained is indirectly connected to the ground wire, then the operating voltage of this connecting circuit must be in second voltage range to can confirm this connecting circuit is the ground wire connecting wire, thereby can regard the connecting circuit of connecting at the power supply side of device unit as the power connecting wire, regard the connecting circuit of connecting at the ground wire side of device unit as the ground wire connecting wire.

It can be seen that the operating voltage of the connection lines can be inferred based on the connection relationship and the indirect connection relationship in the circuit design, and the connection lines can be classified accordingly.

In an optional example, the verification of the marking voltage may be performed on a connection line that generates a marking abnormality, specifically, the circuit netlist may be converted from a layout of a design circuit, the layout of the design circuit includes a line marked by an abnormality identification layer, and a connection line in the circuit netlist corresponding to the line marked by the abnormality identification layer is an abnormality marking line (i.e., Vflag). Referring to FIG. 4, yet another alternative flow diagram of a circuit netlist verification method is shown, the method comprising:

step S30: and converting the layout of the design circuit to obtain a circuit netlist of the design circuit.

The layout of the designed circuit is a graph containing relevant physical information such as the device type, the device size, the relative position between the devices, the connection relationship between the devices and the like of the circuit, wherein the layout can be marked with the information of each device and the connection circuit. When the abnormal marking information is needed, an abnormal identification layer can be arranged in the layout of the design circuit, so that the abnormal information is identified and processed.

When the circuit is verified for the abnormal marking circuit, the layout of the design circuit may include the circuit marked by the abnormal marking layer, and the connection circuit corresponding to the circuit marked by the abnormal marking layer in the circuit netlist is the abnormal marking circuit.

Step S31: and traversing the connecting lines in the circuit netlist, and classifying the connecting lines based on the operating voltage in the connecting lines.

Based on the verification of the abnormal marking circuit in this example, the classification criteria of the corresponding connection circuit may be different, for example, only the ground connection line and the power connection line may be distinguished, and the situations of different operating voltages in the power connection line are not distinguished, for example, the connection lines with the operating voltages of 0.9V and 1.8V are both classified as power connection lines, and in the subsequent verification process, the verification of the marking voltage may be performed based on a stricter criterion.

Step S32: and judging whether the marking voltage of the abnormal marking line in the connecting line is matched with the type of the connecting line.

It is understood that, when an abnormality marker line that generates a marker abnormality is determined in the connection lines, verification may be performed only for the marker voltage of the abnormality marker line, without performing verification of all the connection lines. Thus, verification can be performed based on the characteristics of the abnormality marking line without considering the influence thereof on all the connection lines.

Accordingly, when verifying the marking voltage of the abnormal marking line, the matching voltage range may be set to a higher standard, for example, the matching voltage range of the power connection line is limited to a higher voltage value range, so as to perform verification with a stricter standard. Still taking the connection lines with the working voltages of 0.9V and 1.8V as an example, such abnormal marking lines are all divided into power connection lines, and the matching voltage range for the power connection lines can be greater than or equal to 1.8V, so as to screen out the abnormal marking lines with the working voltages of 0.9V. It can be understood that, in the stage of circuit design and layout design, the abnormal marking circuit is a circuit whose marking voltage may be modified, and to avoid some design rules, the voltage of the connection circuit is usually modified to a smaller value, which may cause a circuit design error.

Accordingly, if the marking voltage of the abnormal marking line is within the matching voltage range, the abnormal marking line can be considered to pass the verification.

Further, referring to the alternative flowchart of step S32 shown in fig. 5, the specific step of determining in step S32 may include:

step S321: if the connecting line is a power supply connecting line, judging whether the highest voltage in the marking voltages of the abnormal marking line is greater than or equal to a first preset voltage value or not;

it can be understood that the matching voltage range of the power connection line may be greater than or equal to a first preset voltage value, and correspondingly, if the highest voltage of the marking voltages of the abnormal marking lines is greater than or equal to the first preset voltage value, the marking voltage marked by the abnormal marking line matches the category to which the abnormal marking line belongs. Otherwise, the marked voltage marked by the abnormal marking line is not matched with the category to which the abnormal marking line belongs.

The first preset voltage value may be a higher operating voltage in the connection line of the category, or a lowest floating value of the higher operating voltage in the connection line of the category. For example, when d is the operating voltage, the lowest floating value d (1-Vper%) of the operating voltage is the floating range of d.

Step S322: if the connecting line is a ground wire connecting line, judging whether the lowest voltage in the marking voltages of the abnormal marking line is smaller than or equal to a second preset voltage value or not;

it is understood that the matching voltage range of the ground connection line may be smaller than or equal to a second preset voltage value, and correspondingly, if the lowest voltage of the marking voltages of the abnormal marking line is smaller than or equal to the second preset voltage value, the marking voltage marked by the abnormal marking line matches the category to which the marking voltage marked by the abnormal marking line belongs. Otherwise, the marked voltage marked by the abnormal marking line is not matched with the category to which the abnormal marking line belongs.

Wherein the second preset voltage value may be a zero value or a highest floating value of a ground line.

Returning to fig. 4, step S33 is executed: if not, the abnormal marking circuit is not verified, and the marking voltage error of the abnormal marking circuit is prompted.

The abnormal marking circuit which is not verified can be displayed in a centralized mode after statistics and arrangement, and therefore marking voltage errors of the abnormal marking circuit are prompted.

It should be noted that, the circuit netlist verification method may combine a consistency check (LAYOUT Vs schema, also called LVS) and a Design rule check (Design rule check, also called DRC), and the execution order of the circuit netlist verification method is not limited by other checks, that is, the circuit netlist verification method may be performed before the consistency check or between the consistency check and the Design rule check, and the circuit netlist verification method is preferably performed before the Design rule check, so that it may be determined whether the LAYOUT of the designed circuit meets the Design rule before verifying the circuit netlist.

Moreover, the circuit netlist verification method can be implemented based on a corresponding verification tool, for example, the verification rule in the circuit netlist verification method can be set in the verification tool, and the verification of the circuit netlist can be implemented based on the verification tool. It should be noted that the verification tool may be in the form of software, hardware or a combination of software and hardware, and the embodiments of the present invention are not limited in this respect.

In the following, a circuit netlist verification apparatus provided in the embodiment of the present application is introduced, and the contents of the apparatus described below may be regarded as a chip verification device or a computer device, which is a functional module required to implement the circuit netlist verification method provided in the embodiment of the present application. The device content described below may be referred to in correspondence with the method content described above.

FIG. 6 is an alternative block diagram of a circuit netlist verification apparatus provided in an embodiment of the present application. As shown in fig. 6, the apparatus may include:

a netlist obtaining module 200, configured to obtain a circuit netlist of a design circuit, where the circuit netlist includes device units and connection lines between the device units, and the connection lines are marked with a tag voltage;

a circuit classification module 210, configured to traverse the connection circuits in the circuit netlist, and classify the connection circuits based on the operating voltages in the connection circuits;

a netlist verification module 220, configured to determine whether a tag voltage marked by the connection line matches a class to which the connection line belongs; and if the circuit netlist is matched with the circuit netlist, the circuit netlist passes verification.

Optionally, the line classifying module 210 is configured to classify the connection line based on an operating voltage in the connection line, and includes:

determining a voltage range in which the operating voltage of the connecting line is based on the connection relationship in the connecting line;

determining the type of the connecting line according to the voltage range of the operating voltage of the connecting line;

if the voltage range in which the operating voltage of the connecting line is located is a first voltage range, the connecting line belongs to a first category; and if the voltage range in which the operating voltage of the connecting line is located is a second voltage range, the connecting line belongs to a second category.

Optionally, the netlist verifying module 220 is configured to determine whether the labeled voltage marked by the connection line matches the category to which the connection line belongs, and includes:

and judging whether the voltage of the mark of the connecting line is in the matching voltage range or not according to the matching voltage range corresponding to the category of the connecting line, if so, matching the mark voltage marked by the connecting line with the category of the connecting line.

Optionally, the first category is specifically a power supply connection line for providing voltage to the device unit, and the second category is specifically a ground connection line for providing a ground path to the device unit; the line classifying module 210 is configured to classify the connection line based on a connection relationship in the connection line, and includes:

in the circuit netlist, a connecting circuit connected between a power line and a device unit is used as a power connecting line;

taking a connecting circuit connected with a ground wire in the circuit netlist as a ground wire connecting wire;

and tracking connecting lines connected among the device units in the circuit netlist, wherein the connecting lines connected to the power supply side of the device units are used as power supply connecting lines, and the connecting lines connected to the ground side of the device units are used as ground connecting lines.

Optionally, the netlist obtaining module 200 is configured to obtain a circuit netlist of a design circuit, and specifically includes: converting a layout of a design circuit to obtain a circuit netlist of the design circuit;

the layout of the design circuit comprises a line marked by an abnormal identification layer, and a connecting line corresponding to the line marked by the abnormal identification layer in the circuit netlist is an abnormal marking line.

Optionally, the netlist verifying module 220 is configured to determine whether the labeled voltage marked by the connection line matches the category to which the connection line belongs, and includes:

and judging whether the marking voltage of the abnormal marking line in the connecting line is matched with the type of the connecting line.

Optionally, the netlist verifying module 220 is configured to determine whether a tag voltage of an abnormal tag circuit in the connection circuit matches a class to which the connection circuit belongs, and includes:

if the connecting line is a power supply connecting line, judging whether the highest voltage in the marking voltages of the abnormal marking line is greater than or equal to a first preset voltage value or not; if so, matching the marking voltage marked by the abnormal marking line with the category to which the abnormal marking line belongs;

if the connecting line is a ground wire connecting line, judging whether the lowest voltage in the marking voltages of the abnormal marking line is smaller than or equal to a second preset voltage value or not; if yes, the marking voltage marked by the abnormal marking line is matched with the category of the abnormal marking line.

Optionally, in an optional example, fig. 7 shows another optional block diagram of a circuit netlist verification apparatus provided in an embodiment of the present application, where the circuit netlist verification apparatus further includes:

the error prompting module 230 is configured to, if the marked voltage marked by the abnormal marked line does not match the category to which the abnormal marked line belongs, prompt that the marked voltage of the abnormal marked line is incorrect if the abnormal marked line fails to pass the verification.

The embodiment of the present application further provides a chip verification system, and the chip verification system may be configured to execute the circuit netlist verification method provided by the embodiment of the present application.

An embodiment of the present application further provides a computer device, where the computer device may include: at least one memory and at least one processor; the memory stores one or more computer-executable instructions that are invoked by the processor to perform the circuit netlist verification method provided by the embodiments of the present application.

Embodiments of the present application provide a storage medium, where the storage medium stores one or more executable instructions, and the one or more executable instructions are used to execute the circuit netlist verification method.

While various embodiments have been described above in connection with what are presently considered to be the embodiments of the disclosure, the various alternatives described in the various embodiments can be readily combined and cross-referenced without conflict to extend the variety of possible embodiments that can be considered to be the disclosed and disclosed embodiments of the disclosure.

Although the embodiments of the present application are disclosed above, the present application is not limited thereto. Various changes and modifications may be effected therein by one of ordinary skill in the pertinent art without departing from the scope or spirit of the present disclosure, and it is intended that the scope of the present disclosure be defined by the appended claims.