阅读说明：本技术 读出信号发生器和用于运行电容设备的方法 (Readout signal generator and method for operating a capacitive device ) 是由 K·德塞尔 C·舍林 于 2020-01-20 设计创作，主要内容包括：本发明涉及一种用于电容设备(12)的读出信号发生器(10)和一种用于运行电容设备(12)的方法,其通过以下方式：在读出信号通道(17)上提供具有脉冲频率(t-(var))的脉冲式读出信号,所述电容设备(12)的至少一个电容器装置(C-(sense)和C-(ref))直接或间接地与所述读出信号通道电连接；并且借助所述脉冲式读出信号读出所述电容设备(12)的至少一个电容器装置(C-(sense)和C-(ref)),所述至少一个电容器装置具有固有振荡周期持续时间为t-(res)的固有振荡,其中,将所述脉冲式读出信号的每个电压脉冲以n个在时间上彼此偏移的电压级接通到所述读出信号通道(17)上,其中,n是大于等于2的自然数,其中,在两个彼此相继地接通的电压级之间分别如此保持时间偏移Δt-(i),使得对于所述电压级之间的至少一个时间偏移Δt-(i)适用：等式(1),其中,m是大于等于零的自然数：(The invention relates to a read-out signal generator (10) for a capacitive device (12) and to a method for operating a capacitive device (12), by: providing a signal having a pulse frequency (t) on a readout signal channel (17) var ) At least one capacitor means (C) of said capacitive device (12) sense And C ref ) Directly or indirectly electrically connected with the readout signal channel; and reading out at least one capacitor device (C) of the capacitive arrangement (12) by means of the pulsed read-out signal sense And C ref ) Said at least one capacitor device having a natural oscillation period duration of t res Wherein each voltage pulse of the pulsed read-out signal is switched on to the read-out signal channel (17) at n voltage levels offset in time from one another, where n is a natural number greater than or equal to 2, wherein a time offset Δ t is respectively maintained between two voltage levels switched on one after the other i Such that for at least one time offset Δ t between the voltage levels i The method is applicable to the following steps: equation (1), where m is a natural number equal to or greater than zero:)

1. A readout signal generator (10) for a capacitive device (12), the readout signal generator having:

a voltage signal generating device (14) which can be actuated by means of a clock generator (16) of the readout signal generator itself or external to the readout signal generator in such a way that the voltage signal generating device (14) provides a readout signal channel (17) of the readout signal generator (10) with a pulse frequency predetermined by the clock generator in such a way(t_var) Such that at least one capacitor device (C) of the capacitive arrangement (12) which is electrically connected directly or indirectly to the readout signal channel (17) can be read out by means of the pulsed readout signal_senseAnd C_ref) Said at least one capacitor device having a natural oscillation period duration of t_resNatural oscillation of (a);

it is characterized in that the preparation method is characterized in that,

the voltage signal generating device (14) is designed to switch each voltage pulse of the pulsed read signal on to the read signal channel (17) in n voltage levels which are offset in time from one another, where n is a natural number greater than or equal to 2,

in each case, a time offset Δ t exists between two voltage stages that are switched on one after the other_iAnd for at least one time offset Δ t between said voltage levels_iThe method is applicable to the following steps:wherein m is a natural number equal to or greater than zero.

2. Readout signal generator (10) according to claim 1, wherein a maximum pulse intensity V can be defined for each voltage pulse of the pulsed readout signal_pulsWherein the voltage signal generating device (14) is designed to generate the voltage pulses with respectively the same or different voltage step heights Δ V_iIs switched on to the readout signal path (17) in such a way that:

3. readout signal generator (10) according to claim 2, wherein the voltage signal generation means (14) are designed for bringing the voltage pulses respectively to the same voltage level height av_i＝V_pulsN voltage levels of/n are connected to the readout signal path (17).

4. Readout signal generator (10) according to one of the preceding claims, wherein the voltage signal generation means (14) are designed for generating the voltage signal in n_eEach voltage pulse of the pulsed read-out signal is reduced by a voltage degradation which is offset in time from one another, where n_eIs a natural number greater than or equal to 2, wherein a time offset Δ te exists between two voltage steps that are carried out one after the other_iFor at least one time offset Δ te between said voltage degradations_iThe method is applicable to the following steps: wherein m is_eIs a natural number equal to or greater than zero.

5. Readout signal generator (10) according to one of the preceding claims, wherein the voltage signal generation device (14) comprises n stages which can be activated so as to be offset in time from one another such that each of the n stages respectively switches on one of n voltage stages of a voltage pulse of the pulsed readout signal onto the readout signal channel (17).

6. A capacitive device (12) having:

a readout signal generator (10) according to any one of the preceding claims; and

said at least one capacitor device (C)_senseAnd C_ref) Said at least one capacitor device having a natural oscillation period duration of t_resAnd is directly or indirectly electrically connected to the readout signal channel (17) and can be read out by means of a pulsed readout signal provided on the readout signal channel (17).

7. A capacitive device (12) according to claim 6, wherein the capacitive device (12) comprises at least two capacitor means (C)_senseAnd C_ref) As at least one capacitor device (C) thereof_senseAnd C_ref) Wherein the at least two capacitor devices (C)_senseAnd C_ref) Respectively having a duration t with the same natural oscillation period_resNatural oscillation of (a).

8. A capacitive device (12) according to claim 7, wherein the capacitive device (12) comprises at least one measuring capacitor arrangement (C)_sense) And at least one reference capacitor device (C)_ref) As said at least two capacitor means (C)_senseAnd C_ref)。

9. A capacitive device (12) according to any of claims 6 to 8, wherein the capacitive device (12) is a capacitive pressure sensor, a capacitive acceleration sensor, a capacitive rotation rate sensor or a microphone.

10. A method for operating a capacitive device (12), the method having the steps of:

providing a signal having a pulse frequency (t) on a readout signal channel (17)_var) At least one capacitor means (C) of said capacitive device (12)_senseAnd C_ref) Directly or indirectly electrically connected with the readout signal channel; and is

Reading out at least one capacitor device (C) of the capacitive arrangement (12) by means of the pulsed read-out signal_senseAnd C_ref) Said at least one capacitor device having a natural oscillation period duration of t_resNatural oscillation of (a);

it is characterized in that the preparation method is characterized in that,

each voltage pulse of the pulsed read-out signal is switched on to the read-out signal channel (17) at n voltage levels offset in time from each other, where n is a natural number greater than or equal to 2, and two voltage levels are arranged one after the otherThe time offset Δ t between the switched-on voltage levels is maintained in each case in this way_iSuch that for at least one time offset Δ t between the voltage levels_iThe method is applicable to the following steps:

wherein m is a natural number equal to or greater than zero.

Technical Field

The invention relates to a read-out signal generator for a capacitive device. The invention also relates to a capacitive device. The invention also relates to a method for operating a capacitive device.

Background

Signal generators for readout capacitors are known from the prior art, for example the excitation signal generator described in DE 102016107299 a 1. Fig. 1 shows a schematic diagram for explaining the mode of action of a signal generator for reading out a capacitive device according to the prior art.

The conventional signal generator described below operates, for example, a capacitance measuring device with (only) one measuring capacitance in such a way that: the signal generator reads out the capacitance measuring device by means of a pulsed voltage signal in pulsed operation. In the diagram of fig. 1, the abscissa is the time axis t, while the ordinate indicates the voltage strength U of the (analog) response signal of the measuring capacitance of the capacitance measuring device which is operated in its pulsed mode. Based on the schematic diagram of fig. 1, it can be seen that the pulsed voltage signal of the signal generator according to the prior art generates (transient) noise on the response signal of the measuring capacitance when the measuring capacitance is read out, in that: the pulsed voltage signal excites at least one adjustable electrode member of the measurement capacitance into mechanical oscillation. The pulsed voltage signal of conventional signal generators typically excites the mechanical eigenmodes of the measured capacitance in an undesirable manner.

Disclosure of Invention

The invention relates to a readout signal generator for a capacitive device having the features of claim 1, to a capacitive device having the features of claim 6 and to a method for operating a capacitive device having the features of claim 10.

THE ADVANTAGES OF THE PRESENT INVENTION

The invention proposes the possibility of generating a (substantially) noise-free/transient-noise-free pulsed operation of a capacitive device, for example a capacitive sensor device or a microphone. The advantages of pulsed operation of the capacitive device, for example, in particular the low energy consumption of the capacitive device during its pulsed operation, can thus be utilized without (transient) noise appearing on the corresponding measurement signal when the capacitive device is read out. The invention therefore contributes to energy saving, since a potential user will decide more often on a capacitive device that operates in pulsed operation.

In an advantageous embodiment of the read-out signal generator, a maximum pulse intensity V can be defined for each voltage pulse of the pulsed read-out signal_pulsWherein the voltage signal generating means are designed to generate voltage pulses having respectively the same or different voltage step heights Δ V_iThe n voltage levels of (a) are switched on to the readout signal path in such a way that:in particular, the voltage signal generating means can be designed for voltage pulses having the same voltage level height Δ V_i＝V_pulsN voltage levels of/n are switched on to the sense signal path. With the same voltage level height and time offset in at least two sub-stepsSwitching the voltage signal on to the readout signal path counteracts exciting at least one capacitor device of the capacitive device to have a solidWith oscillating period duration t_resAnd thus contributes to low noise signal acquisition.

In an advantageous embodiment of the read-out signal generator, the voltage signal generating means are designed for generating the voltage signal at n_eEach voltage pulse of the pulse type read-out signal is reduced by voltage degradation which is shifted in time, wherein n_eIs a natural number greater than or equal to 2, wherein a time offset Δ te exists between two voltage steps that are carried out one after the other_iAnd for at least one time offset Δ te between voltage degradations_iThe method is applicable to the following steps:wherein m is_eIs a natural number equal to or greater than zero. With the method described here, it is also possible to avoid exciting at least one capacitor device of the capacitive arrangement to have a natural oscillation period duration t when the maximum pulse intensity of the pulsed readout signal is withdrawn/reduced_resNatural oscillation of (a).

Preferably, the voltage signal generating device comprises n stages which can be activated at a time offset from one another in such a way that each of the n stages respectively switches one of the n voltage stages of the voltage pulse of the pulsed read signal to the read signal channel. The voltage signal generating device described here with n stages can be produced relatively cost-effectively and requires relatively little installation space. Thus, the embodiments of the voltage signal generating device described herein can be easily installed in or near a capacitive device.

The advantages of the above-described embodiment of the readout signal generator are also ensured in a capacitive device having such a readout signal generator and at least one capacitor arrangement: at least one capacitor device having a natural oscillation period of duration t_resIs directly or indirectly electrically connected to the readout signal channel and can be read out by means of a pulsed readout signal provided on the readout signal channel.

In an advantageous embodiment, the capacitive device comprisesAt least two capacitor devices are used as at least one capacitor device, wherein at least two capacitor devices respectively have the same duration t of natural oscillation period_resNatural oscillation of (a). Thus, the same pulsed read-out signal can be used for noise-free/transient noise-free read-out of at least two capacitor devices of the capacitive device.

For example, the capacitive device may comprise at least one measuring capacitor arrangement and at least one reference capacitor arrangement as at least two capacitor arrangements. Thus, the invention described herein can also be used to carry out measurements taking into account reference measurements.

Preferably, the capacitive device is a capacitive pressure sensor, a capacitive acceleration sensor, a capacitive speed sensor or a microphone. It is noted, however, that the embodiments of the capacitive device described herein should not be interpreted exhaustively.

Furthermore, the implementation of a corresponding method for operating a capacitive device also leads to the advantages already explained above. It is noted that the method can be extended according to the above described embodiments of the read-out signal generator and/or the capacitive device.

Drawings

Further features and advantages of the invention are set forth below with reference to the accompanying drawings. The figures show:

fig. 1 shows a schematic diagram for explaining the manner of action of a signal generator for reading out a capacitive device according to the prior art;

fig. 2a to 2d show schematic diagrams for illustrating an embodiment of a method for operating a capacitive device; and

fig. 3a and 3b show a schematic partial view and an overall view of an embodiment of a read-out signal generator or a capacitive device cooperating therewith.

Detailed Description

Fig. 2a to 2d show schematic diagrams for illustrating an embodiment of a method for operating a capacitive device.

The method described below can be used for any capacitive device having at least one capacitor means. At least one capacitor device is understood to mean an electrical device which is composed of two electrode parts each, wherein at least one of the two electrode parts can be deformed and/or adjusted in such a way that the capacitance applied between the two electrode parts changes. The method described below is implemented for the following capacitive device, by way of example only: at least one capacitor device of the capacitor arrangement comprises in each case one membrane as actuator electrode and in each case one positionally fixed membrane as stator electrode.

In the case of at least one capacitor device of a capacitive system, at least one of its two electrode parts has a mechanical oscillation, which can be referred to as having a natural oscillation period duration t_resNatural oscillation of (a). In the following, this operating state of the at least one capacitor device is referred to as the natural oscillation period duration t of the at least one capacitor device_resNatural oscillation of (a). Duration t of natural oscillation period_resIn particular, the natural oscillation period duration of the fundamental mode of the natural oscillation of at least one capacitor device of the capacitive system can be understood. Thus, the natural oscillation period duration t_resMay be the inverse of the frequency of the fundamental mode of natural oscillation of at least one capacitor arrangement of the capacitive device.

In order to operate the capacitive device in a pulsed manner when carrying out the method described here, a pulsed read signal having a pulse frequency is provided on a read signal channel, to which at least one capacitor device of the capacitive device is electrically connected directly or indirectly. The pulse frequency of the pulsed readout signal may be a pulse frequency that is constant in time during pulsed operation of the capacitive device or a pulse frequency that varies in time during pulsed operation of the capacitive device. A pulsed read-out signal is preferably understood to be a voltage signal having a (almost) rectangular pulse profile. For each of the voltage pulses of the pulsed read-out signal a pulse duration/pulse length t can be defined_pulsWherein the voltage pulses of the pulsed voltage signal can optionally have the same pulse duration t during pulsed operation of the capacitive device_pulsOr different pulse durations t_puls。

At least one capacitor device of the capacitance arrangement is read out by means of a pulsed read-out signal. The pulsed read-out signal is therefore only used for reading out the at least one capacitor device of the capacitive device, since the functional principle/measuring principle of the at least one capacitor device does not generally require a continuous supply of current. However, at least one capacitor device is usually placed with a natural oscillation period duration t at its readout_resIn the natural oscillation of (a). However, in implementing the method described herein, the cancellation excites at least one capacitor device to have a natural oscillation period duration t_resIn the following manner: each voltage pulse of the pulsed read signal is switched on to the read signal channel at n voltage levels offset in time from one another, where n is a natural number greater than or equal to 2. In addition, a time offset Δ t is maintained between two voltage stages that are switched on one after the other in each case in this way_iSo that for at least one time offset Δ t between voltage levels_iThe equation (equation 1) applies:

wherein m is a natural number of 0 or more. At least one time offset Δ t_iAnd is therefore located at Δ t_min＝t_resN to Δ t_max＝Δt_min+mΔt_iIn a range of values in between, wherein m is preferably selected such that Δ t_maxIs significantly less than the corresponding pulse duration t_puls. (pulse duration t)_pulsIs the time span between completing the turn-on of the n voltage levels onto the sense signal path and the subsequent pullback/reduction of the voltage turned on onto the sense signal path. )

The n voltage levels each have a voltage level height Δ V_iWherein the voltage level height Δ V for n voltage levels_iAnd the equation (equation 2) applies:

wherein, V_pulsIs the maximum pulse strength of the voltage pulse that has been fully turned on to the read channel.

Total on-time t of voltage pulses of a pulsed read signal on a read signal channel_totalThus calculated according to equation (equation 3), where:

thus, at time t n voltage levels of the voltage pulses of the pulsed read signal₀Initial turn-on period, according to equation (equation 4), for the voltage V (t) currently turned on to the sense signal path (where t is₀<t<t₀+t_total) The method is applicable to the following steps:

where j is the maximum natural number of n or less, and for j:

preferably, for Δ t_iThe deviation δ of (d) applies: | delta-<<t_res/2n². In this case, the method described herein has a particularly high robustness.

In the schematic diagram of fig. 2a, the n-level switching-on of the voltage pulses of the pulsed read-out signal is shown graphically, exemplarily as two-level switching-on, where m is equal to 0. In the diagram of fig. 2a, the abscissa is the time axis t, while the voltage v (t) switched on to the readout signal path is shown by the ordinate.

At a point in time t₀The first voltage level is switched on to the sense channel. The first voltage level triggers a first acceleration a of the membrane of at least one capacitor device of the capacitive device, each acting as an actuator electrode₁By means of the illustration in FIG. 2bThe intended ordinate is shown in the form of an image. (the abscissa of the diagram of fig. 2b is the time axis t.) this can also be interpreted as the first voltage level at the point in time t₀Exciting at least one capacitor arrangement of a capacitive device having a natural oscillation period duration t_resNatural oscillation of (a).

At a time offset Δ t_iThereafter, at a point in time t₀+Δt_iThe second voltage stage is switched on to the voltage stage. The second voltage level excites a second acceleration a of the membranes of the at least one capacitor device, which membranes each serve as an actuator electrode₂This second acceleration is graphically represented by means of the ordinate of the diagram of fig. 2 c. (the abscissa of the diagram of fig. 2c is again the time axis t.)

For example, at time t₀And t₀+Δt_iWith a natural oscillation period duration t in between_resBy half of the "ideal" time offset t_res/2. Thus, the second acceleration a₂Counteracting the first acceleration a in antiphase₁. The second voltage level is thus caused from the point in time t₀+Δt_iHaving a natural oscillation period duration t of at least one capacitor device of a capacitive arrangement_resBy means of the first voltage stage at a time t₀And (4) excitation.

In the schematic illustration of fig. 2d, the abscissa is the time axis t, while the ordinate shows the time t from the time t of the films of the at least one capacitor device, which films each serve as an actuator electrode, from their respective rest position (Ruhestellung)₀Integral of acceleration a (t) — (t) dt. Based on the schematic diagram of fig. 2d, it can be seen that the corresponding film of at least one capacitor device has elapsed time t₀+Δt_iTo start (substantially) remain stationary.

The "suppression" principle described in the preceding two paragraphs works accordingly when the respective voltage pulses of the pulsed read-out signal are switched on three or more levels. Even if the respective voltage pulses are switched by means of at least three voltage stages which are switched on one after the other, for example, the (latest) self-assembly of the membrane of at least one capacitor device of the capacitive system, which membrane serves in each case as an actuator electrodeOn time t_totalIt also remains (substantially) stationary. The advantageous "suppression" already exists after a relatively short decay time which is (almost) equal to the total on-time t_total. The short decay time reduces the noise of the capacitive device which is operated in pulsed mode by means of the pulsed read signal.

Preferably, the n voltage levels of the respective voltage pulses each have the same voltage level height Δ V_i＝V_pulsAnd/n. Such a method for switching on n voltage levels of a respective voltage pulse leads to at least one capacitor device of a capacitive system having a natural oscillation period duration t_resParticularly advantageous "damping" of natural oscillations.

When the respective voltage pulses of the pulsed read signal are switched on for three or more stages, the n voltage stages are switched on for the total time t of the respective voltage pulses of the pulsed read signal_totalAlso preferably distributed as equidistantly as possible. The uniform distribution of the n voltage levels additionally improves the duration t of the natural oscillation period of at least one capacitor device of the capacitive system_resAdvantageous "suppression" of natural oscillations. In particular, when the respective voltage pulses of the pulsed read-out signal are switched on for three or more levels, for at least two time offsets Δ t between the voltage levels_iAll of (a) may apply: Δ t_i＝t_total/(n-1)。

Having a natural oscillation period duration t of at least one capacitor device of a capacitive system_resThe "suppression" of natural oscillations that can be induced by means of the method described herein prevents noise/transient noise from occurring on the electrical response signal read out by the at least one capacitor device of the capacitive device. The implementation of the method described here therefore also facilitates the evaluation of the response signal of the capacitive device. Furthermore, the noise-free/transient noise-free nature of the response signal obtained when implementing the method described herein helps to improve accuracy and/or reduce the risk of errors when determining at least one measurement value based on the response signal. Preferably, after all n voltage levels have been applied, i.e. after the total switching-on of the respective voltage pulses of the pulsed read-out signalTime t_totalThe read-out signal is detected only afterwards.

Subsequent pullback/reduction of the voltage switched on to the read signal channel of the respective voltage pulse of the pulsed read signal may also be at n_eA voltage step-down process which is offset in time from one another, where n_eIs a natural number of 2 or more. In addition, a time offset Δ te can be maintained between two voltage steps that are carried out one after the other in each case_iSo that for at least one time offset Δ te between voltage degradations_iThe equation (equation 5) applies, where:

wherein m is_eIs a natural number equal to or greater than zero. n is_eEach voltage step-down can have a voltage step-down height Δ Ve_iWherein in this case for n_eVoltage degradation height Δ Ve of individual voltage degradation_iAnd the equation (equation 6) applies:

preferably, n_eEach voltage degradation has the same voltage degradation height Deltave_i＝V_pulsAnd/n. The total on-time te of the respective voltage pulse of the pulsed read signal on the read signal channel is thus_totalCalculated according to equation (equation 7), where:

n is withdrawn/reduced in three or more steps in the case of a voltage, switched on to the read signal channel, of the respective voltage pulse of the pulsed read signal_eEach voltage step-down is also preferably at the total on-time te of the corresponding voltage pulse_totalDistributed as equidistantly as possible. In particular canTo apply: delta te_i＝t_total/(n_e-1)。

If the withdrawal/reduction of the corresponding voltage pulse of the pulsed read-out signal is at the point in time te₀Initially, then, according to equation (EQUATION 8), for the voltage V (t) currently turned on to the sense signal path (where te)₀<t<te₀+te_total) The method is applicable to the following steps:

wherein j is n or less_eThe maximum natural number of (d) for j applies:

the method described here for the withdrawal/reduction of the respective voltage pulses of the pulsed read signal also leads to at least one capacitor device of the capacitive arrangement having a natural oscillation period duration t_resParticularly advantageous "damping" of natural oscillations.

Fig. 3a and 3b show a schematic partial view and an overall view of an embodiment of a read signal generator or a capacitive device cooperating therewith.

The read signal generator 10 schematically shown in fig. 3a may also be referred to as the excitation signal generator of the capacitive device 12. The read signal generator 10 may be part of a capacitive device 12. However, the readout signal generator 10 can also be installed separately from the capacitive device 12 with which it interacts.

The read signal generator 10 has at least one voltage signal generating device 14, which can be controlled by means of a clock generator 16. The clock generator 16 may be the read signal generator itself or the clock generator 16 external to the read signal generator. The voltage signal generating device 14 can be controlled by means of the clock generator 16 in such a way that the voltage signal generating device 14 will have a pulse frequency t predetermined by the clock generator 16_varTo a read signal generator 10The signal path 17 is read. At least one capacitor device C of the capacitive arrangement 12, which is directly or indirectly electrically connected to the readout signal path 17_senseAnd C_refReadout can be done by means of a pulsed readout signal. However, at least one capacitor device C_senseAnd C_refAlso has a natural oscillation period of duration t_resNatural oscillation of (a). Duration t of natural oscillation period_resIn particular, at least one capacitor device C is to be understood_senseAnd C_refThe natural oscillation period duration of the fundamental mode of natural oscillation.

The voltage signal generating means 14 are designed to switch each voltage pulse of the pulsed read signal on to the read signal channel 17 at n voltage levels offset in time from one another, where n is a natural number greater than or equal to 2. In addition, the voltage signal generating device 14 is designed to maintain a time offset Δ t between two voltage levels that are switched on one after the other_iWherein for at least one time offset Δ t between voltage levels_iThe equation (equation 1) already cited above applies, where:

wherein m is a natural number equal to or greater than zero.

Therefore, the readout signal generator 10 described herein also causes at least one capacitor means C of the capacitive device 12_senseAnd C_refHas a natural oscillation period duration t_res"damping" of natural oscillations. Thus, compared to the prior art, by at least one capacitor device C_senseAnd C_refThe read response signal is also significantly less noisy. The capacitive device 12 provides a particularly low noise response signal due to the use of the readout signal generator 10 described herein. When using the read signal generator 10, no further measures have to be taken for suppressing the transient noise of the response signal. Since a low-noise signal evaluation can be achieved using the readout signal generator 10, a low-cost and low-complexity signal evaluation can be usedThe spatial evaluation devices 18 to 22 evaluate the respectively determined response signals of the capacitive system 12.

The voltage signal generating device 14 can also be constructed cost-effectively and with low installation space requirements. For example, the voltage signal generating device 14 may comprise n stages, which can be activated at a time offset from one another in such a way that each of the n stages respectively switches one of the n voltage stages of the voltage pulse of the pulsed read signal on to the read signal channel 17.

In general, the maximum pulse intensity V can be defined for each voltage pulse of the pulsed read-out signal_pulsWherein the voltage signal generating means 14 are designed to generate voltage pulses having respectively the same or different voltage step heights Δ V_iAre switched on to the readout signal path 17 in such a way that the equation (equation 2) already listed above applies, wherein:

preferably, the voltage signal generating means 14 are designed to generate voltage pulses having respectively the same voltage step height Δ V_i＝V_pulsN voltage levels of/n are switched on to the sense signal path 17. The method described here additionally facilitates at least one capacitor device C of the capacitive arrangement 12_senseAnd C_refHas a natural oscillation period duration t_res"damping" of natural oscillations.

The capacitive device 12 may comprise at least two capacitor means C_senseAnd C_refAs at least one capacitor device C thereof_senseAnd C_ref. Preferably, at least two capacitor means C_senseAnd C_refRespectively, have natural oscillations with the same natural oscillation period duration tres. At least two capacitor devices C_senseAnd C_refCan also be interconnected to each other in the form of wheatstone bridges 24a and 24b (see fig. 3 b). Furthermore, at least two capacitor devices C_senseAnd C_refMay be at least one measurementCapacitor device C_senseAnd at least one reference capacitor device C_ref. At least one measuring capacitor device C_senseAt least one of the two electrode parts thereof can be used as a pair by means of a corresponding measuring capacitor device C_senseThe response of the measured variable to be determined is deformed and/or adjusted in such a way that it is applied to the measuring capacitor device C_senseThe capacitance between the two electrode parts changes. On the contrary, in at least one reference capacitor device C_refIn the case of (substantially) inhibiting the deformation or adjustment of its two electrode components as a response to the respective measured c-parameter.

The capacitive device 12 may be a capacitive pressure sensor, a capacitive acceleration sensor, a capacitive speed sensor or a microphone. In the embodiment of fig. 3a and 3b, the capacitive device 12 is merely exemplary of a capacitive pressure sensor having two wheatstone bridges 24a and 24b, wherein each of the two wheatstone bridges 24a and 24b has two measuring capacitor devices C each_senseAnd two reference capacitor devices C each_ref. (As an extension, for the capacitor device C shown in FIG. 3b_senseAnd C_refA plurality of capacitor devices C connected in parallel may also be provided_senseAnd C_refIntegrated (eingebunden) into two wheatstone bridges 24a and 24 b. ) Measuring capacitor device C_senseEach having a membrane serving as an actuator electrode, which membrane can be recessed into and/or raised out of a reference pressure chamber as a result of the pressure prevailing on its outer surface, wherein the measuring capacitor device C_senseIs arranged such that a pressure-dependent capacitance is applied to the measuring capacitor means C_senseBetween each membrane and its associated counter electrode. Conversely, the reference capacitor device C_refThe "fixed capacitance" is designed in such a way that the capacitance applied between its membrane and the associated counter electrode is (substantially) independent of the pressure.

During readout of the two wheatstone bridges 24a and 24b by means of the readout signal generator 10, the signals of the two wheatstone bridges 24a and 24b may be added to form a response signal. The signal amplifier 18 may amplify the response signal. The amplified response signal may then be converted to a digital signal by means of the ADC converter 20. The filter 22 may average the digital signal over a number of pulses.

As an advantageous embodiment, the voltage signal generating device 14 can also be designed to generate n_eEach voltage pulse of the pulsed read-out signal is reduced by voltage degradation which is offset in time from one another, where n_eIs a natural number greater than or equal to 2, wherein a time offset Δ te exists between two voltage steps that are carried out one after the other_iFor at least one time offset Δ te between voltage degradations_iThe above-mentioned equations (equation 5) apply, respectively, wherein:

wherein m is_eIs a natural number equal to or greater than zero. Thus, at least one capacitor device C of the capacitive arrangement 12 can also be caused when a corresponding voltage pulse of the pulsed read-out signal is withdrawn/reduced_senseAnd C_refHas a natural oscillation period duration t_resAdvantageous "suppression" of natural oscillations.

The read-out signal generator 10/its voltage signal generating device 14 can also be designed to carry out further method steps of the above-described method steps. A repeated description of these method steps is omitted here.