Nanowire light emitting switch device and method thereof

文档序号:246673 发布日期:2021-11-12 浏览:45次 中文

阅读说明:本技术 纳米线发光开关装置及其方法 (Nanowire light emitting switch device and method thereof ) 是由 马修·哈滕斯维尔德 张菁 于 2019-08-22 设计创作,主要内容包括:一种纳米线系统包括衬底和至少一个纳米线结构,所述至少一个纳米线结构沿着轴从所述衬底的表面向外延伸。所述纳米线结构包括发光二极管和装置驱动器,所述装置驱动器被电耦合以控制所述发光二极管的操作状态。所述发光二极管与所述装置驱动器被集成以彼此共用至少一个掺杂区。(A nanowire system includes a substrate and at least one nanowire structure extending outwardly from a surface of the substrate along an axis. The nanowire structure includes a light emitting diode and a device driver electrically coupled to control an operational state of the light emitting diode. The light emitting diode and the device driver are integrated to share at least one doped region with each other.)

1. A nanowire system, comprising:

a substrate;

at least one nanowire structure extending outwardly from a surface of the substrate along an axis, the nanowire structure comprising:

a light emitting diode;

a device driver electrically coupled to control an operational state of the light emitting diode, wherein the light emitting diode and the device driver are integrated to share at least one doped region with each other.

2. The system of claim 1, wherein the common at least one doped region comprises a GaN layer including a cathode region of the light emitting diode and a drain region of the device driver.

3. The system of claim 2, wherein the light emitting diode further comprises an anode region electrically coupled to the GaN layer comprising the cathode region, and the device driver comprises a channel region electrically coupled between a source region and the GaN layer comprising the drain region.

4. The system of claim 3, wherein the source region and the channel region each comprise another GaN layer.

5. The system of claim 2, wherein the cathode region of the light emitting diode and the drain region of the device driver share a common external connection.

6. The system of claim 3, further comprising a gate metal layer electrically coupled to at least a portion of a perimeter of the channel region of the device driver.

7. The system of claim 1, wherein the at least one nanowire structure comprises two or more nanowire structures, and the source region of each of the device drivers is a common source region.

8. The system of claim 7, further comprising a gate metal layer electrically coupled with channel regions of two or more nanowire structures.

9. The system of claim 8, further comprising a transparent conductive film layer electrically coupling a plurality of adjacent nanowire structures together.

10. The system of claim 9, wherein the plurality of adjacent nanowire structures are electrically coupled through the transparent conductive film layer and the gate metal layer.

11. The system of claim 1, wherein the at least one nanowire structure has a maximum cross-sectional dimension of less than about 10 microns.

12. The system of claim 1, wherein the at least one nanowire structure has a maximum cross-sectional dimension of less than about 3 microns.

13. The system of claim 1, further comprising a Ni-based metal drain contact layer and a Ti-based metal layer adjacent to and electrically connected to a source region.

14. The system of claim 1, wherein the light emitting diode further comprises one or more layers of material that alter spectral emission over a light emitting portion of the LED.

15. The system of claim 14, wherein the one or more layers comprise a color converter.

16. A method of fabricating a nanowire system, the method comprising:

providing a substrate;

forming at least one nanowire structure extending outwardly from a surface of the substrate along an axis, the nanowire structure comprising:

a light emitting diode;

a device driver electrically coupled to control an operational state of the light emitting diode, wherein the light emitting diode and the device driver are integrated to share at least one doped region with each other.

17. The method of claim 16, wherein the common at least one doped region comprises a GaN layer comprising a cathode region of the light emitting diode and a drain region of the device driver.

18. The method of claim 17, wherein the light emitting diode further comprises an anode region electrically coupled to the GaN layer comprising the cathode region, and the device driver comprises a channel region electrically coupled between a source region and the GaN layer comprising the drain region.

19. The method of claim 18, wherein the source region and the channel region each comprise another GaN layer.

20. The method of claim 17, wherein the cathode region of the light emitting diode and the drain region of the device driver share a common external connection.

21. The method of claim 18, further comprising forming a gate metal layer electrically coupled to at least a portion of a perimeter of the channel region of the device driver.

22. The method of claim 16, wherein the forming the at least one nanowire structure further comprises forming two or more of the nanowire structures, and the source region of each of the device drivers is a common source region.

23. The method of claim 22, further comprising forming a gate metal layer electrically coupled to channel regions of two or more nanowire structures.

24. The system of claim 23, further comprising forming a transparent conductive film layer that electrically couples the plurality of nanowire structures together.

25. The method of claim 24, wherein the plurality of adjacent nanowire structures are electrically coupled through the transparent conductive film layer and the gate metal layer.

26. The method of claim 16, wherein the at least one nanowire structure has a maximum cross-sectional dimension of less than about 10 microns.

27. The method of claim 16, wherein the at least one nanowire structure has a maximum cross-sectional dimension of less than about 3 microns.

28. The method of claim 16, further comprising forming a Ni-based metal drain contact layer and a Ti-based metal layer adjacent to and electrically connected to a source region.

29. The method of claim 16, further comprising forming one or more layers of material on the light emitting portion of the LED that alter spectral emission.

30. The method of claim 30, wherein the one or more layers comprise a color converter.

Technical Field

This technology relates generally to nanowire structures, and more particularly to nanowire light emitting switching devices and methods thereof.

Background

Current display resolutions have reached their practical limits. In order to achieve the improvement in pixel density and resolution, the size of a Thin Film Transistor (TFT) included in a display must be further reduced.

Thus, the future of display technologies may be nanowire Light Emitting Diodes (LEDs), which are sought after for higher efficiency (70% versus 5-7%), higher reliability, and the potential to provide higher pixel densities. With respect to reliability, nanowire LEDs are better able to withstand long term operation and higher temperatures than other currently available technologies due to the materials from which they can be fabricated. However, with respect to higher pixel densities, there has been no easy way to tightly integrate nanowire LEDs with transistors (switches) that turn the nanowire LEDs "on" or "off. Currently available methods to address this issue sacrifice LED area as well as device performance, thus limiting potential applications.

In particular, previous work to combine transistors with LEDs has relied on methods to reduce LED performance, consume area, and increase cost. These methods include a variety of methods, such as dedicating a region for lateral growth of another material to produce a High Electron Mobility Transistor (HEMT). Unfortunately, this process results in degraded LED performance and occupies an undesirable portion of the total device area.

Another approach has been to try to grow on silicon in combination with CMOS transistors. Unfortunately, due to material mismatch, growth on silicon may create defects in the LED, thereby correspondingly reducing performance. In addition, this method still has difficulty managing temperature variations and still consumes excessive area.

Another approach has attempted flip chip bonding with LEDs on silicon. By this method, LEDs are fabricated individually, cut individually, and then mounted on top of a silicon wafer to combine them with CMOS transistors on silicon. Unfortunately, this approach has reliability problems caused by the hundreds of individual LEDs that need to be connected together and the inability of the prior art to scale down.

Disclosure of Invention

A nanowire system includes a substrate and at least one nanowire structure extending outwardly from a surface of the substrate along an axis. The nanowire structure includes a light emitting diode and a device driver electrically coupled to control an operational state of the light emitting diode. The light emitting diode and the device driver are integrated to share at least one doped region with each other.

A method of fabricating a nanowire system includes providing a substrate and forming at least one nanowire structure extending outwardly from a surface of the substrate along an axis. The nanowire structure includes a light emitting diode and a device driver electrically coupled to control an operational state of the light emitting diode. The light emitting diode and the device driver are integrated to share at least one doped region with each other.

Such techniques provide a number of advantages, including providing one or more energy-efficient and reliable nanowire light-emitting switching devices whose uniaxial orientation and integrated common layer structure enable easy fabrication of high pixel density arrays. In particular, examples of the claimed technology use GaN, which is a common material in the light emitting layer of an LED structure, but is not common in the layers of transistors that turn the LED structure on and off, in a novel manner. With these GaN-based examples of nanowire light emitting switching devices, energy efficiencies of up to about 70% may be obtained, compared to energy efficiencies of about 5-7% found in the prior art. These energy efficiency gains can greatly reduce power consumption and thus greatly extend battery life. Furthermore, these and other examples of nanowire light emitting switching devices enable pixel cross-sections in the low single digit micron range and potentially achieve higher resolution, thereby making display resolution orders of magnitude larger than existing displays.

Additionally, examples of the claimed technology enable a true monolithic nanowire light emitting switching device using a single semiconductor material system. The unique structure of such nanowire light emitting switching devices (sharing at least one layer between the LED and the device driver) has fewer layers than existing LED structures that require multiple layers and space-consuming layouts. In addition, these examples of the claimed technology make the manufacturing process much simpler than that required for multi-material LEDs, have fewer steps, and enable all functional layers of the LED and active device driver to be formed to complete the nanowire light emitting switching device or array before performing the etching step and before adding the source metal layer, gate metal layer, drain metal layer and insulating layer.

Furthermore, the claimed technology has other advantages over the prior art. For example, the prior art requires the use of not only multiple layers, but also multiple materials in the light emitting layer and FET layers of the LED, plus a large number of metal layers, which increases processing costs. In sharp contrast, an example of the claimed technology may rely on one material system, in this example GaN, for the light emitting layer and the FET layer, and have only three associated metal or other conductive layers. Utilizing the example of the claimed technology eliminates the need for additional layers and different materials for existing multi-material systems, thereby greatly simplifying the design and thus reducing manufacturing costs and time. In addition, examples of the claimed technology give the opportunity to achieve higher yields and 100 times higher resolution than the prior art.

Drawings

Figure 1A is a cross-sectional view of an example of a nanowire array system having a plurality of nanowire light emitting switching devices;

figure 1B is a partial cross-sectional view and partial perspective view of a portion of the nanowire array system shown in figure 1A;

FIG. 1C is a perspective view of an example of one of the nanowire light emitting switch devices shown in FIGS. 1A-1B;

fig. 2A-2F are perspective views of an example of a method of fabricating an example of a nanowire array system;

figure 3 is a cross-sectional view of another example of a nanowire array system illustrating another fabrication technique; and

figure 4 is a cross-sectional view of yet another example of a nanowire array system illustrating yet another fabrication technique.

Detailed Description

Examples of nanowire array systems 20(1) are shown in fig. 1A-1C. The nanowire array system 20(1) includes a plurality of spaced-apart nanowire light emitting switching devices 11, conductive layers 12, 13, and 14, insulating layer 16, and substrate 17, but the system may include other types and/or numbers of systems, devices, components, layers, regions, or other elements in other configurations. Such techniques provide a number of advantages, including providing one or more energy-efficient and reliable nanowire light-emitting switching devices whose uniaxially-oriented and integrated common layer structures enable easy fabrication of high pixel density arrays.

Referring more particularly to FIGS. 1A-1B, in this example of the nanowire array system 20(1), the substrate 17 comprises Al2O3(sapphire) layer, but other types and/or numbers of substrates may be used, such as, for example only, a SiC (silicon carbide) substrate or a silicon (Si) substrate.

Conductive layers 12, 13, and 14 each comprise a metal layer, but each of the conductive layers may comprise other types and/or numbers of conductive layers and/or other materials. In this example, the conductive layer 12 forms a drain contact layer on one end of each of the spaced-apart nanowire light emitting switching devices 11, although other types and/or numbers of conductive layers in other configurations may be used. Further, in this example, the conductive layer 13 forms a source contact layer located near the other end of each of the spaced-apart nanowire light-emitting switching devices 11, although other types and/or numbers of conductive layers in other configurations may be used. Additionally, in this example, the conductive layer 14 forms a gate metal contact layer located around at least a portion of the channel region 7 of each of the spaced-apart nanowire light emitting switching devices 11, although other types and/or numbers of conductive layers in other configurations may be used.

The Transparent Conductive Film (TCF)15 includes another conductive layer that may be formed to couple together one or more conductive layers 12 of one or more spaced-apart nanowire light-emitting switching devices 11, although other types and/or numbers of conductive layers in other configurations may be used. As shown in the cross-sectional view in fig. 1A, the spaced-apart nanowire light-emitting switching devices 11 may be coupled to three separate conductive layers 12 for the three nanowire light-emitting switching devices 11, for example, using a Transparent Conductive Film (TCF) 15.

The size, density, and brightness of the pixels in the pixel array formed by the spacing of the light emitting switching devices 11 (also referred to herein as nanowire structures or nanowires) in this example can also be varied by varying the widths of the conductive layers 14 and 15 to increase or decrease the number of light emitting switching devices 11 that can be used as a single display pixel. Fig. 1B shows an example of a plurality of light-emitting switching devices 11 sharing the conductive layer 14 and the conductive layer 15.

The transparent insulator 16 is located between the conductive layers 13 and 14 and between at least a portion of the conductive layers 13 and the Transparent Conductive Film (TCF)15 and a generally corresponding portion of each spaced nanowire light emitting switching device 11, although other types and/or numbers of insulating layers in other configurations may be used.

Referring more particularly to fig. 1A-1C, the spaced-apart nanowire light emitting switching devices 11 each include a Light Emitting Diode (LED) layer 8, 9, and 10 and a Field Effect Transistor (FET) or other device driver or switch that includes layers 6, 7, and 8, although each of the devices may include other types and/or numbers of other layers, regions, or other elements. In this example, the FETs are coupled to control the operating state of the LEDs in each nanowire light-emitting switching device 11, i.e., on or off in this example, although other types of drivers or switches may be used. Additionally, in this example, the LED and FET advantageously share a layer or other doped region 8 to help minimize lost space due to precious area occupied by previously positioning the device driver or switch in proximity to the LED. In addition, in this example, the LEDs and FETs are advantageously each configured to extend outwardly from the substrate 17 along a single axis to achieve a more compact, narrow design, thereby enabling closer spacing of the nanowire light emitting switching devices 11 such that higher resolution can be achieved, although other configurations can be used.

Each pixel fabricated from one or more light-emitting switching devices 11 may also have a brightness that is modulated by including a device driver, which in this example is a FET of the light-emitting switching device 11. The brightness level may be varied, for example, by electrically biasing conductive layer 14 and/or conductive layer 15.

Layer 6 of a Field Effect Transistor (FET) or other device driver or switch is a electron rich source region for the FET grown or otherwise formed on substrate 17, but other types of source regions may be used. In this particular example, layer 6 is an unintentionally doped (u-GaN) buffer layer, but other types of source regions may be used as well, such as, for example only, an n-type GaN layer. Due to O2And defect incorporation induced 1017cm-3-1020cm-3Is possible, the u-GaN buffer layer 6 functions as an electron-rich source region of the FET.

Layer 7 of a Field Effect Transistor (FET) or other device driver or switch is an electron-deficient channel region for the FET grown or otherwise formed on layer 6, but other types of channel regions may be used. In this particular example, layer 7 is a u-GaN layer thicker than source region 6, but other types of channel regions, such as a p-type GaN layer, may be used as well. This thicker u-GaN layer 7 can be used as an electron deficient channel region of a FET due to intrinsic nitrogen vacancies in the material, making the layer slightly n-type.

Layer 8 of a Field Effect Transistor (FET) or other device driver or switch is an electron rich drain region for the FET grown or otherwise formed on layer 7, but other types of source regions may be used. In this particular example, layer 8 is an n-type GaN layer, but other types of drain regions may be used as well. This layer 8 is shared between the FET and the LED of the nanowire light emitting switching device 11 and serves as the electron rich layer of the LED. In this particular example, the GaN layer for layer 8 includes the cathode region of the LED and the drain region of the FET or other device driver.

Layer 9 is a Multiple Quantum Well (MQW) region 9 having InGaN or AlGaN quantum wells and GaN or AlGaN barriers, for example, for LEDs to efficiently generate light, although other types of layers and/or wells and other barriers may be used. More specifically, in this example, light emission from the LED utilizes this layer 9, which is a Multiple Quantum Well (MQW) region in which an indium gallium nitride (InGaN) layer or an aluminum gallium nitride (AlGaN) layer is defined between GaN layers or AlGaN layers to trap electron-hole pairs for light generation. In other examples, one or more layers of other materials may be on layer 9 to modify the spectral emission. As another example, one or more of the additional layers may include a color converter.

Layer 10 is a p-GaN region 10 or anode region for an LED, but other types of regions and other configurations for the regions of the LED may be used as well. This layer 10 together with the layers 8 and 9 completes this example of an LED for each of the nanowire light emitting switching devices 11. Thus, in this example, the LED and FET are connected in series with the common layer 8, and the FET is able to switch the LED between "on" or "off" operating states.

As shown in the above examples, each layer of the FET and LED may advantageously be formed of the same material (e.g., GaN-based material), which reduces the amount of material required for fabrication, thereby providing the resulting efficiency. In addition, the GaN-based material in the LED light emitting area and the FETs (drivers or switches) is essentially transparent and, when combined with a series of one or more metals, can make the array system optically transparent. This optical transparency enables examples of such technologies to be used in many new applications, such as various different types of display technologies, including, for example, augmented reality displays. This optically transparent and uniaxially oriented structure for the nanowire light-emitting switching device 11 enables the creation of flexible display devices for wearable and otherwise curved electronic devices.

Referring to fig. 2A-2F, examples of methods of making examples of nanowire array systems are shown. As exemplified below, the fabrication of such an integrated LED-FET device may employ fabrication techniques readily available in the semiconductor industry, allowing such techniques to be readily employed. More specifically, examples of the claimed technology may utilize LED layers conventionally grown using widely commercially available Metal Organic Chemical Vapor Deposition (MOCVD) tools.

Referring more particularly to fig. 2A, an electron rich source layer or region 6, which again may be an unintentionally doped (u-GaN) buffer layer or n-type GaN layer in these examples, is first grown on a substrate 17. As mentioned above, due to O2And defect incorporation induced 1017cm-3-1020cm-3The u-GaN buffer layer can be used for high electron concentration of (2). In addition, in this example, the substrate 17 is Al2O3(sapphire), but other types of substrates, such as SiC (silicon carbide) substrates or silicon (Si) substrates, may be used.

Next, an electron-deficient channel layer or region 7, which may likewise be a u-GaN layer thicker than the layers or regions 6 or p-type GaN layers, is grown on the layer or region 6. Due to the intrinsic nitrogen vacancies in the material, a thicker u-GaN layer can be used as the electron deficient channel region 7, making the layer slightly n-type.

Next, an electron rich layer 8 is grown or otherwise formed on layer 7. The bottom electron-rich electrode region 6, the electron-deficient channel region 7, and the n-GaN drain region 8 produce the desired structure for this example of the FET of each of the nanowire light-emitting switching devices 11. This layer 8 is shared by the FET of this example of the nanowire light emitting switching device 11 and the LED, as described below.

Next, to form an LED comprising layers 8, 9 and 10 for this example of each nanowire light emitting switching device 11, a Multiple Quantum Well (MQW) region 9 having InGaN or AlGaN quantum wells and GaN or AlGaN barriers that efficiently generate light is formed on the common layer or region 8.

Next, for this example of each nanowire light-emitting switching device 11, a p-GaN region 10 is formed on a Multiple Quantum Well (MQW) region 9 for the LED of 10. Thus, in this example, the LED comprising layers 8, 9 and 10 and the FET comprising layers 6, 7 and 8 are connected in series with the common layer 8, and the FETs are coupled to enable the LED to be switched between "on" or "off" operating states. In this example, the common electron rich initiation layer also serves as both the cathode of the LED and the drain region of the FET for each nanowire light emitting switching device 11.

Next, the exposed surface of the p-GaN layer 10 may be patterned by a metal lift-off process to deposit Ni or other conductive material that serves as both an ohmic p-type GaN contact for the layer or region 12 and as a hard mask for the chlorine-based dry etch shown in fig. 2A-2B. Subsequently, the nanowire 11 may be at O2To create NiO for greater ohmic contact with the p-GaN layer or region 12.

Next, a chlorine-based dry etch may be used to selectively remove material to leave nanowire light emitting switching devices 11 that each extend outward from the substrate 17 along a single axis, as shown in fig. 2B.

Next, the Ti-based or other conductive material metallization is thermally evaporated, coating only the tips and the substrate of the nanowire light emitting switching devices 11, as shown in fig. 2C. An optional anneal may then be performed to grow TiN from the metal, further increasing the n-type properties of the u-GaN buffer layer or region 6.

After metal deposition, the transparent insulator 16 is then coated and etched back to expose everything above the upper boundary of the electron rich source region or layer 6, as shown in fig. 2D. The insulator 16 serves as a spacer for separating the metal or conductive layers 13 and 14 from each other.

Next, the metal line for the gate layer 14 is subsequently patterned by a lift-off process. A metal such as Ni is thermally evaporated and the top of the nanowire light emitting switching device 11 is coated with a conductive layer or wire 12 and an insulator 16 to form a layer 14 including a full wrap-around gate coupling with a u-GaN region as shown in fig. 2D. Thus, examples of the claimed technology may wrap a gate over at least a portion of the channel region or layer 7 of each nanowire light emitting switching device 11, which provides fast switching and reduces power consumption when in an "off" operating state.

Next, a more optically transparent insulator 16 may then be coated and etched back to expose only the tips of the wires 12. Lift-off may also be used to pattern lines of Transparent Conductive Film (TCF)15 to form top interconnects 15, as shown in fig. 2E.

As a final step, the insulator 16 may be selectively etched away to expose the buried metal or conductive layers 13 and 14 for external connection, as shown in fig. 2F.

Various alternative options may be used in each of these steps, such as using options for the gate metal or conductive layer 14 other than Ni (by way of example only). In other examples, gate insulators along the nanowire sides may alternatively be integrated. One of the advantages of this approach is that this layer-by-layer fabrication enables precise control and customization of the final design and layout. Another advantage is that this technique can take advantage of existing manufacturing methods, as previously described.

The device layout shown in this particular layout results in a cross design in order to selectively address individual nanowires 11 for display purposes. In this example, the source metal or conductive layer 13 is common to all nanowires, serving as a common ground connection, while the gate metal or conductive layer 14 and the drain metal or conductive layer 15 are alternately addressed in rows and columns.

An example of a method for operating one nanowire lighting switching device 11 in a nanowire array system will now be described with reference to fig. 1A-1C. When the gate layer 14 of the FET of the nanowire light-emitting switching device 11 is energized, electrons then flow from the source region 6, through the channel region 7, and into the common drain region 8, thereby bringing the FET and LED into an "on" operating state. Electrons flow from the common drain region 8 through the LED to recombine with holes in the MQW region 9 to produce light. The drain contact layer 8 forward biases the LEDs 8-10 in series with the FETs 6-8, allowing positive source-to-drain biasing for FET operation.

Referring to fig. 3, an alternative method of fabricating the nanowire luminescent switching device 11 in the nanowire array system 20(2) is shown. This method is the same as that illustrated and described with reference to fig. 2A-2F, except as otherwise illustrated or described herein. In this example, this fabrication method utilizes a bottom-up growth technique by using the insulating layer 16 for selective region growth. Selective area growth of the nanowire light emitting switching devices 11 may allow separate growth to occur to produce nanowire light emitting switching devices 11 that each emit a different color. The variation in the size of the openings of the insulating layer 16 may be used in a single growth process to produce a freshly grown nanowire light-emitting switching device 11 that emits different colors.

Referring to fig. 4, an alternative method of fabricating the nanowire luminescent switching device 11 in the nanowire array system 20(3) is shown. This method is the same as that illustrated and described with reference to fig. 2A-2F, except as otherwise illustrated or described herein. In this example, the MQW region 9 and p-type region 10 of the grown LED may be wound around a portion of the common n-GaN region 8, in this fabrication method.

As illustrated and described herein, examples of the claimed technology may be used for a variety of different types of applications. For example, the claimed technology may be used for a variety of different types of display technologies, from smart watches to televisions to telephones. The nanowire light-emitting switching devices 11 (each being an individual pixel) may advantageously be spaced apart to provide higher resolution.

In other examples, the claimed technology may be used in place of typical display technology due to the transparent nature discussed above. As a result, examples of the claimed technology are very effective in creating heads-up display technology. Additionally, by way of further example, current heads-up displays rely on bulky projectors, wherein examples of such claimed technology would obviate such a need. A display made by this example of the claimed technology would itself be a clear eyepiece without the need for any projector.

In other examples, the nanowire nature of the nanowire light emitting switching devices 11 allows flexibility, which opens up other opportunities related to flexible displays. In particular, the wire structure of the nanowire light emitting switching devices 11 allows them to withstand the stresses of flexing and mechanical movement.

Having thus described the basic concepts of the invention, it will be apparent to those skilled in the art that the foregoing detailed disclosure is intended to be presented by way of example only, and not by way of limitation. Various alterations, improvements, and modifications will occur and are intended to those skilled in the art, though not expressly stated herein. Such alterations, improvements, and modifications are intended to be suggested hereby, and are within the spirit and scope of the invention. Additionally, the recited order of processing elements or sequences, or the use of numbers, letters, or other designations therefor, is not intended to limit the claimed processes to any order except as may be specified in the claims. Accordingly, the invention is not to be restricted except in light of the following claims and their equivalents.

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