阅读说明：本技术 一种振荡器异常状态检测电路 (Oscillator abnormal state detection circuit ) 是由 刘戬 于 2020-10-29 设计创作，主要内容包括：本发明提出一种振荡器异常状态检测电路,用以检测系统中的待测振荡器的异常状态。振荡器异常状态检测电路基于基准振荡器及系统时钟,通过各独立时钟间的计数比较,进行目标振荡器异常状态检测。本专利中阐述的方法,可以有效处理各独立时钟间的异步时钟问题,控制检测精度,快速获得检测结果。(The invention provides an abnormal state detection circuit of an oscillator, which is used for detecting the abnormal state of the oscillator to be detected in a system. The oscillator abnormal state detection circuit detects an abnormal state of a target oscillator by count comparison between independent clocks based on a reference oscillator and a system clock. The method set forth in the patent can effectively process the asynchronous clock problem among independent clocks, control the detection precision and quickly obtain the detection result.)

1. An oscillator abnormal state detection circuit, comprising a system clock (110) for making a result decision, a reference oscillator (120) for serving as a comparison reference, two counting units (130) for counting oscillation frequencies, a cross synchronization unit (140) for processing independent asynchronous oscillation signals, a decision unit (150) for making a result decision, and a count threshold unit (160) for adjusting detection accuracy, wherein: the final decision result is logically decided by a decision unit (150) to obtain a result output signal. The system clock (110) is connected with the decision unit (150) and outputs clock signals, the reference oscillator (120) and the oscillator to be tested are respectively connected with the two counting units (130) and outputs counting frequency signals, counting results of the two counting units (130) are connected with the cross synchronization unit (140) and output counting completion signals, and meanwhile, counting values of the two counting units (130), synchronous control signals of the cross synchronization unit (140) and counting threshold values of the counting threshold value unit (160) are connected with the decision unit (150) and output to the decision unit (150) together for decision.

2. The abnormal state detection circuit of the oscillator as claimed in claim 1, wherein the two counting units (130) are configured to count down the count values in the threshold unit (160) and then count down the clocks output by the reference oscillator (120) and the oscillator to be tested independently, the count down signal generated after the count down is 0 is synchronized to the clock domain of the counter oscillator through the cross synchronization unit (140) for stopping the count down of the counter counting unit, the remaining value of the incomplete counting unit is the count difference value of the oscillator to be tested and the reference oscillator, and the decision unit (150) makes a decision after any one counting unit generates the count down signal to obtain the count difference value of the oscillator to be tested and the reference oscillator.

3. The abnormal state detection circuit of oscillator as claimed in claim 1, wherein the output result of the decision unit (150) is not limited to the count difference but may be the frequency difference since the frequency difference can be calculated from the count difference between the oscillator to be measured and the reference oscillator.

4. The abnormal state detection circuit of oscillator as claimed in claim 1, wherein said reference oscillator (120) is a comparison reference for the frequency detection of the oscillator under test, the frequency accuracy of which determines the accuracy of the frequency detection of the oscillator under test, the frequency of the reference oscillator being the same as the expected frequency of the oscillator under test.

5. The abnormal state detection circuit of oscillator as claimed in claim 1, wherein said counting unit (130) is a counter, two counters are used, and are used for counting the output clocks of the oscillator to be measured and the reference oscillator respectively, the counting mode is a down counting mode, the counting initial value of the counting unit is from the counting threshold unit (160), and the two counting units are configured with the same counting initial value.

6. An oscillator abnormal state detection circuit as claimed in claim 1, characterized in that the system clock (110) is used to convert the count difference into a system clock domain signal in a decision unit (150) and as an operation clock of the result decision circuit so that the system can use the result of the oscillator abnormal state detection circuit, and the decision circuit (150) is used to decide the detection result of the oscillator under test and generate the detection result output.

7. The abnormal state detection circuit of the oscillator according to claim 1, wherein the system clock (110) is used for judging the abnormal state that neither the oscillator to be tested nor the reference oscillator starts oscillating after counting n cycles through the decision unit (150). Where n is (system clock frequency/reference oscillator frequency) count threshold.

8. The abnormal state detection circuit of an oscillator according to claim 1, wherein the cross synchronization unit (140) is a synchronization circuit for synchronizing the count completion signal of the oscillator under test to the clock domain of the reference oscillator and a synchronization circuit for synchronizing the count completion signal of the reference oscillator to the clock domain of the oscillator under test, and the synchronization result is used to stop the output clock of the corresponding oscillator to count down and to send the residual value of the counter after the stop to the decision unit (150).

9. The abnormal state detection circuit of an oscillator according to claim 1, wherein said count threshold unit (160) is capable of setting a count threshold for adjusting the resolution of the detection circuit. When the clock frequency deviation of the oscillator to be measured and the reference oscillator is required to be m%, the set value of the counting threshold unit should be greater than 100/m.

Technical Field

The invention relates to a digital circuit design technology and an information security technology, in particular to a circuit for improving the security and the reliability of a sensitive circuit.

Background

In the design of a safety chip, high requirements are put on the stability and reliability of a chip working oscillator. The oscillator circuit plays a crucial role for the proper functioning of the basic and safety functions of the chip. However, in the production, processing and use processes, the oscillator is usually interfered by objective factors such as process deviation and working environment, and artificial subjective factors such as fault injection attack, so that the oscillator is abnormal in working, and the oscillation frequency has a larger deviation compared with an expected value, and even cannot start oscillation at all. Under the condition, the oscillator detection circuit finds and alarms the abnormal condition, so that the normal and safe work of the safety chip can be effectively ensured.

The oscillator abnormity detection circuit provided by the invention has the detection effect on the working frequency of the oscillator, is little interfered by environmental factors, has the detection function of a non-oscillation starting state, and is an effective oscillator abnormity detection circuit.

Disclosure of Invention

The patent provides a detection circuitry for detecting oscillator abnormal operation state, including the system clock that is used for carrying out the result judgement, be used for as the reference oscillator of comparison benchmark, be used for counting oscillation frequency's counter, be used for handling the cross synchronization unit of independent asynchronous oscillation signal, be used for carrying out the judgement unit of result judgement and be used for adjusting the count threshold value unit that detects the precision. And the final judgment result is subjected to logic judgment through a judgment unit to obtain a result output signal. And calculating a frequency difference value according to the counting difference value of the oscillator to be measured and the reference oscillator, so that the output result of the judgment unit is not limited to the counting difference value and can also be the frequency difference value. The judging unit can also judge the abnormal state and is used for judging the abnormal state that the oscillator to be tested and the reference oscillator do not start oscillation through the judging unit (150) after the system clock (110) counts n periods. Where n is (system clock frequency/reference oscillator frequency) count threshold. And detecting the working state of the oscillator to be detected by using the reference oscillator and the system clock, and outputting a detection result after a period of time. According to the precision requirement of the detection result, the detection precision of the detection circuit can be adjusted by setting the numerical value of the counting threshold unit. Meanwhile, the reference oscillator (120) is a comparison reference for detecting the frequency of the oscillator to be detected, the frequency precision of the reference oscillator determines the precision of the frequency detection of the oscillator to be detected, and the frequency of the reference oscillator is the same as the expected frequency of the oscillator to be detected. The counting units (130) are counters, two of the counters are used in total, the counters are used for counting the output clocks of the oscillator to be measured and the reference oscillator respectively, the counting mode is counting reduction, the counting initial value of the counting units is from the counting threshold unit (160), and the two counting units are configured to be the same counting initial value. The cross synchronous circuit solves the problem of signal transmission among asynchronous clocks among the oscillator to be detected, the reference oscillator and the system clock which are mutually independent, controls the technical deviation caused by the signal synchronization among the asynchronous clocks within a certain range, and further ensures the detection precision. The cross synchronization unit (140) is a synchronization circuit for synchronizing the counting completion signal of the oscillator to be tested to the clock domain of the reference oscillator and a synchronization circuit for synchronizing the counting completion signal of the reference oscillator to the clock domain of the oscillator to be tested, the synchronization result is used for stopping the output clock of the corresponding oscillator to count down, and the residual value of the counter after stopping is sent to the judgment unit (150). The counting unit adopts a counting mode of counting reduction, once counting reduction of any counting unit is completed, a counting difference value can be immediately obtained by observing the residual value of another counting unit, a difference value calculation process is omitted, and detection efficiency is guaranteed. Meanwhile, a count threshold unit (160) may set a count threshold for adjusting the resolution of the detection circuit. When the clock frequency deviation of the oscillator to be measured and the reference oscillator is required to be m%, the set value of the counting threshold unit should be greater than 100/m.

The invention can be closed after the detection is finished, and the detection is started when needed, thereby effectively reducing the power consumption.

The invention can detect the abnormity through the system clock under the abnormal state that the oscillator to be detected and the reference oscillator do not start oscillation. The system clock is assumed not to have a non-oscillation phenomenon, otherwise the system in which the invention is located cannot work as a whole.

The invention is suitable for various security chips, smart card chips, MCU and the like. The oscillator detection circuit can also be used as an oscillator detection circuit in functional modules such as a random number module and a physical unclonable circuit module which comprise high-precision oscillators.

The invention is suitable for any high-performance application requiring high security and high reliability, and covers wireless communication, mobile commerce, electronic commerce, bank finance, secure network access and the like.

Drawings

FIG. 1 shows an embodiment of the circuit arrangement according to the invention operating according to the method of the invention

Detailed Description

In the security chip, the circuit according to the invention is an oscillator anomaly detection circuit, fig. 1 is a circuit arrangement according to the invention,

the detection circuit device includes:

a system clock 110 for providing an operating clock for the decision unit 150.

A reference oscillator 120 as a comparison reference oscillator of the oscillator under test, the frequency of the reference oscillator being the same as the expected frequency of the oscillator under test.

A counting unit 130, configured to perform clock counting on the oscillator under test and the reference oscillator, and adopt a count-down method to facilitate efficient statistics of obtaining a clock count difference between the two oscillators.

A cross-synchronization unit 140 for handling asynchronous inter-clock signaling between the oscillator under test, the reference oscillator and the system clock independently of each other.

A decision unit 150 for deciding the detection result of the oscillator under test and generating a detection result output.

A count threshold unit 160, configured to set a count-down initial value of the count unit as a count threshold, and achieve the purpose of adjusting the accuracy of the oscillator abnormality detection circuit by setting the size of the count threshold.

In the safety chip, the output of the oscillator to be tested is connected to an oscillator abnormal state detection circuit (100), and the judgment result of whether the working frequency of the oscillator to be tested is abnormal or not is obtained by performing clock counting comparison with the output clock of a reference oscillator (120) in the detection circuit. In the decision unit (150), the system clock (110) is used both to provide the operating clock of the decision unit and to monitor the operation of the reference oscillator. In general, as long as the reference oscillator can start oscillation normally, the oscillator to be detected can be accurately detected by comparing the count value of the clock. Therefore, the system clock only monitors the abnormal condition that the oscillator to be tested and the reference oscillator cannot start oscillation, and under the condition, the judgment circuit directly judges the detection result as the abnormal condition of the oscillator through the counting overtime of the system clock. When the abnormal situation that the oscillator to be detected and the reference oscillator cannot start oscillation does not occur, the judging unit (150) judges the clock counting difference value of the two counting units (130) output by the cross synchronization unit (140) to obtain the frequency speed relative relation of the oscillator to be detected and the reference oscillator, so that the frequency abnormality detection result of the oscillator to be detected is obtained, and the detection result is output.