Display device

文档序号:973341 发布日期:2020-11-03 浏览:2次 中文

阅读说明:本技术 显示装置 (Display device ) 是由 朴埈亨 洪钟昊 朱惠珍 于 2020-04-29 设计创作,主要内容包括:提供了一种显示装置。所述显示装置包括:第一岛,包括设置在基底上的第一显示元件;第二岛,包括设置在基底上的第二显示元件,并且与第一岛间隔开;多个连接部分,将第一岛连接到第二岛;贯通部分,形成在多个连接部分之间,并且穿透基底;以及封装层,密封第一岛和第二岛,并且包括第一无机封装层和第二无机封装层。第一岛的封装层还包括有机封装层,而第二岛的封装层不包括有机封装层。(A display device is provided. The display device includes: a first island including a first display element disposed on a substrate; a second island including a second display element disposed on the substrate and spaced apart from the first island; a plurality of connection portions connecting the first island to the second island; a through portion formed between the plurality of connection portions and penetrating the substrate; and an encapsulation layer encapsulating the first island and the second island and including a first inorganic encapsulation layer and a second inorganic encapsulation layer. The encapsulation layer of the first island also includes an organic encapsulation layer, while the encapsulation layer of the second island does not include an organic encapsulation layer.)

1. A display device, the display device comprising:

a first island including a first display element disposed on a substrate;

a second island including a second display element disposed on the substrate, wherein the second island is spaced apart from the first island;

a plurality of connection portions connecting the first island to the second island;

a through portion formed between the plurality of connection portions and penetrating the substrate; and

an encapsulation layer encapsulating the first island and the second island, wherein the encapsulation layer comprises a first inorganic encapsulation layer and a second inorganic encapsulation layer,

wherein the encapsulation layer of the first island further comprises an organic encapsulation layer and the encapsulation layer of the second island does not comprise an organic encapsulation layer.

2. The display device according to claim 1,

the organic encapsulation layer covers dust substances contained in the first islands.

3. The display device according to claim 1,

the first inorganic encapsulation layer and the second inorganic encapsulation layer are also disposed on the plurality of connection portions.

4. The display device according to claim 1,

the first inorganic encapsulation layer and the second inorganic encapsulation layer cover side surfaces of the through portion.

5. The display device according to claim 1, further comprising:

a wiring provided in the plurality of connection portions and transmitting an electrical signal to the first island and the second island; and

a step difference compensation layer disposed between the substrate of the plurality of connection portions and the wiring, wherein the step difference compensation layer includes an organic material.

6. The display device according to claim 1,

the first and second inorganic encapsulation layers in the first island contact each other beyond the edges of the organic encapsulation layer.

7. The display device according to claim 1,

the organic encapsulation layer is disposed between the first inorganic encapsulation layer and the second inorganic encapsulation layer.

8. The display device according to claim 1,

each of the first display element and the second display element includes a pixel electrode, an intermediate layer, and a counter electrode, and

the pixel electrode is on the top surface of the planarization layer, and

a pixel defining layer is on the planarization layer and covers edges of the pixel electrodes.

9. The display device according to claim 1, further comprising:

a thin film transistor disposed between the substrate and a planarization layer;

a lower planarization layer disposed between the thin film transistor and the planarization layer; and

a connection metal disposed on the lower planarization layer.

10. The display device according to claim 1, further comprising:

a dam portion disposed on the first inorganic encapsulation layer of the first island and surrounding the organic encapsulation layer.

Technical Field

One or more embodiments relate to a display device and a method of manufacturing the same.

Background

As the field of display devices that visually display information of electric signals has been developed, various flat panel display devices having excellent characteristics such as slimness, light weight, and low power consumption have been introduced. Recently, foldable or rollable flexible display devices and stretchable display devices, which can be changed into various forms, have been researched and developed.

Disclosure of Invention

A thin and flexible display device includes a thin film type encapsulation layer to prevent permeation of external moisture or oxygen.

When a thin film encapsulation layer including at least one organic layer and at least one inorganic layer stacked together is formed on the entire display device, the stretchability of the display device may be reduced. The thin film encapsulation layer including only the inorganic layer has improved stretchability, but reduces coverage of dust substances contained in the display device, and a gap may be formed in the edge of the encapsulation layer. Oxygen and moisture penetrating into the gap formed in the edge may promote deterioration of the display device.

One or more embodiments include a display device including a thin film encapsulation layer that is both stretchable and rigid, and a method of manufacturing the same.

Additional aspects will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the presented embodiments.

According to one or more embodiments, a display device includes: a first island including a first display element disposed on a substrate; a second island including a second display element disposed on the substrate, wherein the second island is spaced apart from the first island; a plurality of connection portions connecting the first island to the second island; a through portion formed between the plurality of connection portions and penetrating the substrate; and an encapsulation layer encapsulating the first island and the second island, wherein the encapsulation layer includes a first inorganic encapsulation layer and a second inorganic encapsulation layer. The encapsulation layer of the first island also includes an organic encapsulation layer, while the encapsulation layer of the second island does not include an organic encapsulation layer.

The organic encapsulation layer may cover a dust substance included in the first display element.

The first inorganic encapsulation layer and the second inorganic encapsulation layer may also be disposed on the plurality of connection portions.

The first inorganic encapsulation layer and the second inorganic encapsulation layer may cover a side surface of the through portion.

The display device may further include: a wiring provided in the plurality of connection portions and transmitting an electrical signal to the first island and the second island; and a step difference compensation layer disposed between the substrate of the connection portion and the wiring, wherein the step difference compensation layer includes an organic material.

The first inorganic encapsulation layer and the second inorganic encapsulation layer in the first island may contact each other outside the edge of the organic encapsulation layer.

The organic encapsulation layer may be disposed between the first inorganic encapsulation layer and the second inorganic encapsulation layer.

Each of the first and second display elements may include a pixel electrode, an intermediate layer, and a counter electrode, and the pixel electrode may be located on a top surface of the planarization layer, and the pixel defining layer may be disposed to cover an edge of the pixel electrode.

The first inorganic encapsulation layer may cover a dust substance contained on the counter electrode.

The display device may further include: a thin film transistor disposed between the substrate and the planarization layer; a lower planarization layer disposed between the thin film transistor and the planarization layer; and a connection metal disposed on the lower planarization layer.

The display device may further include a dam portion disposed on the first inorganic encapsulation layer of the first island and may surround the organic encapsulation layer.

According to one or more embodiments, a method of manufacturing a display device includes: forming a plurality of islands, wherein the plurality of islands include display elements disposed on a substrate and separated from each other; encapsulating each of the plurality of islands with an encapsulation layer comprising a first inorganic encapsulation layer and a second inorganic encapsulation layer; detecting a dust substance contained in the first island and recording coordinate information on the dust substance before or after forming the first inorganic encapsulation layer; and forming an organic encapsulation layer covering the dust substance on the first island using the recorded coordinate information on the dust substance.

The first inorganic encapsulation layer and the second inorganic encapsulation layer may include an inorganic insulating layer.

The first inorganic encapsulation layer and the second inorganic encapsulation layer may be formed using Chemical Vapor Deposition (CVD).

The organic encapsulation layer may be formed using inkjet printing or three-dimensional (3D) printing.

No organic encapsulation layer is formed on the islands where no dust substance is detected.

A plurality of connecting portions may be used to connect a plurality of islands. The method may further include forming a through portion penetrating the substrate between the plurality of connection portions.

According to one or more embodiments, a display device includes: a plurality of islands spaced apart from each other, wherein each island includes a display element disposed on a substrate; a plurality of connecting portions connecting the plurality of islands to each other; a through portion formed between the plurality of connection portions and penetrating the substrate; and an encapsulation layer covering the plurality of islands, wherein the encapsulation layer includes a first inorganic encapsulation layer and a second inorganic encapsulation layer. The encapsulation layer includes an organic encapsulation layer on the islands containing the dust substance.

The organic encapsulation layer may be disposed between the first inorganic encapsulation layer and the second inorganic encapsulation layer on the island containing the dust substance, and the first inorganic encapsulation layer and the second inorganic encapsulation layer located in the island containing the dust substance may contact each other outside an edge of the organic encapsulation layer.

The display device may further include a dam portion disposed on the first inorganic encapsulation layer containing the islands of dust substances and surrounding the organic encapsulation layer.

Other aspects, features and advantages in addition to the above description will be apparent from the description, claims and drawings used to practice the present disclosure.

Drawings

Fig. 1 is an enlarged plan view of a region a of a display device according to an embodiment.

Fig. 2 illustrates a shape before stretching a portion of the substrate of the display device and after stretching a portion of the substrate of the display device.

Fig. 3 is a plan view of the first unit section of fig. 1.

Fig. 4A is a sectional view taken along line I-I' of fig. 3.

Fig. 4B is another sectional view taken along line I-I' of fig. 3.

Fig. 5 is a sectional view taken along line II-II' of fig. 3.

Fig. 6 is a sectional view of another example of the first unit portion.

Fig. 7 is a cross-sectional view of a portion of the second unit portion.

Fig. 8 schematically illustrates a manufacturing process according to an embodiment.

Fig. 9 schematically illustrates a manufacturing process according to another embodiment.

Fig. 10 is a sectional view showing another embodiment of the first unit section.

Fig. 11 is a sectional view showing another embodiment of the first unit section.

Fig. 12 is a sectional view showing a part of a display device according to another embodiment.

Detailed Description

Reference will now be made in detail to embodiments, examples of which are illustrated in the accompanying drawings, wherein like reference numerals may refer to like elements throughout. In this regard, the present embodiments may have different forms and should not be construed as limited to the description set forth herein.

It will be understood that when a layer, region or component is referred to as being "formed on" another layer, region or component, it can be directly or indirectly formed on the other layer, region or component.

The size of elements in the drawings may be exaggerated for convenience of explanation.

It will be understood that when a layer, region or component is referred to as being "connected to" another layer, region or component, it can be directly or indirectly connected to the other layer, region or component.

Hereinafter, embodiments of the present disclosure will be described in more detail with reference to the accompanying drawings. In the description with reference to the drawings, the same reference numerals may be used for the same or corresponding elements, and redundant description thereof may be omitted.

Fig. 1 is an enlarged plan view of a region a of a display device according to an embodiment, and fig. 2 illustrates a shape before stretching a portion of a substrate of the display device and after stretching a portion of the substrate of the display device.

Referring to fig. 1, a display device 10 according to an embodiment includes a plurality of islands 101 in which unit display portions 200 are formed and a plurality of connection portions 102 connecting the plurality of islands 101 to each other. A plurality of through portions V penetrating the substrate 100 are formed between the plurality of connection portions 102.

According to embodiments, the substrate 100 includes various materials. Specifically, the substrate 100 may include glass, metal, or organic material. In an alternative embodiment, substrate 100 comprises a flexible material. For example, substrate 100 comprises a flexible, bendable, foldable, or rollable material. A flexible material suitable for forming the substrate 100 may be one of ultra-thin glass, metal, and plastic. When the substrate 100 includes plastic, the substrate 100 includes Polyimide (PI). In another example, substrate 100 comprises a different type of plastic.

According to an embodiment, the plurality of islands 101 are spaced apart from each other by a predetermined distance. For example, a plurality of islands 101 are repeatedly arranged in a first direction X and a second direction Y intersecting the first direction X, and thus a planar lattice pattern can be formed. In an example, the first direction X and the second direction Y are perpendicular to each other. In another example, the first direction X forms an obtuse or acute angle with the second direction Y.

According to the embodiment, the plurality of unit display sections 200 are arranged within the plurality of islands 101, respectively. The plurality of unit display sections 200 include at least one display element that emits visible light.

According to the embodiment, the plurality of connection portions 102 connect the plurality of islands 101 to each other. For example, as shown in fig. 1, four connection portions 102 are connected to each of the plurality of islands 101. Four connection portions 102 connected to one island 101 extend in different directions so as to be connected to adjacent islands 101.

According to an embodiment, at least a portion of the plurality of islands 101 and at least a portion of the plurality of connecting portions 102 comprise the same material. For example, a portion of the substrate 100 where the plurality of islands 101 is formed and a portion of the substrate 100 where the plurality of connection portions 102 is formed include the same material. In addition, the plurality of islands 101 and the plurality of connection portions 102 are integrally formed.

According to an embodiment, the through portion V penetrates the substrate 100. The through portions V provide separation spaces between the plurality of islands 101, reduce the weight of the substrate 100, and improve the flexibility of the substrate 100. In addition, the through portion V changes shape when the substrate 100 is bent or curled, and thus stress during deformation of the substrate 100 may be reduced and abnormal deformation of the substrate 100 may be prevented, which improves durability of the substrate 100. Therefore, when the display device 10 is used, user convenience is improved, and the display device 10 can be easily incorporated into a wearable device.

According to the embodiment, the through portion V is formed by removing one region of the substrate 100 using a method such as etching. In another example, the through portion V is provided when the substrate 100 is manufactured. Examples of the process of forming the through portion V in the substrate 100 are different, and the manufacturing method thereof is not limited thereto. For convenience, a portion of the display device 10 may be divided into four unit portions, such as the first to fourth unit portions U1, U2, U3, and U4 shown in fig. 1.

According to an embodiment, the first to fourth unit portions U1, U2, U3 and U4 are repeatedly arranged in the first direction X and the second direction Y. Each of the first to fourth cell portions U1, U2, U3, U4 includes an island 101 and a connection portion 102.

According to the embodiment, the connection part 102 connecting four adjacent cell parts (i.e., the first to fourth cell units U1, U2, U3, and U4) forms a closed curve CL around the penetration portion V.

According to an embodiment, the through portion V is a region formed by removing one region of the substrate 100, and the through portion V improves flexibility of the substrate 100 and reduces stress when the substrate 100 is deformed. The width of the connection portion 102 is smaller than the width of the island 101.

According to an embodiment, two adjacent cell portions are symmetrical to each other. For example, first unit portion U1 is symmetrical to second unit portion U2 with respect to an axis of symmetry parallel to first direction X, and is also symmetrical to fourth unit portion U4 with respect to an axis of symmetry parallel to second direction Y.

According to the embodiment, the angle θ between the direction in which the connection portion 102 extends and the side of the island 101 connected to the connection portion 102 is an acute angle. The side faces of two adjacent islands 101 connected to one connection portion 102 and the extending direction of the one connection portion 102 form an acute angle. Therefore, the islands 101 may be densely arranged, the length of the connection portion 102 may be minimized, and the area of the through portion V may be maximized. In addition, as shown in fig. 2, the substrate 100 is stretchable.

Fig. 2 shows a shape of a portion of the substrate 100 of the display device 10 before and after stretching in the first direction X and the second direction Y.

Referring to fig. 2, according to an embodiment, when an external force is applied to the substrate 100, all angles between a side of the island 101 connected to one connection portion 102 and the connection portion 102 increase (θ < θ'). Therefore, the area of the through portion V increases. Accordingly, the distance between the islands 101 increases, so that the substrate 100 is stretched in the first direction X and the second direction Y, and thus the two-dimensional shape or the three-dimensional shape of the substrate 100 is changed.

According to an embodiment, the width of the connection portion 102 is smaller than the width of the island 101. Therefore, when an external force is applied to the substrate 100, a shape change caused by an increase in angle mainly occurs in the connection portion 102, and the shape of the island 101 is not changed even when the substrate 100 is stretched. Therefore, even when the substrate 100 is stretched, the cell display portions 200 in the islands 101 are stably held. Accordingly, the display device 10 can be easily incorporated into a flexible display device (such as a bendable display device, a flexible display device, or a stretchable display device).

According to an embodiment, when the substrate 100 is stretched, tensile stress is concentrated on the connection portion of the connection portion 102. Therefore, the connection portion of the connection portion 102 includes a curved surface to prevent the connection portion 102 from being torn due to tensile stress concentrated thereon.

Fig. 3 is a plan view of the first unit portion U1 of fig. 1, fig. 4A is a sectional view of the first unit portion U1 taken along line I-I ' of fig. 3, fig. 4B is a sectional view of another first unit portion U1 taken along line I-I ' of fig. 3, and fig. 5 is a sectional view taken along line II-II ' of fig. 3. In fig. 3 to 5, the first unit portion U1 and the blue sub-pixel emitting blue light are used as examples of the unit portion including the dust substance and the sub-pixel including the dust substance, but the embodiment is not limited thereto. Any one of the unit parts U1 through U4 and sub-pixels of any color may be a unit part containing dust substance or a sub-pixel containing dust substance.

Referring to fig. 3 to 5, according to the embodiment, the island 101 and the connection portion 102 are located in the first cell portion U1.

According to an embodiment, the encapsulation layer 300 sealing the unit display portion 200 is located on the island 101. The connection portion 102 includes a pair of first connection portions 102a and a pair of second connection portions 102b, the pair of first connection portions 102a being located at opposite sides of the island 101 and extending from diagonal corners of the diagonal pair in a direction parallel to the first direction X, and the pair of second connection portions 102b being located at opposite sides of the island 101 and extending from diagonal corners of the diagonal pair in a direction parallel to the second direction Y.

According to an embodiment, each of the unit display parts 200 includes at least one display element. In an example, the at least one display element is at least one organic light emitting device OLED emitting red, blue, green or white light. The organic light emitting device OLED is electrically connected to a Thin Film Transistor (TFT). In the current embodiment, the organic light emitting device OLED will be described as a display element. However, the embodiments are not limited thereto. The display element included in each of the unit display portions 200 may be one of various types of display elements, such as an inorganic Electroluminescent (EL) device, a quantum dot light emitting device, or a liquid crystal device.

In an embodiment, each of the unit display parts 200 includes a plurality of sub-pixels. For example, as shown in fig. 3, one unit display part 200 includes a sub-pixel R emitting red light, a sub-pixel G emitting green light, and a sub-pixel B emitting blue light. However, the embodiments are not limited thereto. Each of the unit display parts 200 may include more than three sub-pixels or less than three sub-pixels. In addition, each of the unit display parts 200 may include at least one sub-pixel emitting one kind of light.

In addition, according to the embodiment, the organic light emitting device OLED may be disposed within the unit display portion 200 in various arrangements such as an RGB structure, a Pentile structure, or a honeycomb structure according to the efficiency of a material included in the organic light emitting layer.

Referring to fig. 4A, the display device 10 according to the embodiment includes a substrate 100, a plurality of unit display portions 200 each including a planarization layer 209, and an encapsulation layer 300 sealing each of the unit display portions 200. The unit display portion 200 is disposed on the substrate 100 of the island 101, and the wiring W is disposed on the substrate 100 of the pair of second connection portions 102 b. Although the second connection portion 102b is shown in fig. 4A, the structure of the first connection portion 102a is substantially similar to that of the second connection portion 102 b.

First, according to an embodiment, the unit display portion 200 provided in the island 101 and the encapsulation layer 300 sealing the unit display portion 200 will be described.

According to an embodiment, a buffer layer 201 is formed on the substrate 100 of the island 101 to prevent impurities from penetrating into a semiconductor layer Act of a Thin Film Transistor (TFT). The buffer layer 201 includes an inorganic insulating material such as silicon oxide or silicon nitride, and may have a single-layer or multi-layer structure including the above inorganic insulating material.

According to an embodiment, the pixel circuit is located on the buffer layer 201. The pixel circuit includes at least one TFT and at least one storage capacitor Cst.

According to an embodiment, the TFT includes a semiconductor layer Act, a gate electrode GE, a source electrode SE, and a drain electrode DE. In the present embodiment, a top gate type TFT in which the gate electrode GE is over the semiconductor layer Act and has the gate insulating layer 203 between the gate electrode GE and the semiconductor layer Act is illustrated. However, according to another embodiment, the TFT is a bottom gate type TFT.

According to an embodiment, the semiconductor layer Act includes polysilicon. Alternatively, in other embodiments, the semiconductor layer Act includes amorphous silicon, an oxide semiconductor, or an organic semiconductor.

According to an embodiment, the gate electrode GE includes a low resistivity metal. In addition, the gate electrode GE includes a conductive material including one of molybdenum (Mo), aluminum (Al), copper (Cu), and titanium (Ti), and may have a multi-layer or single-layer structure including the above materials.

According to an embodiment, the gate insulating layer 203 between the semiconductor layer Act and the gate electrode GE includes an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, tantalum oxide, or hafnium oxide. The gate insulating layer 203 may have a single-layer or multi-layer structure including the above-described materials.

According to an embodiment, the source electrode SE and the drain electrode DE include a material having good conductivity. The source electrode SE and the drain electrode DE include a conductive material such as Mo, Al, Cu, or Ti, and may have a multi-layer or single-layer structure including the above materials. In the embodiment, the source electrode SE and the drain electrode DE have a Ti/Al/Ti multilayer structure.

According to an embodiment, the storage capacitor Cst includes the lower electrode CE1 and the upper electrode CE2 that are stacked on each other with the first interlayer insulating layer 205 between the lower electrode CE1 and the upper electrode CE 2. The storage capacitor Cst overlaps the TFT. In this regard, in fig. 4A, the gate electrode GE of the TFT is the lower electrode CE1 of the storage capacitor Cst. In another embodiment, the storage capacitor Cst does not overlap with the TFT. The storage capacitor Cst is covered with the second interlayer insulating layer 207.

According to an embodiment, the first interlayer insulating layer 205 and the second interlayer insulating layer 207 include an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, tantalum oxide, or hafnium oxide. The first interlayer insulating layer 205 and the second interlayer insulating layer 207 may have a single-layer or multi-layer structure including the above-described materials.

According to an embodiment, the pixel circuit including the TFT and the storage capacitor Cst is covered by the planarization layer 209.

According to the embodiment, the planarization layer 209 removes a step difference caused by the TFT and the top surface of the planarization layer 209 is planarized, so that it is possible to prevent defects from occurring in the organic light emitting device OLED due to unevenness in the bottom layer.

According to an embodiment, the planarization layer 209 includes an organic insulating material such as a general-purpose polymer such as Polymethylmethacrylate (PMMA) or Polystyrene (PS), a polymer derivative having a phenolic group, an acrylic polymer, an imide-based polymer, an aryl ether-based polymer, an amide-based polymer, a fluorine-based polymer, a p-xylene-based polymer, a vinyl alcohol-based polymer, or a blend thereof. In an embodiment, planarization layer 209 comprises polyimide.

In another embodiment, planarization layer 209 comprises an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, tantalum oxide, or hafnium oxide.

In another embodiment, the planarization layer 209 has a structure in which an organic insulating layer and an inorganic insulating layer are stacked on each other. Fig. 4B is a cross-sectional view of another example of first unit portion U1 taken along line I-I' of fig. 3. Referring to fig. 4B, the planarization layer 209 includes an organic planarization layer 209a and an inorganic planarization layer 209B on the organic planarization layer 209 a.

According to an embodiment, a mask process and a developing process are performed to form the planarization layer 209, thereby forming the via hole VH exposing the drain electrode DE of the TFT after applying a liquefied organic material to cover the TFT. In this manner, the planarization layer 209 is formed by curing the liquefied organic material. Thus, the top surface of planarization layer 209 is substantially planar.

According to an embodiment, the pixel electrode 221 is formed on the flat surface of the planarization layer 209. The pixel electrode 221 includes, for example, Indium Tin Oxide (ITO), Indium Zinc Oxide (IZO), zinc oxide (ZnO), indium oxide (In)2O3) Indium Gallium Oxide (IGO) or Aluminum Zinc Oxide (AZO). In another embodiment, the pixel electrode 221 includes a metal layer including one of silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), and a composite thereof. In another embodiment, the pixel electrode 221 further comprises a second electrode disposed on the second electrodeA layer including one of ITO, IZO, zinc oxide, and indium oxide on or under the metal layer.

According to an embodiment, the pixel defining layer 211 is formed on the flat surfaces of the pixel electrode 221 and the planarization layer 209. The pixel defining layer 211 includes an opening exposing the top surface of the pixel electrode 221 and covers the edge of the pixel electrode 221. Thus, the pixel defining layer 211 defines an emission area of the pixel.

According to an embodiment, the pixel defining layer 211 includes an organic insulating material. Optionally, in other embodiments, the pixel defining layer 211 comprises, for example, silicon nitride (SiN)x) Silicon oxynitride (SiON) or silicon oxide (SiO)x) The inorganic insulating material of (1). Alternatively, in still other embodiments, the pixel defining layer 211 includes an organic insulating material and an inorganic insulating material.

According to an embodiment, the organic light emitting device OLED comprises an intermediate layer 222, which intermediate layer 222 comprises a small molecular weight material or a polymer material. When the intermediate layer 222 includes a small molecular weight material, the intermediate layer 222 has a structure in which a Hole Injection Layer (HIL), a Hole Transport Layer (HTL), an emission layer (EML), an Electron Transport Layer (ETL), and an Electron Injection Layer (EIL) are stacked on each other in a single or composite structure. The intermediate layer 222 includes, for example, copper phthalocyanine (CuPc), N '-di (naphthalene-1-yl) -N, N' -diphenylbenzidine (NPB), or tris (8-hydroxyquinoline) aluminum (Alq)3) At least one of various organic materials. These layers are formed by a method such as vapor deposition.

According to an embodiment, when the intermediate layer 222 includes a polymer material, the intermediate layer 222 has a structure including an HTL and an EML. In this case, the HTL includes Polyethylenedioxythiophene (PEDOT), and the EML includes a polyphenylenevinylene (PPV) -based polymer material and a polyfluorene-based polymer material. The intermediate layer 222 is formed by screen printing, ink jet printing, or Laser Induced Thermal Imaging (LITI).

Of course, embodiments are not limited thereto, and in other embodiments, the intermediate layer 222 has other structures. The intermediate layer 222 may include a layer integrally connected to each other over the plurality of pixel electrodes 221, or a patterned layer corresponding to each of the plurality of pixel electrodes 221.

According to an embodiment, the organic light emitting device OLED includes a counter electrode 223, and the counter electrode 223 includes a conductive material having a small work function. For example, the counter electrode 223 includes a metal layer including one of Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, and an alloy thereof. Optionally, In other embodiments, the counter electrode 223 further comprises a material such as ITO, IZO, ZnO, or In2O3The layer formed on the metal layer including the above material. The counter electrode 223 is also formed on both the unit display portion 200 and the second connection portion 102b as a non-display region.

According to an embodiment, the intermediate layer 222 and the counter electrode 223 are formed by thermal deposition. The counter electrode 223 is formed on the entire surface of the substrate 100 and thus may be deposited on the side of the through portion V.

According to an embodiment, a capping layer protecting the counter electrode 223 is further positioned on the counter electrode 223. The capping layer includes one of LiF, an inorganic material, and an organic material.

According to an embodiment, the encapsulation layer 300 sealing the unit display portion 200 is formed on the counter electrode 223. The encapsulation layer 300 blocks external oxygen and moisture, and may have a single-layer or multi-layer structure. In the current embodiment, the encapsulation layer 300 includes at least two inorganic encapsulation layers (such as a first inorganic encapsulation layer 310 and a second inorganic encapsulation layer 330) and an organic encapsulation layer 320. The organic encapsulation layer 320 is not formed on the entire display device 10, but is formed only in a partial region in which the dust substance DM is positioned.

According to an embodiment, the first and second inorganic encapsulation layers 310 and 330 include one or more inorganic insulating materials such as aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon nitride, or silicon oxynitride, and are formed by Chemical Vapor Deposition (CVD).

According to an embodiment, the organic encapsulation layer 320 includes one of PMMA, Polycarbonate (PC), PS, acrylic resin, epoxy-based resin, polyimide, polyethylene, polyvinylsulfonate, polyoxymethylene, polyarylate, and Hexamethyldisiloxane (HMDSO).

Hereinafter, the step difference compensating layer 202 located in the second connecting portion 102b and the structure located on the step difference compensating layer 202 will be described. Note that, although the second connection portion 102B is shown in fig. 4A and 4B, the structure of the first connection portion 102a is substantially similar to that of the second connection portion 102B.

According to an embodiment, the step difference compensation layer 202 is disposed on the substrate 100 of the second connection portion 102 b. The width of the second connection portion 102b is smaller than the width of the island 101. Therefore, the second connection portion 102b is less strong against stress occurring when the shape of the display device 10 is deformed. Accordingly, one or more of the buffer layer 201, the gate insulating layer 203, the first interlayer insulating layer 205, and the second interlayer insulating layer 207 are not formed on the substrate 100 of the second connection portion 102 b. This minimizes the occurrence of defects (cracks) of the inorganic layer due to deformation of the connection portion.

In the present embodiment, the buffer layer 201, the gate insulating layer 203, the first interlayer insulating layer 205, and the second interlayer insulating layer 207, which are inorganic layers formed on the substrate 100 of the island 101, are removed by a process such as etching, and instead, the step difference compensation layer 202 including an organic material is deposited.

According to the embodiment, the wiring W transmitting a voltage or a signal to the unit display part 200 is located on the step difference compensation layer 202, and the step difference compensation layer 202 absorbs stress that may be applied to the wiring W by preventing a height difference when the wiring W is connected to the island 101.

According to an embodiment, the step difference compensation layer 202 includes at least one organic insulating material such as polyimide, polyamide, acrylic resin, benzocyclobutene, HMDSO, or phenol resin. The step difference compensation layer 202 may have a single-layer or multi-layer structure including these organic insulating materials.

According to the embodiment, the wiring W located on the step difference compensation layer 202 includes the same material as that used to form the source electrode SE or the drain electrode DE of the TFT located in the island 101. Alternatively, in other embodiments, the wire W includes the same material as that used to form the gate electrode GE of the TFT. The wiring W includes a wiring which transmits a voltage or a signal to the pixel circuit.

According to the embodiment, the wiring W is covered with the planarization layer 209. In an embodiment, the planarization layer 209 of the second connection portion 102b includes the same material as that used to form the planarization layer 209 of the island 101.

According to an embodiment, the counter electrode 223, the first inorganic encapsulation layer 310, and the second inorganic encapsulation layer 330 are stacked on the planarization layer 209. Since the counter electrode 223, the first inorganic encapsulation layer 310, and the second inorganic encapsulation layer 330 are formed using an opening mask after the through portion V is formed, the counter electrode 223, the first inorganic encapsulation layer 310, and the second inorganic encapsulation layer 330 cover the side surface of the through portion V.

In the present embodiment, the organic encapsulation layer 320 of the encapsulation layer 300 is not formed on the entire display device 10, but is formed on a partial region containing the dust substance DM.

For example, according to an embodiment, as shown in fig. 5, the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 are formed to cover the entire unit display portion 200. However, the organic encapsulation layer 320 is concentrated in a region of the sub-pixel B of the unit display portion 200 in which the dust substance DM is present and blue light is emitted. According to the embodiment, the organic encapsulation layer 320 is not formed in the sub-pixel region except the sub-pixel region in which the dust substance DM exists. However, the embodiments are not limited thereto.

In another embodiment, as shown in fig. 6, the organic encapsulation layer 320 is formed on the entire unit display portion 200.

Referring to fig. 6, according to an embodiment, the dust substance DM is present only in the sub-pixel B emitting blue light. However, the organic encapsulation layer 320 is not concentrated in the sub-pixel B that emits blue light and in which the dust substance DM is present, but is formed on the sub-pixel R that emits red light and the sub-pixel G that emits green light with substantially the same thickness. In this case, the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 are also formed on all of the red, green and blue sub-pixels R, G and B.

In addition, according to the embodiment, even when the organic encapsulation layer 320 is formed on all the islands 101 of the first cell portion U1 due to the presence of the dust substance DM (as shown in fig. 6), the organic encapsulation layer 320 is not formed on the islands 101 of the second to fourth cell portions U2, U3, and U4 that do not contain the dust substance DM.

Fig. 7 is a cross-sectional view of a portion of the second unit section U2 in which no dust substance DM is present. In fig. 7, the encapsulation layer 300 includes only the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330, and the organic encapsulation layer 320 is not provided.

Referring to fig. 5 and 7 or referring to fig. 6 and 7, according to an embodiment, an encapsulation layer 300 including a first inorganic encapsulation layer 310 and a second inorganic encapsulation layer 330, but not including an organic encapsulation layer 320, is formed on the island 101 of the second unit section U2 in which the dust substance DM is not present. However, the encapsulation layer 300 formed on the island 101 of the first unit section U1 in which the dust substance DM is present includes the organic encapsulation layer 320, the organic encapsulation layer 320 is concentrated in a local area (such as an area of the sub-pixel B) in which the dust substance DM is present, or the encapsulation layer 300 including the organic encapsulation layer 320 is formed in the entire first unit section U1.

According to the embodiment, when the organic encapsulation layer 320 is formed on all the islands 101, the organic encapsulation layer 320 is printed on each of the islands 101, whereas in the current embodiment, the organic encapsulation layer 320 is formed only on the islands 101 of the first cell portion U1 or in a desired region of the first cell portion U1, so that the process time may be reduced compared to the process of forming the organic encapsulation layer 320 on all the islands 101.

According to an embodiment, when only the first and second inorganic encapsulation layers 310 and 330 are formed in the region where the dust substance DM exists, the first and second inorganic encapsulation layers 310 and 330 may not firmly cover the dust substance DM, so that gaps may be formed at edges of the dust substance DM and oxygen and moisture may permeate through the gaps. However, in the current embodiment, the organic encapsulation layer 320 covers the region in which the dust substance DM is present, so that penetration of oxygen and moisture may be prevented.

In the current embodiment, the organic encapsulation layer 320 is positioned on the island 101, not on the connection portion 102. Accordingly, the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 contact each other at the outside of the organic encapsulation layer 320 (except for the edge of the organic encapsulation layer 320), so that each unit display part 200 is individually encapsulated.

According to an embodiment, the first and second inorganic encapsulation layers 310 and 330 are formed on the entire surface of the substrate 100 by using CVD. Accordingly, the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 cover the side surfaces of the through portion V.

According to an embodiment, the organic encapsulation layer 320 is formed by applying a predetermined amount of liquefied organic material corresponding to the unit display part 200 using inkjet printing or three-dimensional (3D) printing and then by curing the liquefied organic material.

Fig. 8 and 9 schematically show processes of detecting dust substances DM and forming a package layer 300.

Referring to fig. 8, the display device including the intermediate layer 222 and the counter electrode 223 is transferred from the first transfer chamber CHT1 to the second transfer chamber CHT2 via the transfer chamber CH1 to form the first inorganic encapsulation layer 310 according to the embodiment.

According to an embodiment, the display device in the second transfer chamber CHT2 is then transferred to the first chamber CH2, so that the first inorganic encapsulation layer 310 may be formed. The first inorganic encapsulation layer 310 is formed by using CVD.

According to an embodiment, after the first inorganic encapsulation layer 310 is formed, the display device is transferred to the inspection chamber CH 3. The inspection chamber CH3 inspects the display device using Automatic Optical Inspection (AOI) to detect the dust substance DM to record coordinate information about pixels containing the dust substance DM.

According to the embodiment, after the dust substance DM is detected, the display device is transported to the second chamber CH6, and the organic encapsulation layer 320 is formed in the second chamber CH 6. The organic encapsulation layer 320 is applied corresponding to the region containing the dust substance DM by using inkjet printing or 3D printing by using the coordinate information of the dust substance DM obtained by the inspection chamber CH3, and then cured.

According to an embodiment, after the organic encapsulation layer 320 is formed, the display device is transported to the third chamber CH5, and the second inorganic encapsulation layer 330 is formed through the third chamber CH 5. The second inorganic encapsulation layer 330 is formed by using CVD.

According to an embodiment, after the second inorganic encapsulation layer 330 is formed, the display device is transferred to the third transfer chamber CHT3 in which a subsequent process is performed via the transfer chamber CH 4.

For example, the subsequent process includes separating the glass base substrate located on the lower portion of the substrate 100 from the substrate 100.

Referring to fig. 9, according to an embodiment, when comparing fig. 9 with fig. 8, the order of checking the dust substance DM and forming the first inorganic encapsulation layer 310 is changed.

According to the embodiment, the display device transferred to the second transfer chamber CHT2 is first transferred to the inspection chamber CH3, and the inspection chamber CH3 detects the dust substance DM using AOI and records coordinate information on pixels containing the dust substance DM. That is, the dust substance DM is detected before the first inorganic encapsulation layer 310 is formed.

According to an embodiment, after the inspection process is performed, the display device is transferred to the first chamber CH2 to form the first inorganic encapsulation layer 310, and after the first inorganic encapsulation layer 310 is formed, the display device is transferred to the second chamber CH6, and the organic encapsulation layer 320 is applied corresponding to the region containing the dust substance DM using inkjet printing or 3D printing and then cured.

According to an embodiment, after the organic encapsulation layer 320 is formed, the display device is transported to the third chamber CH5, and the second inorganic encapsulation layer 330 is formed through the third chamber CH 5. The second inorganic encapsulation layer 330 is formed by using CVD.

According to an embodiment, after the second inorganic encapsulation layer 330 is formed, the display device is transferred to the third transfer chamber CHT3 via the transfer chamber CH4 so that a subsequent process may be performed.

As described above, according to the embodiment, before the organic encapsulation layer 320 is formed, the display device is checked to detect the dust substance DM, and if the dust substance DM is detected, the organic encapsulation layer 320 is formed only in the unit display portion 200 containing the dust substance DM using the coordinate information of the dust substance DM, so that the process time can be reduced. In addition, the organic encapsulation layer 320 is covered to block penetration of impurities and improve reliability of the encapsulation layer 300.

In addition, according to an embodiment, in fig. 8, an inspection process is performed once after the first inorganic encapsulation layer 310 is formed, and in fig. 9, an inspection process is performed once before the first inorganic encapsulation layer 310 is formed. However, the embodiments are not limited thereto. In other embodiments, the inspection process is performed twice, i.e., the inspection process is performed twice before the first inorganic encapsulation layer 310 is formed and after the first inorganic encapsulation layer 310 is formed.

Fig. 10 is a cross-sectional view of another embodiment of the first unit part U1, showing a situation where a dust substance DM is present between the counter electrode 223 and the first inorganic encapsulation layer 310. As shown in fig. 8, coordinate information on the dust substance DM is obtained after the first inorganic encapsulation layer 310 is formed. However, as shown in fig. 9, coordinate information of the dust substance DM may be obtained from an inspection process before the first inorganic encapsulation layer 310 is formed. Before the first inorganic encapsulation layer 310 is formed on the counter electrode 223, the display device is inspected to detect the dust substance DM, and coordinate information about pixels containing the dust substance DM is recorded. Then, the first inorganic encapsulation layer 310 is formed, and then, the organic encapsulation layer 320 is formed in the region containing the dust substance DM. The dust substance DM located between the counter electrode 223 and the first inorganic encapsulation layer 310 is covered by the organic encapsulation layer 320 to prevent cracks from occurring when only the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 cover the dust substance DM.

Fig. 11 is a sectional view showing another embodiment of the first unit portion U1.

Referring to fig. 11, according to an embodiment, when comparing fig. 11 with the embodiment of fig. 5, a dam portion 400 is formed at an edge of the unit display portion 200 in addition to the organic encapsulation layer 320 formed on the entire unit display portion 200.

According to an embodiment, as shown in fig. 11, a dust substance DM is present in the sub-pixel B that emits blue light. However, the organic encapsulation layer 320 is formed in all of the red, green and blue sub-pixels R, G and B containing the dust substance DM. In this case, the first and second inorganic encapsulation layers 330 are formed in all of the red, green, and blue sub-pixels R, G, and B.

In the present embodiment, the dam portion 400 is formed on the upper portion of the first inorganic encapsulation layer 310.

According to an embodiment, the intermediate layer 222 and the counter electrode 223 are formed by depositing materials using a metal pattern mask. When the dam portion 400 is formed on the pixel defining layer 211 in the process of depositing the intermediate layer 222 and the counter electrode 223, the dam portion 400 may physically contact the metal pattern mask.

According to the embodiment, when the dam portion 400 is formed of an organic material, the surface of the dam portion 400 becomes rough due to contact with the metal pattern mask. Accordingly, the surface coverage of the dam portion 400 with respect to the first inorganic encapsulation layer 310 is reduced, so that impurities may penetrate into the surface of the dam portion 400. On the other hand, when the dam portion 400 is formed of an inorganic material, the dam portion 400 may be damaged by the metal pattern mask.

However, in the present embodiment, since the dam portion 400 is formed after the process of forming the first inorganic encapsulation layer 310 using the metal pattern mask is completed, the above-described situation does not occur.

Fig. 12 is a sectional view showing a display device according to another embodiment. The cross-section of fig. 12 corresponds to the line I-I' of fig. 3. In fig. 12, reference numerals repeated from those in fig. 3 and 4A denote the same elements. Therefore, redundant description thereof will be omitted.

Referring to fig. 12, the display device according to the embodiment includes an island 101 having a unit display portion 200 formed on a substrate 100 and a second connection portion 102 b. A through portion V penetrating the substrate 100 is formed between the island 101 and the second connection portion 102 b.

According to an embodiment, each of the unit display portions 200 includes the planarization layer 209. A display element such as an organic light emitting device OLED is located on the planarization layer 209. The planarization layer 209 provides a flat top surface to an area in which the organic light emitting device OLED is disposed.

In the present embodiment, at least one of the inorganic passivation layer PVX and the lower planarization layer 208 is additionally disposed between the TFT and the planarization layer 209. In addition, the step difference compensation layer 202 is provided on a portion of the end of the substrate 100, such as the island 101, of the substrate 100. The step difference compensation layer 202 covers the side surface of the buffer layer 201, the side surface of the gate insulating layer 203, the side surface of the first interlayer insulating layer 205, and the side surface of the second interlayer insulating layer 207 of the unit display portion 200.

According to an embodiment, the inorganic passivation layer PVX may be silicon nitride (SiN)x) Or silicon oxide (SiO)x) A single layer or a multi-layer structure of (a). The inorganic passivation layer PVX covers and protects a part of the wiring of the TFT and the source electrode SE. The wiring formed together in the process of forming the source electrode SE is exposed in a portion of the region of the substrate 100. The exposed portion of the wiring may be damaged by an etchant used to pattern the pixel electrode 221. However, in the present embodiment, the inorganic passivation layer PVX covers at least a portion of the wiring so that the wiring is not damaged in the patterning process of the pixel electrode 221.

According to an embodiment, the lower planarization layer 208 is located between the inorganic passivation layer PVX and the planarization layer 209. The lower planarization layer 208 includes an organic insulating material such as a general-purpose polymer (such as PMMA or PS), a polymer derivative having a phenolic group, an acrylic polymer, an imide-based polymer, an aryl ether-based polymer, an amide-based polymer, a fluorine-based polymer, a p-xylene-based polymer, a vinyl alcohol-based polymer, or a blend thereof.

According to an embodiment, a connection metal CM connecting the pixel electrode 221 to the TFT is formed on the lower planarization layer 208 and contacts the TFT through a contact hole. In addition, the wiring and the connection metal CM are located on the same layer.

According to an embodiment, the connection metal CM includes a conductive material such as Mo, Al, Cu, or Ti, and may have a multi-layer or single-layer structure including the above-described materials. In this way, when the lower planarization layer 208 is formed, the wiring may be located on the top surface of the lower planarization layer 208, so that the integration of the unit display portion 200 may be improved.

According to an embodiment, the step difference compensation layer 202 is formed on the substrate 100 of the connection portion 102. Although the second connection portion 102b is illustrated, the first connection portion 102a has a substantially similar structure. The step difference compensation layer 202 includes an organic insulating material such as polyimide, polyamide, acrylic resin, benzocyclobutene, HMDSO, or phenol resin. The step difference compensation layer 202 may have a single-layer or multi-layer structure including the above-described organic insulating material.

According to an embodiment, the step difference compensation layer 202 is formed by removing the buffer layer 201, the gate insulating layer 203, the first interlayer insulating layer 205, and the second interlayer insulating layer 207 on the substrate 100. In the process of removing the above layers, a portion of the buffer layer 201, the gate insulating layer 203, the first interlayer insulating layer 205, and the second interlayer insulating layer 207 in the island 101 is removed, and the step difference compensating layer 202 is filled in the portion where the foregoing layers are removed. After that, the planarization layer 209 and the pixel defining layer 211 are formed, and the through portion V is formed. Accordingly, a portion of the step difference compensation layer 202 may be located on the substrate 100 of the island 101.

According to an embodiment, the inorganic passivation layer PVX is not formed in the second connection portion 102 b. That is, the step difference compensation layer 202, the lower planarization layer 208, and the planarization layer 209 are formed in the second connection portion 102 b. The first connection portion 102a has a similar structure.

According to an embodiment, the additional wiring W' is formed between the lower planarization layer 208 and the planarization layer 209. The additional wiring W' is formed of the same material as that of the connection metal CM formed in the island 101.

According to an embodiment, the counter electrode 223, the first inorganic encapsulation layer 310, and the second inorganic encapsulation layer 330 are stacked on the planarization layer 209. Since the counter electrode 223, the first inorganic encapsulation layer 310, and the second inorganic encapsulation layer 330 are formed using an opening mask after the through portion V is formed, the counter electrode 223, the first inorganic encapsulation layer 310, and the second inorganic encapsulation layer 330 cover the side surface of the through portion V.

According to the present embodiment, the organic encapsulation layer 320 is optionally concentrated in a portion of the region where the dust substance DM is detected, so that the process time may be reduced as compared to forming the organic encapsulation layer 320 on all the unit portions, and the region containing the dust substance DM is covered with the organic encapsulation layer 320 to prevent permeation of oxygen and moisture.

According to an embodiment, the organic encapsulation layer is optionally concentrated in a region where dust substances are detected, so that a process time for forming the encapsulation layer may be reduced. In addition, the dust substance is covered with the organic encapsulation layer to prevent cracks from occurring when the dust substance is covered with the inorganic encapsulation layer. Therefore, in the display device having the deformed shape, a reliable encapsulation layer can be formed. Of course, the scope of the embodiments of the present disclosure is not limited by these effects.

It is to be understood that the exemplary embodiments described herein are to be considered in a descriptive sense only and not for purposes of limitation. Descriptions of features or aspects within each embodiment should generally be considered as available for other similar features or aspects in other embodiments. While one or more exemplary embodiments have been described with reference to the accompanying drawings, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope defined by the following claims.

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