Thyristor chip, thyristor and manufacturing method thereof
阅读说明:本技术 一种晶闸管芯片、晶闸管及其制作方法 (Thyristor chip, thyristor and manufacturing method thereof ) 是由 王东东 王政英 姚震洋 高军 银登杰 郭润庆 刘军 于 2020-07-14 设计创作,主要内容包括:本发明公开了一种晶闸管芯片及其制作方法,其中所述芯片包括,位于阳极P型层之上的N型基区及P型基区;位于所述P型基区上表面内的阴极N型区;位于所述阴极发射N型区之上的阴极金属;位于所述P型基区表面之上放大门极金属及中心门极金属;位于放大门极金属之上指定厚度的第一介质薄膜层;及所述阳极P型层之下的阳极金属。本发明无需传统结构来实现放大门级悬空,即可达到封装时放大门级与阴极隔离的目的,并能提高耐受di/dt的能力,有利于提升晶闸管性能,延长使用寿命,降低了工艺复杂程度,降低了工艺成本。(The invention discloses a thyristor chip and a manufacturing method thereof, wherein the chip comprises an N-type base region and a P-type base region which are positioned on an anode P-type layer; the cathode N-type region is positioned in the upper surface of the P-type base region; a cathode metal over the cathode emission N-type region; amplifying gate metal and central gate metal on the surface of the P-type base region; a first dielectric thin film layer of a specified thickness over the enlarged gate metal; and an anode metal under the anode P-type layer. The invention can achieve the purpose of isolating the amplifying gate level from the cathode during packaging without suspending the amplifying gate level in the air by a traditional structure, can improve the di/dt tolerance, is beneficial to improving the performance of the thyristor, prolongs the service life, reduces the process complexity and reduces the process cost.)
1. A thyristor chip, comprising:
the N-type base region is positioned on the anode P-type layer, and the P-type base region is positioned on the N-type base region;
the cathode N-type region is positioned in a partial region of the P-type base region, and the upper surface of the cathode N-type region is flush with the upper surface of the P-type base region, wherein the cathode N-type region comprises a cathode emission N-type region and a gate electrode N-type region;
the cathode metal is positioned on the cathode emission N-type region and exposes part of the upper surface of the cathode emission N-type region;
the amplifying gate electrode metal is positioned on the surface of the P-type base region and is simultaneously contacted with the P-type base region and the gate electrode N-type region, and the central gate electrode metal is positioned on the upper surface of the P-type base region and is not contacted with the gate electrode N-type region;
a first dielectric thin film layer of a specified thickness over the enlarged gate metal;
and an anode metal under the anode P-type layer.
2. The thyristor chip of claim 1,
the thickness of the amplifying gate metal is the same as that of the cathode metal, and the thickness of the first dielectric thin film layer is far smaller than that of the amplifying gate metal and that of the cathode metal.
3. The thyristor chip of claim 2,
the first dielectric film includes at least one of a DLC film, a silicon nitride film or a silicon oxide film.
4. The thyristor chip of claim 3,
and a second dielectric thin film layer with a designated thickness is further arranged on the upper surface of the P-type base region which is not covered by the cathode metal, the amplifying gate electrode metal and the central gate electrode metal, the thickness of the second dielectric thin film layer is far smaller than the thicknesses of the amplifying gate electrode metal and the cathode metal, and the second dielectric thin film comprises a DLC thin film.
5. The thyristor chip of claim 4,
the designated thickness of the first dielectric DLC film layer is set to be 20-300 nm;
the designated thickness of the second medium thin film layer is set to be 20-500 nm;
the total thickness of the chip is set to be 1.2 mm;
the thicknesses of the amplifying gate metal and the cathode metal are set to be 30 mu m;
the carrier concentration of the N-type base region is set to be 1013cm-3;
The anode P-type layer and the P-type base region comprise aluminum element doping, and the carrier concentration is set to be 1014cm-3~1016cm-3;
The cathode N-type region comprises phosphorus element doping, and the carrier concentration is set to be 1019cm-3;
The anode metal, the cathode metal and the gate metal comprise aluminum.
6. A thyristor, characterized in that,
a thyristor chip comprising the thyristor of any one of claims 1 to 5.
7. A method for manufacturing a thyristor chip is characterized by comprising the following steps:
synchronously forming an anode P-type layer and a P-type base region on the lower surface and the upper surface of the N-type substrate respectively;
forming a cathode N-type region with the upper surface flush with the upper surface of the P-type base region in the partial region of the P-type base region, wherein the cathode N-type region comprises a cathode emission N-type region and a gate electrode N-type region;
forming ohmic contact electrode metal on the cathode emission N-type region, the P-type base region, the gate electrode N-type region and below the anode P-type layer synchronously, wherein cathode metal exposing part of the upper surface of the cathode emission N-type region is formed on the cathode emission N-type region, amplified gate electrode metal simultaneously contacting with the P-type base region and the gate electrode N-type region is formed on the surface of the P-type base region, central gate electrode metal not contacting with the gate electrode N-type region is formed on the upper surface of the P-type base region, and anode metal is formed below the anode P-type layer;
and forming a first medium thin film layer with a designated thickness on the amplifying gate metal through a deposition process.
8. The method of claim 7,
the deposition process comprises a chemical vapor deposition process, a physical vapor deposition process, an ion beam deposition process, a filtering type vacuum cathode arc process, a pulse laser deposition process and a magnetron sputtering process, wherein the chemical vapor deposition process comprises a PECVD process;
and a second dielectric thin film layer with a specified thickness is also arranged on the upper surface of the P-type base region which is not covered by the cathode metal, the amplifying gate electrode metal and the central gate electrode metal.
9. The method of claim 8,
the thickness of the amplifying gate metal is the same as that of the cathode metal;
the thickness of the first dielectric thin film layer and the thickness of the second dielectric thin film layer are both far smaller than the thickness of the amplification gate metal and the thickness of the cathode metal;
the first dielectric film comprises at least one of a DLC film, a silicon nitride film or a silicon oxide film;
the second dielectric film comprises a DLC film.
10. The method of claim 9,
the designated thickness of the first dielectric DLC film layer is set to be 20-300 nm;
the designated thickness of the second medium thin film layer is set to be 20-500 nm;
the PECVD process parameters for depositing the DLC film comprise the following settings:
the vacuum pressure of the deposition chamber is set to 10-6Pa;
The flow range of the alkane gas is set to be 0-500 sccm;
setting the pressure intensity range in the deposition cavity to be 0-66.5 Pa;
the radio frequency source is set to 13.56 MHz;
setting the time range of the deposition process to be 3-10 minutes;
the temperature of the chip is kept constant in the deposition process, and the temperature of the chip in the deposition process is less than or equal to 300 ℃.
11. A method for fabricating a thyristor, which is characterized in that,
a method of making a thyristor chip comprising any one of claims 7 to 10.
Technical Field
The invention relates to the technical field of semiconductor devices, in particular to a thyristor chip, a thyristor and a manufacturing method thereof.
Background
A generally adopted flat plate type packaging structure of the high-power thyristor discrete device with the current level of more than 300A and the voltage level of more than 1200V is shown in figure 1, and a tube cover 1, an
The thyristor chip 3 is a three-terminal four-layer semiconductor device, as shown in fig. 2, three terminals of a conventional thyristor are an anode metal 31, a
There are three electrodes for the thyristor chip: the anode, the cathode and the gate pole, and a positive trigger signal is added between the cathode and the gate pole to control the conduction of the thyristor. The gate electrode and the cathode are positioned on the same surface, the surfaces of the gate electrode and the cathode need to be covered with metal films, the metal films are used for leading out electrodes and realizing ohmic contact, and the gate electrode metal layer and the cathode metal layer need to be separated. As shown in fig. 3, the schematic diagram of the gate cathode surface structure generally shows that the high-power thyristor is divided into a central gate level and an amplifying gate level, the central gate is connected with an external trigger circuit through a gate component, and the amplifying gate can reduce the turn-on time, reduce the turn-on current, improve the turn-on di/dt and the like. As shown in fig. 1, the central gate is isolated from the cathode by the opening of the upper mo strip, and the enlarged gate requires a special structure to achieve isolation from the cathode.
Disclosure of Invention
The invention solves the technical problem of effective isolation of the amplifying gate pole and the cathode while reducing the cost, improves the electrical property of the thyristor and prolongs the service life.
The invention provides a thyristor chip, comprising:
the N-type base region is positioned on the anode P-type layer, and the P-type base region is positioned on the N-type base region;
the cathode N-type region is positioned in a partial region of the P-type base region, and the upper surface of the cathode N-type region is flush with the upper surface of the P-type base region, wherein the cathode N-type region comprises a cathode emission N-type region and a gate electrode N-type region;
the cathode metal is positioned on the cathode emission N-type region and exposes part of the upper surface of the cathode emission N-type region;
the amplifying gate electrode metal is positioned on the surface of the P-type base region and is simultaneously contacted with the P-type base region and the gate electrode N-type region, and the central gate electrode metal is positioned on the upper surface of the P-type base region and is not contacted with the gate electrode N-type region;
a first dielectric thin film layer of a specified thickness over the enlarged gate metal;
and an anode metal under the anode P-type layer.
In an embodiment of the present invention, it is,
the thickness of the amplifying gate metal is the same as that of the cathode metal, and the thickness of the first dielectric thin film layer is far smaller than that of the amplifying gate metal and that of the cathode metal.
In an embodiment of the present invention, it is,
the first dielectric film includes at least one of a DLC film, a silicon nitride film or a silicon oxide film.
In an embodiment of the present invention, it is,
and a second dielectric thin film layer with a designated thickness is further arranged on the upper surface of the P-type base region which is not covered by the cathode metal, the amplifying gate electrode metal and the central gate electrode metal, the thickness of the second dielectric thin film layer is far smaller than the thicknesses of the amplifying gate electrode metal and the cathode metal, and the second dielectric thin film comprises a DLC thin film.
In an embodiment of the present invention, it is,
the designated thickness of the first dielectric DLC film layer is set to be 20-300 nm;
the designated thickness of the second medium thin film layer is set to be 20-500 nm;
the total thickness of the chip is set to be 1.2 mm;
the thicknesses of the amplifying gate metal and the cathode metal are set to be 30 mu m;
the carrier concentration of the N-type base region is set to be 1013cm-3;
The anode P-type layer and the P-type base region are doped with aluminum, and the concentration of current carriers is set to be 1014cm-3~1016cm-3;
The cathode N-type region is doped with phosphorus, and the carrier concentration is set to be 1019cm-3;
The anode metal, the cathode metal and the gate metal are made of aluminum.
The present invention also provides a thyristor,
a thyristor chip comprising any of the above.
The invention also provides a manufacturing method of the thyristor chip, which comprises the following steps:
synchronously forming an anode P-type layer and a P-type base region on the lower surface and the upper surface of the N-type substrate respectively;
forming a cathode N-type region with the upper surface flush with the upper surface of the P-type base region in the partial region of the P-type base region, wherein the cathode N-type region comprises a cathode emission N-type region and a gate electrode N-type region;
forming ohmic contact electrode metal on the cathode emission N-type region, the P-type base region, the gate electrode N-type region and below the anode P-type layer synchronously, wherein cathode metal exposing part of the upper surface of the cathode emission N-type region is formed on the cathode emission N-type region, amplified gate electrode metal simultaneously contacting with the P-type base region and the gate electrode N-type region is formed on the surface of the P-type base region, central gate electrode metal not contacting with the gate electrode N-type region is formed on the upper surface of the P-type base region, and anode metal is formed below the anode P-type layer;
and forming a first medium thin film layer with a designated thickness on the amplifying gate metal through a deposition process.
In an embodiment of the present invention, it is,
the deposition process comprises a chemical vapor deposition process, a physical vapor deposition process, an ion beam deposition process, a filtering type vacuum cathode arc process, a pulse laser deposition process and a magnetron sputtering process, wherein the chemical vapor deposition process comprises a PECVD process;
and a second dielectric thin film layer with a specified thickness is also arranged on the upper surface of the P-type base region which is not covered by the cathode metal, the amplifying gate electrode metal and the central gate electrode metal.
In an embodiment of the present invention, it is,
the thickness of the amplifying gate metal is the same as that of the cathode metal;
the thickness of the first dielectric thin film layer and the thickness of the second dielectric thin film layer are both far smaller than the thickness of the amplification gate metal and the thickness of the cathode metal;
the first dielectric film comprises at least one of a DLC film, a silicon nitride film or a silicon oxide film;
the second dielectric film comprises a DLC film.
In an embodiment of the present invention, it is,
the designated thickness of the first dielectric DLC film layer is set to be 20-300 nm;
the designated thickness of the second medium thin film layer is set to be 20-500 nm;
the PECVD process parameters for depositing the DLC film comprise the following settings:
the vacuum pressure of the deposition chamber is set to 10-6Pa;
The flow range of the alkane gas is set to be 0-500 sccm;
setting the pressure intensity range in the deposition cavity to be 0-66.5 Pa;
the radio frequency source is set to 13.56 MHz;
setting the time range of the deposition process to be 3-10 minutes;
the temperature of the chip is kept constant in the deposition process, and the temperature of the chip in the deposition process is less than or equal to 300 ℃.
The invention provides a manufacturing method of a thyristor, which comprises the manufacturing method of the thyristor chip in any one of the above contents.
One or more embodiments of the present invention may have the following advantages over the prior art:
1. the invention realizes the suspension of the amplifying gate level by applying DLC (diamond-like carbon) film material to the thyristor structure without the height difference of a metal layer, the height difference of a silicon chip layer or a molybdenum sheet slotting structure, thereby achieving the purpose of isolating the amplifying gate level from a cathode during packaging.
2. After the structure of the invention is adopted, the heights of the central gate level, the amplifying gate level and the cathode metal layer are consistent, and the molybdenum sheet is a complete and flat molybdenum sheet, so that the risks of contamination, gas breakdown, gate-cathode short circuit caused by dislocation of a molybdenum sheet graph and a tube core graph and the like between the amplifying gate level and the cathode metal layer and further failure of the thyristor are reduced, the isolating effect of the amplifying gate level and the cathode is improved, the performance of the thyristor is improved, and the service life is prolonged.
3. After the structure is adopted, the process steps of electrode precipitation or metal layer etching are reduced, or the process of silicon wafer etching is reduced, or the process of molybdenum sheet slotting is reduced, the process complexity is reduced, and the process cost is reduced.
4. The invention can improve the heat radiation capability of the thyristor and the di/dt resistance capability of the thyristors of various types, sizes and structures by applying the DLC (diamond-like carbon) film material to the thyristor structure, is favorable for improving the performance of the thyristor and prolongs the service life.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
FIG. 1 shows an exploded view of a planar thyristor package;
FIG. 2 is a schematic diagram of a conventional thyristor chip structure;
FIG. 3 is a schematic diagram of a gate cathode structure in a conventional thyristor chip;
FIG. 4 is a schematic structural diagram of an enlarged gate-cathode isolation scheme 1 in a conventional thyristor chip;
FIG. 5 is a schematic diagram of an enlarged gate-
FIG. 6 is a schematic diagram of an enlarged gate-cathode isolation scheme 3 for a conventional thyristor chip;
FIG. 7 is a schematic structural diagram of a thyristor chip according to an embodiment of the invention;
FIG. 8 is a schematic structural diagram of a thyristor chip according to another embodiment of the invention;
FIG. 9 is a schematic flow chart of a method for fabricating a thyristor chip according to an embodiment of the invention;
fig. 10-12 are schematic structural diagrams of the thyristor chip performing step 3 according to an embodiment of the invention;
fig. 13-14 are schematic structural diagrams of a thyristor chip for performing step 4 according to an embodiment of the invention;
fig. 15 is a schematic diagram of a PEVCD process according to an embodiment of the invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the following detailed description of the present invention with reference to the accompanying drawings is provided to fully understand and implement the technical effects of the present invention by solving the technical problems through technical means. It should be noted that, as long as there is no conflict, the embodiments and the features of the embodiments of the present invention may be combined with each other, and the technical solutions formed are within the scope of the present invention.
First embodiment
Fig. 7 is a schematic structural diagram of a thyristor chip according to an embodiment of the invention, and as shown in fig. 7, the embodiment provides a thyristor chip, including: anode metal 31,
A Diamond-like carbon (DLC) film is a metastable type film of amorphous carbon containing a certain amount of Diamond bonds (sp3), the main component of the film is carbon, and carbon atoms therein are bonded by covalent bonds, and the film has excellent properties such as high infrared transmittance, high hardness, low friction coefficient, high corrosion resistance, high electrical resistivity, high thermal conductivity, high chemical stability, and the like, and has many applications in the field of power semiconductor chip manufacturing.
The embodiment provides a thyristor chip, including:
an N-
a cathode N-
a
an
a first dielectric
and an anode metal 31 under the anode P-
Specifically, the 4 layers of materials of the thyristor chip of the present embodiment are all made of semiconductor material silicon, and the total thickness of the thyristor chip is set to be 1.2 mm. An N-
the anode P-
A
A first dielectric
In summary, one or more embodiments of the present invention have the following advantages:
1. the invention realizes the suspension of the amplifying gate level by applying DLC (diamond-like carbon) film material to the thyristor structure without the height difference of a metal layer, the height difference of a silicon chip layer or a molybdenum sheet slotting structure, thereby achieving the purpose of isolating the amplifying gate level from a cathode during packaging.
2. After the structure of the invention is adopted, the heights of the central gate level, the amplifying gate level and the cathode metal layer are consistent, and the molybdenum sheet is a complete and flat molybdenum sheet, so that the risks of contamination, gas breakdown, gate-cathode short circuit caused by dislocation of a molybdenum sheet graph and a tube core graph and the like between the amplifying gate level and the cathode metal layer and further failure of the thyristor are reduced, the isolating effect of the amplifying gate level and the cathode is improved, the performance of the thyristor is improved, and the service life is prolonged.
3. After the structure is adopted, the process steps of electrode precipitation or metal layer etching are reduced, or the process of silicon wafer etching is reduced, or the process of molybdenum sheet slotting is reduced, the process complexity is reduced, and the process cost is reduced.
Second embodiment
Fig. 8 is a schematic structural diagram of a thyristor chip according to another embodiment of the invention, and as shown in fig. 8, this embodiment provides a thyristor chip, including: an anode metal 31, a
The present embodiment provides another thyristor chip, which is improved on the basis of the first embodiment, and a second dielectric
According to the invention, the DLC (diamond-like carbon) film material is applied to the thyristor chip structure, and the DLC film has high thermal conductivity, so that the heat dissipation capability of the thyristor can be improved, the di/dt resistance capability of the thyristors of various types, sizes and structures can be improved, the performance of the thyristor can be improved, and the service life of the thyristor can be prolonged.
Third embodiment
The present embodiment provides a thyristor, which includes the thyristor chip with any one of the structures in the first or second embodiments, and has the advantages of the first or second embodiments.
Fourth embodiment
FIG. 7 is a schematic structural diagram of a thyristor chip according to an embodiment of the invention;
FIG. 9 is a schematic flow chart of a method for fabricating a thyristor chip according to an embodiment of the invention;
fig. 10-12 are schematic structural diagrams of the thyristor chip performing step 3 according to an embodiment of the invention;
fig. 13-14 are schematic structural diagrams of a thyristor chip for performing step 4 according to an embodiment of the invention;
fig. 15 is a schematic diagram of a PEVCD process according to an embodiment of the invention.
As shown in fig. 7, the thyristor chip manufactured by the method for manufacturing a thyristor chip according to this embodiment includes: anode metal 31,
The embodiment provides a method for manufacturing a thyristor chip, which comprises the following steps:
step 1, synchronously forming an anode P-
and 2, forming a cathode N-
Specifically, after the surface lithography process on the P-
And step 3, simultaneously forming ohmic contact electrode metal on the cathode emission N-
Specifically, a metal layer is deposited on the upper surface of the P-
Step 4, a first dielectric
Specifically, photoresist is coated on the surfaces of the
The deposition process further comprises a chemical vapor deposition process, a physical vapor deposition process, an ion beam deposition process, a filtering type vacuum cathode arc process, a pulsed laser deposition process and a magnetron sputtering process, wherein the chemical vapor deposition process comprises a PECVD process.
In summary, the present embodiment has the following advantages:
1. in the embodiment, the thyristor structure manufactured by the method for manufacturing the thyristor chip by adopting the DLC (diamond-like carbon) film material does not need the metal layer height difference, the silicon layer height difference or the molybdenum sheet slotting structure to realize the suspension of the amplifying gate level, and the aim of isolating the amplifying gate level from the cathode in packaging can be fulfilled.
2. After the thyristor structure manufactured by the manufacturing method of the thyristor chip made of the DLC (diamond-like carbon) film material, the heights of the central gate level, the amplifying gate level and the cathode metal layer are consistent, and the molybdenum sheet is a complete and flat molybdenum sheet, so that the risk of gate cathode short circuit caused by contamination, gas breakdown, dislocation of a molybdenum sheet graph and a tube core graph and the like between the amplifying gate level and the cathode metal layer and further thyristor failure is reduced, the isolating effect of the amplifying gate level and the cathode is improved, the performance of the thyristor is favorably improved, and the service life is prolonged.
3. After the manufacturing method of the thyristor chip made of the DLC (diamond-like carbon) film material is adopted, the process steps of depositing or etching a metal layer are reduced, or the process of etching a silicon wafer is reduced, or the process of slotting a molybdenum sheet is reduced, the process complexity is reduced, and the process cost is reduced.
Fifth embodiment
As shown in fig. 8, the present embodiment provides a thyristor chip manufactured by the method for manufacturing a thyristor chip, including: an anode metal 31, a
The embodiment provides another method for manufacturing a thyristor chip, which is improved on the basis of the fourth embodiment, and a second dielectric
In the embodiment, the DLC (diamond-like carbon) film material is applied to the thyristor chip structure, and the DLC film has high thermal conductivity, so that the heat dissipation capacity of the thyristor can be improved, the di/dt resistance of thyristors of various types, sizes and structures can be improved, the performance of the thyristor can be improved, and the service life of the thyristor can be prolonged.
Sixth embodiment
This embodiment provides a method for manufacturing a thyristor, including the method for manufacturing a thyristor chip according to any one of the fourth and fifth embodiments, and the advantages are as described in the fourth and fifth embodiments.
Although the embodiments of the present invention have been described above, the above description is only for the convenience of understanding the present invention, and is not intended to limit the present invention. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as disclosed, and that the scope of the invention is not to be limited to the particular embodiments disclosed herein but is to be accorded the full scope of the claims.
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