阅读说明：本技术 用于在计算平台的多个主设备之间共享Flash设备的系统、装置和方法 (System, apparatus and method for sharing Flash device among multiple host devices of computing platform ) 是由 Z·朱 M·亨塞克 K·R·瓦迪维鲁 R·巴特 K·P·福斯特 R·巴斯卡尔 A·K·斯 于 2020-02-24 设计创作，主要内容包括：在一个实施例中,Flash共享控制器用于使得平台的多个组件能够共享Flash存储器。Flash共享控制器可以包括：Flash共享类层,包括配置控制器,用于：将多个组件配置为Flash主设备,并为Flash存储器配置Flash共享从设备；和物理层,耦合到Flash共享类层,用于经由总线与多个组件进行通信。描述并要求保护其他实施例。(In one embodiment, a Flash shared controller is used to enable multiple components of a platform to share Flash memory. The Flash sharing controller may include: the Flash sharing class layer comprises a configuration controller, and is used for: configuring a plurality of components as Flash master equipment and configuring Flash sharing slave equipment for a Flash memory; and a physical layer coupled to the Flash shared class layer for communicating with the plurality of components via the bus. Other embodiments are described and claimed.)

1. An apparatus for configuring a device, comprising:

a Flash share controller to: enabling multiple components of a platform to share a Flash memory, the Flash sharing controller comprising:

the Flash sharing class layer comprises a configuration controller, and the configuration controller is used for: configuring the components into Flash master equipment, and configuring Flash sharing slave equipment for the Flash memory; and

a physical layer coupled to the Flash shared class layer, the physical layer to: communicating with the plurality of components via a bus.

2. The apparatus of claim 1, wherein the physical layer is to: and communicating with the Flash memory via a second bus.

3. The apparatus of claim 1, wherein the Flash sharing controller further comprises a discovery controller to: the plurality of components are discovered and capability information of the plurality of components is determined.

4. The apparatus of claim 1, wherein the configuration controller is to: configuring each of the plurality of components with a maximum payload size and a region of the Flash memory.

5. The apparatus of claim 1, wherein a first subset of the plurality of components comprises a port retimer.

6. The apparatus of claim 1, wherein the apparatus comprises a peripheral controller hub comprising the Flash shared controller and at least one of the plurality of components.

7. The apparatus of claim 1, wherein a first component of the plurality of components is to:

requesting a bus master role from a bus master of the bus;

responding to the authorization of the role of the bus master equipment, and sending a Flash command to the Flash memory; and

and returning the role of the bus master device to the bus master device after receiving the completion message from the Flash memory.

8. The apparatus of claim 7, wherein the first component is to: in a completion message, one or more of firmware and configuration information is received from the Flash memory.

9. The apparatus of claim 8, wherein the first component comprises a Flash share class layer comprising a master requestor to request the bus master role from the bus master.

10. The apparatus of claim 9, wherein the Flash shared class layer of the first component is coupled between an application layer of the first component and a physical layer of the first component.

11. The apparatus of claim 1, wherein the Flash sharing controller further comprises an access permissions manager to manage access permissions of the plurality of components to the Flash memory.

12. The apparatus of claim 1, wherein the Flash memory comprises a single Flash memory of the platform and at least some of the plurality of components comprise an integrated circuit coupled to the Flash shared controller via the bus.

13. A method for transferring roles on a bus, comprising:

requesting, by a first device of a platform, a bus master role of a bus from a bus master of the bus, the bus having a plurality of devices coupled thereto;

in response to receiving the role of the bus master device in the first device, sending a Flash command to a Flash memory, the Flash memory being shared by the plurality of devices; and

in the first device, a completion message is received from a Flash memory, and after receiving the completion message, the bus master role is returned to the bus master.

14. The method of claim 13, further comprising:

and issuing a Flash command by using the address of the Flash memory, wherein the address is stored in the address storage of the first device in response to the configuration of the Flash sharing controller to the first device.

15. The method of claim 13, further comprising:

discovering the plurality of components via a Flash sharing controller and determining capability information of the plurality of components; and

configuring, via the Flash sharing controller, each of the plurality of components with a maximum payload size and a region of the Flash memory.

16. The method of claim 13, further comprising:

receiving at least one of firmware and configuration information of the first device in the completion message.

17. The method of claim 13, further comprising:

requesting, by a second device of the platform, a bus master role for a bus from a bus master;

responding to the role of the bus master device received in the second device, and sending a second Flash command to the Flash memory;

receiving, in the second device, a completion message from the Flash memory, the completion message including firmware for the second device; and

executing the firmware in the second device.

18. A computer readable storage medium storing computer readable instructions which, when executed, implement the method of any of claims 13-17.

19. A system for communicating via a serial bus, comprising:

a plurality of integrated circuits, each integrated circuit of the plurality of integrated circuits to execute corresponding firmware stored in a Flash memory;

the Flash memory is coupled to the plurality of integrated circuits through a serial bus and is used for storing corresponding firmware of the plurality of integrated circuits; and

a Flash share controller coupled to the serial bus, the Flash share controller comprising:

the Flash sharing class layer comprises a configuration controller, and is used for: configuring the plurality of integrated circuits as Flash master equipment and configuring Flash sharing slave equipment for the Flash memory; and

a physical layer coupled to the Flash shared class layer, the physical layer to communicate with the plurality of integrated circuits via the serial bus.

20. The system of claim 19, wherein the Flash sharing controller comprises a discovery controller to: the plurality of integrated circuits are discovered and capability information of the plurality of integrated circuits is determined.

21. The system of claim 19, wherein a first integrated circuit of the plurality of integrated circuits includes a Flash shared class layer, the Flash shared class layer including a requestor to request a bus master status of the bus, and in response to receiving the bus master status, the first integrated circuit to: issuing a Flash read command to the Flash memory to read a first firmware for an integrated circuit, storing the first firmware in the first integrated circuit, releasing the bus master device state, and executing the first firmware.

22. An apparatus for configuring a device, comprising:

the Flash sharing control module is used for enabling a plurality of components of the platform to share the Flash memory, and comprises:

the Flash sharing class layer module comprises a configuration control module and is used for: configuring the components into Flash master equipment, and configuring Flash sharing slave equipment for the Flash memory; and

a physical layer module coupled to the Flash shared class layer module, the physical layer module to communicate with the plurality of components via a bus.

23. The apparatus of claim 22, wherein the physical layer module is to communicate with the Flash memory via a second bus.

24. The apparatus of claim 22, wherein the Flash sharing control module further comprises a discovery control module to: the plurality of components are discovered and capability information of the plurality of components is determined.

25. The apparatus of claim 22, wherein the configuration control module is to: configuring each of the plurality of components with a maximum payload size and a region of the Flash memory.

Technical Field

Background

Many computer platforms, mobile platforms, and server platforms support advanced platform features such as Universal Serial Bus (USB) Type-C and displayport, which require external components, including bus retimers and port controllers. Each component uses Flash memory for their firmware, parameters, configuration, etc. For example, on a typical computer platform, there may be more than six USB Type-C ports, each of which requires a retimer and port controller, resulting in a total of more than 12 Flash devices being required to support these components. This adds significant bill of material (BOM) cost and board area to such systems.

Drawings

FIG. 1 is a block diagram of a system environment according to an embodiment of the present invention.

FIG. 2 is a block diagram of a system according to an embodiment of the invention.

Fig. 3 is a flow chart of a method according to an embodiment of the invention.

Fig. 4 is a flow chart of a method according to another embodiment of the invention.

Fig. 5 is an embodiment of a fabric comprised of point-to-point links interconnecting a set of components.

FIG. 6 is an embodiment of a system-on-chip design according to an embodiment.

FIG. 7 is a block diagram of a system according to an embodiment of the invention.

Embodiments relate to the interconnection of Flash (Flash) memory for multiple host accesses.