Integrated circuit layout polygon unstructured grid self-adaptive subdivision method and system
阅读说明：本技术 集成电路版图多边形非结构网格自适应细分方法和系统 (Integrated circuit layout polygon unstructured grid self-adaptive subdivision method and system ) 是由 唐章宏 邹军 汲亚飞 王芬 黄承清 于 2020-09-03 设计创作，主要内容包括：本发明涉及一种集成电路版图多边形非结构网格自适应细分方法和系统。方法包括根据丢失和被侵蚀的多边形边按顺序插入偏心中点到现有网格以恢复丢失的和消除被侵蚀的多边形边,根据设定的比值/最小角阈值确定待细分三角形,按顺序插入待细分三角形的偏心圆圆心到现有网格以消除待细分的三角形,以上恢复丢失和消除被侵蚀的多边形边以及消除待细分的三角形交织进行,直到集成电路版图多边形非结构网格中不存在丢失的和被侵蚀的多边形边以及待细分的三角形,最终形成新的超大规模集成电路版图的非结构网格,以在解决现有技术中因新插入的节点所产生的冗余而导致的局部网格过于密集的问题的同时,提高网格剖分精度和数值计算效率,减少计算内存。(The invention relates to a method and a system for adaptively subdividing a polygonal unstructured grid of an integrated circuit layout. The method comprises sequentially inserting eccentric midpoints to the existing mesh according to lost and eroded polygon edges to recover lost and eroded polygon edges, determining triangles to be subdivided according to a set ratio/minimum angle threshold, sequentially inserting eccentric circle centers of the triangles to be subdivided to the existing mesh to eliminate the triangles to be subdivided, recovering lost and eroded polygon edges and eliminating triangles to be subdivided, interleaving until no lost and eroded polygon edges and triangles to be subdivided exist in the polygon unstructured mesh of the integrated circuit layout, and finally forming a new unstructured mesh of the ultra-large scale integrated circuit layout so as to improve mesh subdivision accuracy and numerical calculation efficiency while solving the problem of over-dense local meshes caused by redundancy generated by newly inserted nodes in the prior art, and the calculation memory is reduced.)
1. A self-adaptive subdivision method for polygonal unstructured grids of an integrated circuit layout is characterized by comprising the following steps:
forming an initial Delaunay triangular mesh based on a polygon of the super-large-scale integrated circuit layout;
repeatedly inserting an eccentric midpoint into the initial Delaunay triangular mesh, eliminating the sides of the polygon of the lost ultra-large scale integrated circuit layout and the sides of the eroded polygon, and forming a first triangular mesh;
setting a triangle to be adaptively subdivided in the first triangular mesh as a triangle with poor quality or a triangle with the maximum side length larger than a set side length threshold;
obtaining the triangles to be adaptively subdivided in the initial unstructured grid of the very large scale integrated circuit layout according to a set ratio threshold, a minimum angle threshold or a side length threshold, and putting all determined triangles to be adaptively subdivided into a triangle set to be adaptively subdivided; the ratio threshold is as follows: setting a maximum limit value of the ratio of the radius of a circumscribed circle of the triangle to the length of the shortest side of the circumscribed circle;
inserting the centers of the eccentric circumcircles of all the triangles to be adaptively subdivided into the triangles to be adaptively subdivided as insertion points so as to update the non-structural mesh subdivision of the polygons of the VLSI layout and the edges of the polygons in the VLSI layout;
and returning to the step of repeatedly inserting the eccentric midpoint in the initial Delaunay triangular mesh, eliminating the edge of the polygon of the lost ultra-large scale integrated circuit layout and the edge of the eroded polygon to form the first triangular mesh until the set of triangles to be adaptively subdivided is empty.
2. The integrated circuit layout polygon unstructured grid adaptive subdivision method according to claim 1, characterized in that the circle center of the eccentric circumcircle of the triangle to be adaptively subdivided is obtained according to the following steps:
s1: determining the circle center of an circumscribed circle of the triangle to be adaptively subdivided, and setting the circle center of the circumscribed circle as a candidate point to be inserted;
s2: if the candidate to-be-inserted point does not erode the edge of any integrated circuit layout polygon and the edge of the triangle to be adaptively subdivided does not contain the edge of the integrated circuit layout polygon, the candidate to-be-inserted point is the center of the eccentric circumscribed circle of the triangle to be adaptively subdivided, and the process is finished;
s3: if it is notThe candidate to-be-inserted point erodes the polygon edge of an integrated circuit layout, a point is found on the eroded edge as the candidate to-be-inserted point, and the minimum angle of a triangle formed by the point and the adjacent edge of the eroded edge isθ threshold Setting candidate points to be inserted as the centers of the eccentric circumscribed circles of the triangles, and ending; the adjacent side is the side of the integrated circuit layout polygon which shares the vertex with the side of the integrated circuit layout polygon; the above-mentionedθ threshold The minimum angle threshold of the triangle for the quality to reach the set requirement is set;
s4: if the edge of the triangle to be adaptively subdivided comprises the edge of the polygon of the integrated circuit layout and the candidate point to be inserted and the triangle formed by the two vertexes of the edge of the triangle to be adaptively subdivided are not the triangle with poor quality, the candidate point to be inserted is the center of the eccentric circumscribed circle of the triangle, and the process is finished;
s5: if the edge of the triangle to be adaptively subdivided comprises the edge of the polygon of the integrated circuit layout, and the candidate point to be inserted and the triangle formed by two vertexes of the edge of the triangle to be adaptively subdivided are triangles with poor quality, finding one point on the midperpendicular of the edge formed by the other two vertexes of the triangle with poor quality except the candidate point to be inserted as the candidate point to be inserted, wherein the opening angle of the edge formed by the two vertexes at the point isθ threshold ；
S6: proceed to step S2.
3. The method according to claim 1, wherein the repeated inserting of the eccentric midpoint into the initial Delaunay triangular mesh eliminates the missing polygon edge of the vlsi layout and the eroded polygon edge to form the first triangular mesh, specifically comprises:
obtaining a plurality of polygons containing a plurality of vertexes in a super large scale integrated circuit layout to be subdivided;
forming an initial Delaunay triangular mesh by using the polygon vertex of the super-large-scale integrated circuit layout as a mesh node by adopting a Delaunay triangulation algorithm;
determining the sides of the lost polygon and the eroded polygon in the initial Delaunay triangular mesh, restoring the sides of the lost polygon by adopting an eccentric midpoint restoring method, and eliminating the sides of the eroded polygon by adopting an eccentric midpoint eliminating method to generate an unstructured mesh of the to-be-subdivided super-large-scale integrated circuit layout; the unstructured mesh is the first triangular mesh.
4. The adaptive subdivision method for the unstructured grid of the integrated circuit layout polygon according to claim 3, wherein the method for determining the edges of the lost polygon and the eroded polygon in the Delaunay triangular grid, restoring the edges of the lost polygon by an eccentric midpoint restoration method, and eliminating the edges of the eroded polygon by an eccentric midpoint elimination method to generate the unstructured grid of the very large scale integrated circuit layout to be subdivided specifically comprises:
arranging the Edges of the lost polygon and the Edges of the eroded polygon in ascending order according to the edge length to form a set Edges of the Edges of the lost polygon and the Edges of the eroded polygon;
sequentially extracting the Edges with the shortest side length from the set Edges, and judging the type of the Edges with the shortest side length; if the side with the shortest side length is the lost polygon side, recovering the side with the shortest side length by adopting an eccentric midpoint recovery method; and if the side with the shortest side length is the side of the eroded polygon, eliminating the side of the eroded polygon by adopting an eccentric midpoint elimination method.
5. The method according to claim 1, wherein the step of inserting the center of the eccentric circumscribed circle of the triangle to be adaptively subdivided into the triangle to be adaptively subdivided as an insertion point to update the subdivision of the unstructured mesh of the vlsi layout polygon and the edges of the polygon in the vlsi layout specifically comprises:
arranging the Triangles to be adaptively subdivided in ascending order according to the shortest side length of the Triangles to form a triangle set triangle to be adaptively subdivided;
sequentially extracting Triangles to be adaptively subdivided with shortest side length from the set Triangles, and acquiring the centers of eccentric circumscribed circles of the extracted Triangles to be adaptively subdivided;
and inserting the circle center of the eccentric circumcircle of the triangle as an insertion point into the triangle to be adaptively subdivided so as to update the non-structural mesh subdivision of the polygon of the super-large scale integrated circuit layout and the edge of the polygon in the super-large scale integrated circuit layout.
6. An adaptive subdivision system for a polygonal unstructured grid of an integrated circuit layout, comprising:
the triangular mesh acquisition module is used for forming an initial Delaunay triangular mesh based on the polygon of the super-large-scale integrated circuit layout;
the first triangular mesh forming module is used for repeatedly inserting the eccentric midpoint into the initial Delaunay triangular mesh, eliminating the sides of the polygon of the lost ultra-large scale integrated circuit layout and the sides of the eroded polygon and forming a first triangular mesh;
the triangle to be adaptively subdivided in the first triangular mesh is set to be a triangle with poor quality or a triangle with the maximum side length larger than a set side length threshold;
the triangle set generation module is used for acquiring the triangles to be adaptively subdivided in the initial unstructured grid of the very large scale integrated circuit layout according to a set ratio threshold, a minimum angle threshold or a side length threshold, and putting all the determined triangles to be adaptively subdivided into a triangle set to be adaptively subdivided; the ratio threshold is as follows: setting a maximum limit value of the ratio of the radius of a circumscribed circle of the triangle to the length of the shortest side of the circumscribed circle;
the updating module is used for inserting the centers of the eccentric circumcircles of all the triangles to be adaptively subdivided into the triangles to be adaptively subdivided as insertion points so as to update the unstructured mesh subdivision of the polygons of the VLSI layout and the edges of the polygons in the VLSI layout;
and the circulating module is used for returning to the step of repeatedly inserting the eccentric midpoint in the initial Delaunay triangular mesh, eliminating the edge of the polygon of the lost ultra-large scale integrated circuit layout and the edge of the eroded polygon to form the first triangular mesh until the set of triangles to be adaptively subdivided is empty.
7. The integrated circuit layout polygonal unstructured grid adaptive subdivision system according to claim 6, characterized by further comprising an eccentric circumcircle center acquisition module; the eccentric circumscribed circle center obtaining module comprises:
the circumscribed circle center determining unit is used for determining the center of the circumscribed circle of the triangle to be adaptively subdivided and setting the center of the circumscribed circle as a candidate point to be inserted;
a first to-be-inserted point determining unit, configured to determine, when a candidate to-be-inserted point does not erode an edge of any integrated circuit layout polygon and an edge of the to-be-adaptively subdivided triangle does not include the edge of the integrated circuit layout polygon, that the candidate to-be-inserted point is a center of an eccentric circumscribed circle of the to-be-adaptively subdivided triangle, and end;
a second to-be-inserted point determining unit, configured to find a point on the eroded edge as a candidate to-be-inserted point when the candidate to-be-inserted point erodes the edge of a polygon of the integrated circuit layout, where a minimum angle of a triangle formed by the point and an adjacent edge of the polygon of the integrated circuit layout isθ threshold Setting candidate points to be inserted as the centers of the eccentric circumscribed circles of the triangles, and ending; the adjacent side is the side of the integrated circuit layout polygon which shares the vertex with the side of the integrated circuit layout polygon; the above-mentionedθ threshold The minimum angle threshold of the triangle for the quality to reach the set requirement is set;
a third to-be-inserted point determining unit, configured to determine, when the edge of the triangle to be adaptively subdivided includes an edge of a polygon of the integrated circuit layout, and a candidate to-be-inserted point and a triangle formed by two vertices of the edge of the triangle to be adaptively subdivided are not a triangle with poor quality, that the candidate to-be-inserted point is a center of an eccentric circumscribed circle of the triangle, and end;
a fourth to-be-inserted point determining unit, configured to, when the edge of the triangle to be adaptively subdivided includes an edge of a polygon of the integrated circuit layout, and a candidate to-be-inserted point and a triangle formed by two vertices of the edge of the triangle to be adaptively subdivided are triangles with poor quality, find a point on a midperpendicular of an edge formed by two other vertices of the triangle with poor quality except the candidate to-be-inserted point as a candidate to-be-inserted point, where an opening angle of the edge formed by the two vertices of the point isθ threshold ；
And the circulating unit is used for returning and executing the step that when the candidate to-be-inserted point does not erode the edge of any integrated circuit layout polygon and the edge of the triangle to be adaptively subdivided does not contain the edge of the integrated circuit layout polygon, the candidate to-be-inserted point is the center of the eccentric circumcircle of the triangle to be adaptively subdivided.
8. The integrated circuit layout polygon unstructured mesh adaptive subdivision system according to claim 6, characterized in that the first triangular mesh forming module specifically comprises:
the polygon obtaining unit is used for obtaining a plurality of polygons which comprise a plurality of vertexes in the super-large-scale integrated circuit layout to be subdivided;
the triangle mesh forming unit is used for forming an initial Delaunay triangle mesh which takes the polygon vertex of the super-large-scale integrated circuit layout as a mesh node by adopting a Delaunay triangulation algorithm;
an unstructured grid generating unit, configured to determine a missing polygon edge and an eroded polygon edge in the initial Delaunay triangular grid, recover the missing polygon edge by using an eccentric midpoint recovery method, and eliminate the eroded polygon edge by using an eccentric midpoint elimination method, so as to generate an unstructured grid of the to-be-subdivided very large scale integrated circuit layout; the unstructured mesh is the first triangular mesh.
9. The integrated circuit layout polygon unstructured grid adaptive subdivision system according to claim 8, characterized in that the unstructured grid generating unit specifically comprises:
the aggregation forming unit is used for arranging the sides of the lost polygons and the sides of the eroded polygons in an ascending order according to the side lengths to form aggregation Edges of the sides of the lost polygons and the sides of the eroded polygons;
the edge recovery or elimination unit is used for sequentially extracting the edge with the shortest side length from the set Edges and judging the type of the edge with the shortest side length; if the side with the shortest side length is the lost polygon side, recovering the side with the shortest side length by adopting an eccentric midpoint recovery method; and if the side with the shortest side length is the side of the eroded polygon, eliminating the side of the eroded polygon by adopting an eccentric midpoint elimination method.
10. The integrated circuit layout polygon unstructured grid adaptive subdivision system according to claim 6, characterized in that the update module specifically comprises:
the set generating unit is used for performing ascending arrangement on the Triangles to be adaptively subdivided according to the shortest side length of the Triangles to form a triangle set Triangles to be adaptively subdivided;
the eccentric circumcircle center obtaining unit is used for sequentially extracting the Triangles to be adaptively subdivided with the shortest side length from the set Triangles and obtaining the eccentric circumcircle centers of the extracted Triangles to be adaptively subdivided;
and the updating unit is used for inserting the circle center of the eccentric circumcircle of the triangle into the triangle to be adaptively subdivided as an insertion point so as to update the unstructured mesh subdivision of the polygon of the super-large-scale integrated circuit layout and the side of the polygon in the super-large-scale integrated circuit layout.
Technical Field
The invention relates to the field of circuit layout unstructured mesh subdivision, in particular to a method and a system for adaptively subdividing polygonal unstructured meshes of an integrated circuit layout.
Background
The unstructured mesh subdivision of the multilayer ultra-large scale integrated circuit layout is the basis of the numerical calculation of the verification electromagnetic field at the rear end of the integrated circuit. In order to accurately analyze the power integrity and the signal integrity of the ultra-large scale integrated circuit, a strict numerical calculation method is adopted to calculate the distribution of an electromagnetic field in the integrated circuit, the accuracy of the numerical calculation of the electromagnetic field depends on the dispersion of a calculation field area to a great extent, namely, the quality of field area mesh subdivision is calculated, and the number of generated mesh nodes directly determines the precision and the speed of numerical calculation. For the integrated circuit with a multi-scale structure with more and more complex structure and a scale range from centimeter to nanometer in recent years, the traditional structural mesh subdivision is not applicable any longer, and the unstructured mesh subdivision is required to be adopted to accurately match the layout boundary with complex structure. On the premise of ensuring the numerical calculation accuracy (the same grid quality and the maximum grid unit size), how to generate the minimum grid nodes by adopting the unstructured grid subdivision has great significance, because the reduction of the grid nodes can directly improve the numerical calculation speed and reduce the used memory size.
Although the unstructured mesh generation is widely applied to many fields, such as electromagnetic field numerical calculation, three-dimensional reconstruction, computer graphics and the like of complex electrical structures, the unstructured mesh generation plays a very important role in the aspect of verifying electromagnetic field simulation at the back end of a multilayer very large scale integrated circuit. Because the power layer of the multilayer very large scale integrated circuit usually has very complicated routing and layout, the traditional transmission line method or the finite difference method cannot process the integrated circuit with a multi-scale structure with the scale range from centimeter to nanometer, therefore, the non-structural grid is required to be adopted for accurate identification, the high-quality grid unit is adopted for subdividing the layout area of the very large scale integrated circuit, and then the electromagnetic field numerical calculation method is adopted for high-accuracy calculation of the distribution of the electromagnetic field on the very large scale integrated circuit.
Aiming at the characteristics of the super-large scale integrated circuit layout, a two-dimensional non-structural triangular grid can be adopted to carry out grid subdivision on each layer of layout and a coupling area between different layers. Due to the extremely complex layout structure, when the grid division is carried out on the layout area, high-quality triangular grid units are needed, and nodes and grid units are needed as few as possible.
The mass of a triangle is defined as the ratio of the radius of the triangle's circumscribed circle to the length of the shortest side, and a larger ratio indicates a poorer quality of the triangle. Generally, a threshold value of the ratio is set, and when the ratio is greater than the threshold value, the quality of the triangle is considered to be not satisfactory, and a new node needs to be further inserted for subdivision to improve the quality of the triangle unit. Since the ratio defining the unit mass of a triangle is equal to
The method for generating the two-dimensional high-quality Delaunay triangulation of the ultra-large scale integrated circuit layout polygon comprises two steps of eliminating the edge of the lost or eroded ultra-large scale integrated circuit layout polygon in the mesh subdivision and improving the quality of a mesh unit. The algorithm firstly eliminates the edge of the polygon of the ultra-large scale integrated circuit layout which is lost or eroded in the mesh subdivision by the method of the insertion point. If the edge of the polygon of the VLSI layout is lost or eroded, the traditional algorithm will continue to insert the midpoint of the edge of the polygon into the current Delaunay triangulation, divide the edge of the polygon into two sub-edges, and repeat the operation until the edge of the polygon is not lost or eroded. Missing polygon edges here means that the edge of this polygon defines the boundary of the integrated circuit layout, but the edge of this polygon is not in the triangle mesh (not the edge of any triangle cell of the triangle mesh); the eroded polygon edge means that a circle with the polygon edge as a diameter contains some other mesh nodes, and the polygon edge is called the eroded polygon edge. After there are no missing or eroded edges of the polygon, the quality of the triangles in the mesh subdivision is improved again by inserting new nodes. For a triangle with poor quality, the conventional algorithm tries to insert the center of the circumscribed circle of the triangle into the current Delaunay triangulation mesh. However, if the center of the circumscribed circle erodes an edge of a polygon (i.e., the center is within the circle of the diameter of the edge of the polygon), the algorithm does not insert this center, but instead inserts the midpoints of all the eroded edges of the polygon into the current Delaunay triangulation mesh.
Then, based on the method, in the process of eliminating the edge of the polygon of the VLSI layout lost or eroded in the mesh subdivision, no matter what the situation is, a new node is inserted into the mesh at the midpoint of the edge of the lost or eroded polygon uniformly and repeatedly, and the edge is divided into two until the edge of the lost or eroded polygon does not exist. Secondly, for a triangle with poor quality, in the case that the center of the circumscribed circle of the triangle does not erode the sides of other polygons, the given solution is to insert a new node at the center of the circumscribed circle, and if the center of the circumscribed circle erodes the sides of other polygons, new nodes are inserted at the midpoints of all the eroded sides, so that the conventional algorithm does not pay attention to the order of new insertion points.
Based on the above features of the conventional algorithm, although the conventional algorithm can ensure generation of a high-quality two-dimensional unstructured triangular mesh, the problem of generation of too dense meshes in some local areas is also caused, so that numerical calculation requires more calculation time and larger memory.
Therefore, it is a technical problem to be solved in the art to provide a method or a system for adaptively subdividing an unstructured polygonal mesh of an integrated circuit layout, which can improve mesh subdivision accuracy, improve numerical computation efficiency, and reduce computation memory.
Disclosure of Invention
The invention aims to provide a method and a system for adaptively subdividing a polygonal unstructured grid of an integrated circuit layout, which aim to solve the problem that grids generated in some local areas are too dense in the existing grid subdividing technology, so that the grid subdividing precision is improved, the numerical calculation efficiency is improved, and the calculation memory is reduced.
In order to achieve the purpose, the invention provides the following scheme:
a self-adaptive subdivision method for polygonal unstructured grids of an integrated circuit layout comprises the following steps:
forming an initial Delaunay triangular mesh based on a polygon of the super-large-scale integrated circuit layout;
repeatedly inserting an eccentric midpoint into the initial Delaunay triangular mesh, eliminating the sides of the polygon of the lost ultra-large scale integrated circuit layout and the sides of the eroded polygon, and forming a first triangular mesh;
setting a triangle to be adaptively subdivided in the first triangular mesh as a triangle with poor quality or a triangle with the maximum side length larger than a set side length threshold;
obtaining the triangles to be adaptively subdivided in the initial unstructured grid of the very large scale integrated circuit layout according to a set ratio threshold, a minimum angle threshold or a side length threshold, and putting all determined triangles to be adaptively subdivided into a triangle set to be adaptively subdivided; the ratio threshold is as follows: setting a maximum limit value of the ratio of the radius of a circumscribed circle of the triangle to the length of the shortest side of the circumscribed circle;
inserting the centers of the eccentric circumcircles of all the triangles to be adaptively subdivided into the triangles to be adaptively subdivided as insertion points so as to update the non-structural mesh subdivision of the polygons of the VLSI layout and the edges of the polygons in the VLSI layout;
and returning to the step of repeatedly inserting the eccentric midpoint in the initial Delaunay triangular mesh, eliminating the edge of the polygon of the lost ultra-large scale integrated circuit layout and the edge of the eroded polygon to form the first triangular mesh until the set of triangles to be adaptively subdivided is empty.
Preferably, the circle center of the eccentric circumscribed circle of the triangle to be adaptively subdivided is obtained according to the following steps:
s1: determining the circle center of an circumscribed circle of the triangle to be adaptively subdivided, and setting the circle center of the circumscribed circle as a candidate point to be inserted;
s2: if the candidate to-be-inserted point does not erode the edge of any integrated circuit layout polygon and the edge of the triangle to be adaptively subdivided does not contain the edge of the integrated circuit layout polygon, the candidate to-be-inserted point is the center of the eccentric circumscribed circle of the triangle to be adaptively subdivided, and the process is finished;
s3: if the candidate to-be-inserted point erodes the edge of a polygon of the integrated circuit layout, finding a point on the eroded edge as the candidate to-be-inserted point, wherein the minimum angle of a triangle formed by the point and the adjacent edge of the polygon of the integrated circuit layout is equal toθ threshold Setting candidate points to be inserted as the centers of the eccentric circumscribed circles of the triangles, and ending; the adjacent side is the side of the integrated circuit layout polygon which shares the vertex with the side of the integrated circuit layout polygon; the above-mentionedθ threshold The minimum angle threshold of the triangle for the quality to reach the set requirement is set;
s4: if the edge of the triangle to be adaptively subdivided comprises the edge of the polygon of the integrated circuit layout and the candidate point to be inserted and the triangle formed by the two vertexes of the edge of the triangle to be adaptively subdivided are not the triangle with poor quality, the candidate point to be inserted is the center of the eccentric circumscribed circle of the triangle, and the process is finished;
s5: if the edge of the triangle to be adaptively subdivided contains the edge of the polygon of the integrated circuit layout, and the candidate point to be inserted and the triangle formed by the two vertexes of the edge of the triangle to be adaptively subdivided are triangles with poor qualityFinding a point on the midperpendicular of the edge formed by the other two vertexes of the triangle except the candidate point to be inserted as the candidate point to be inserted, wherein the opening angle of the edge formed by the two vertexes of the point to be inserted isθ threshold ；
S6: proceed to step S2.
Preferably, the repeatedly inserting the eccentric midpoint into the initial Delaunay triangular mesh to eliminate the edge of the polygon of the lost vlsi layout and the edge of the eroded polygon to form the first triangular mesh specifically includes:
obtaining a plurality of polygons containing a plurality of vertexes in a super large scale integrated circuit layout to be subdivided;
forming an initial Delaunay triangular mesh by using the polygon vertex of the super-large-scale integrated circuit layout as a mesh node by adopting a Delaunay triangulation algorithm;
determining the sides of the lost polygon and the eroded polygon in the initial Delaunay triangular mesh, restoring the sides of the lost polygon by adopting an eccentric midpoint restoring method, and eliminating the sides of the eroded polygon by adopting an eccentric midpoint eliminating method to generate an unstructured mesh of the to-be-subdivided super-large-scale integrated circuit layout; the unstructured mesh is the first triangular mesh.
Preferably, the determining the edges of the lost polygons and the edges of the eroded polygons in the Delaunay triangular meshes, and recovering the edges of the lost polygons by using an eccentric midpoint recovery method, and eliminating the edges of the eroded polygons by using an eccentric midpoint elimination method to generate the unstructured meshes of the to-be-subdivided very large scale integrated circuit layout specifically includes:
arranging the Edges of the lost polygon and the Edges of the eroded polygon in ascending order according to the edge length to form a set Edges of the Edges of the lost polygon and the Edges of the eroded polygon;
sequentially extracting the Edges with the shortest side length from the set Edges, and judging the type of the Edges with the shortest side length; if the side with the shortest side length is the lost polygon side, recovering the side with the shortest side length by adopting an eccentric midpoint recovery method; and if the side with the shortest side length is the side of the eroded polygon, eliminating the side of the eroded polygon by adopting an eccentric midpoint elimination method.
Preferably, the step of inserting the circle center of the eccentric circumscribed circle of the triangle to be adaptively subdivided into the triangle to be adaptively subdivided as an insertion point to update the non-structural mesh subdivision of the polygon of the vlsi layout and the edge of the polygon in the vlsi layout specifically includes:
arranging the Triangles to be adaptively subdivided in ascending order according to the shortest side length of the Triangles to form a triangle set triangle to be adaptively subdivided;
sequentially extracting Triangles to be adaptively subdivided with shortest side length from the set Triangles, and acquiring the centers of eccentric circumscribed circles of the extracted Triangles to be adaptively subdivided;
and inserting the circle center of the eccentric circumcircle of the triangle as an insertion point into the triangle to be adaptively subdivided so as to update the non-structural mesh subdivision of the polygon of the super-large scale integrated circuit layout and the edge of the polygon in the super-large scale integrated circuit layout.
An integrated circuit layout polygon unstructured grid adaptive subdivision system, comprising:
the triangular mesh acquisition module is used for forming an initial Delaunay triangular mesh based on the polygon of the super-large-scale integrated circuit layout;
the first triangular mesh forming module is used for repeatedly inserting the eccentric midpoint into the initial Delaunay triangular mesh, eliminating the sides of the polygon of the lost ultra-large scale integrated circuit layout and the sides of the eroded polygon and forming a first triangular mesh;
the triangle to be adaptively subdivided in the first triangular mesh is set to be a triangle with poor quality or a triangle with the maximum side length larger than a set side length threshold;
the triangle set generation module is used for acquiring the triangles to be adaptively subdivided in the initial unstructured grid of the very large scale integrated circuit layout according to a set ratio threshold, a minimum angle threshold or a side length threshold, and putting all the determined triangles to be adaptively subdivided into a triangle set to be adaptively subdivided; the ratio threshold is as follows: setting a maximum limit value of the ratio of the radius of a circumscribed circle of the triangle to the length of the shortest side of the circumscribed circle;
the updating module is used for inserting the centers of the eccentric circumcircles of all the triangles to be adaptively subdivided into the triangles to be adaptively subdivided as insertion points so as to update the unstructured mesh subdivision of the polygons of the VLSI layout and the edges of the polygons in the VLSI layout;
and the circulating module is used for returning to the step of repeatedly inserting the eccentric midpoint in the initial Delaunay triangular mesh, eliminating the edge of the polygon of the lost ultra-large scale integrated circuit layout and the edge of the eroded polygon to form the first triangular mesh until the set of triangles to be adaptively subdivided is empty.
Preferably, the device also comprises an eccentric circumcircle center acquisition module; the eccentric circumscribed circle center obtaining module comprises:
the circumscribed circle center determining unit is used for determining the center of the circumscribed circle of the triangle to be adaptively subdivided and setting the center of the circumscribed circle as a candidate point to be inserted;
a first to-be-inserted point determining unit, configured to determine, when a candidate to-be-inserted point does not erode an edge of any integrated circuit layout polygon and an edge of the to-be-adaptively subdivided triangle does not include the edge of the integrated circuit layout polygon, that the candidate to-be-inserted point is a center of an eccentric circumscribed circle of the to-be-adaptively subdivided triangle, and end;
a second to-be-inserted point determining unit, configured to find a point on the eroded edge as a candidate to-be-inserted point when the candidate to-be-inserted point erodes the edge of a polygon of the integrated circuit layout, where a minimum angle of a triangle formed by the point and an adjacent edge of the polygon of the integrated circuit layout isθ threshold Setting candidate to-be-inserted points to be off-center of a triangleConnecting the circle center, and finishing; the adjacent side is the side of the integrated circuit layout polygon which shares the vertex with the side of the integrated circuit layout polygon; the above-mentionedθ threshold The minimum angle threshold of the triangle for the quality to reach the set requirement is set;
a third to-be-inserted point determining unit, configured to determine, when the edge of the triangle to be adaptively subdivided includes an edge of a polygon of the integrated circuit layout, and a candidate to-be-inserted point and a triangle formed by two vertices of the edge of the triangle to be adaptively subdivided are not a triangle with poor quality, that the candidate to-be-inserted point is a center of an eccentric circumscribed circle of the triangle, and end;
a fourth to-be-inserted point determining unit, configured to, when the edge of the triangle to be adaptively subdivided includes an edge of a polygon of the integrated circuit layout, and a candidate to-be-inserted point and a triangle formed by two vertices of the edge of the triangle to be adaptively subdivided are triangles with poor quality, find a point on a midperpendicular of an edge formed by two other vertices of the triangle with poor quality except the candidate to-be-inserted point as a candidate to-be-inserted point, where an opening angle of the edge formed by the two vertices of the point isθ threshold ；
And the circulating unit is used for returning and executing the step that when the candidate to-be-inserted point does not erode the edge of any integrated circuit layout polygon and the edge of the triangle to be adaptively subdivided does not contain the edge of the integrated circuit layout polygon, the candidate to-be-inserted point is the center of the eccentric circumcircle of the triangle to be adaptively subdivided.
Preferably, the first triangular mesh forming module specifically includes:
the polygon obtaining unit is used for obtaining a plurality of polygons which comprise a plurality of vertexes in the super-large-scale integrated circuit layout to be subdivided;
the triangle mesh forming unit is used for forming an initial Delaunay triangle mesh which takes the polygon vertex of the super-large-scale integrated circuit layout as a mesh node by adopting a Delaunay triangulation algorithm;
an unstructured grid generating unit, configured to determine a missing polygon edge and an eroded polygon edge in the initial Delaunay triangular grid, recover the missing polygon edge by using an eccentric midpoint recovery method, and eliminate the eroded polygon edge by using an eccentric midpoint elimination method, so as to generate an unstructured grid of the to-be-subdivided very large scale integrated circuit layout; the unstructured mesh is the first triangular mesh.
Preferably, the unstructured grid generating unit specifically includes:
the aggregation forming unit is used for arranging the sides of the lost polygons and the sides of the eroded polygons in an ascending order according to the side lengths to form aggregation Edges of the sides of the lost polygons and the sides of the eroded polygons;
the edge recovery or elimination unit is used for sequentially extracting the edge with the shortest side length from the set Edges and judging the type of the edge with the shortest side length; if the side with the shortest side length is the lost polygon side, recovering the side with the shortest side length by adopting an eccentric midpoint recovery method; and if the side with the shortest side length is the side of the eroded polygon, eliminating the side of the eroded polygon by adopting an eccentric midpoint elimination method.
Preferably, the update module specifically includes:
the set generating unit is used for performing ascending arrangement on the Triangles to be adaptively subdivided according to the shortest side length of the Triangles to form a triangle set Triangles to be adaptively subdivided;
the eccentric circumcircle center obtaining unit is used for sequentially extracting the Triangles to be adaptively subdivided with the shortest side length from the set Triangles and obtaining the eccentric circumcircle centers of the extracted Triangles to be adaptively subdivided;
and the updating unit is used for inserting the circle center of the eccentric circumcircle of the triangle into the triangle to be adaptively subdivided as an insertion point so as to update the unstructured mesh subdivision of the polygon of the super-large-scale integrated circuit layout and the side of the polygon in the super-large-scale integrated circuit layout. According to the specific embodiment provided by the invention, the invention discloses the following technical effects:
the invention provides a method and a system for adaptively subdividing an integrated circuit layout polygon unstructured grid, which judge whether a triangle formed by any two vertexes in an extracted triangle with poor quality and a corresponding external circle center belongs to the triangle with poor quality or not according to a set ratio threshold, further determine a vertex on a perpendicular bisector of the side of the triangle with poor quality to be inserted into the existing triangular grid as a new insertion point, further update the grid subdivision of an unstructured grid graph and the side of a polygon in a very large scale integrated circuit layout, form a new unstructured grid graph of the very large scale integrated circuit layout, and improve the grid subdivision precision and the numerical calculation efficiency and reduce the calculation memory while solving the problem that a local grid is too dense due to redundancy generated by a newly inserted node in the prior art.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without inventive exercise.
FIG. 1 is a flow chart of a method for adaptively subdividing a polygonal unstructured grid of an integrated circuit layout according to the present invention;
FIG. 2 is a schematic diagram illustrating a principle of closest point selection according to an embodiment of the present invention;
FIG. 3 is a schematic structural diagram of a Delaunay triangular mesh after insertion of an eccentric midpoint according to an embodiment of the present invention;
FIG. 4 is a schematic view of a first position of the eccentric midpoint of a selected eroded edge in accordance with an embodiment of the present invention;
FIG. 5 is a second position schematic of the eccentric midpoint of the selected eroded edge of an embodiment of the present invention;
FIG. 6 is a schematic diagram illustrating the determination of the circumscribed circle center of a triangle of poor quality according to an embodiment of the present disclosure;
FIG. 7 is a diagram illustrating a given quality mesh subdivision transitioning from a minimum size to a maximum size under ideal conditions in an embodiment of the present invention;
FIG. 8 is a graph of a mesh generation result with random sequential insertion of eccentric midpoints and eccentric centers according to an embodiment of the present invention;
FIG. 9 is a mesh generation result diagram of the eccentric midpoint and the eccentric center inserted in the order of the side length from small to large in the embodiment of the present invention;
fig. 10 is a schematic structural diagram of an integrated circuit layout polygon unstructured grid adaptive subdivision system provided by the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The invention aims to provide a method and a system for adaptively subdividing a polygonal unstructured grid of an integrated circuit layout, which aim to solve the problem that grids generated in some local areas are too dense in the prior art, so that the grid subdivision precision is improved, the numerical calculation efficiency is improved, and the calculation memory is reduced.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.
Fig. 1 is a flowchart of a method for adaptively subdividing a polygonal unstructured grid of an integrated circuit layout according to the present invention, and as shown in fig. 1, the method for adaptively subdividing the polygonal unstructured grid of the integrated circuit layout includes:
step 100: forming an initial Delaunay triangular mesh based on a polygon of the super-large-scale integrated circuit layout;
step 101: repeatedly inserting an eccentric midpoint into the initial Delaunay triangular mesh, eliminating the sides of the polygon of the lost ultra-large scale integrated circuit layout and the sides of the eroded polygon, and forming a first triangular mesh;
step 102: setting a triangle to be adaptively subdivided in the first triangular mesh as a triangle with poor quality or a triangle with the maximum side length larger than a set side length threshold; the triangle quality is defined as the ratio of the radius of the circumscribed circle of the triangle to the length of the shortest side of the circumscribed circle, and the larger the ratio is, the worse the triangle quality is.
Step 103: obtaining the triangles to be adaptively subdivided in the initial unstructured grid of the very large scale integrated circuit layout according to a set ratio threshold, a minimum angle threshold or a side length threshold, and putting all determined triangles to be adaptively subdivided into a triangle set to be adaptively subdivided; the ratio threshold is as follows: and setting a maximum limit value of the ratio of the radius of the circumscribed circle of the triangle to the length of the shortest side of the circumscribed circle. Because the ratio of the radius of the circumscribed circle of the triangle to the length of the shortest side thereof is also equal toHere, theIs the minimum angle of the triangle, so the quality of the triangle unit can also be defined by the minimum angle of the triangle, and the minimum angle threshold of the triangle which defines the quality of the triangle to meet the requirement is corresponding to the ratio thresholdθ threshold If the minimum angle of the triangle is less than the minimum angle thresholdθ threshold Considering that the quality of the triangle does not meet the requirement, mesh subdivision is needed; the side length threshold is as follows: the maximum side length of the triangle is not more than a preset side length threshold, and if the maximum side length of the triangle is more than the side length threshold, the triangle needs to be subjected to mesh subdivision;
step 104: inserting the circle center of the eccentric circumcircle of the triangle to be adaptively subdivided into the triangle to be adaptively subdivided as an insertion point so as to update the non-structural mesh subdivision of the polygon of the super-large scale integrated circuit layout and the edge of the polygon in the super-large scale integrated circuit layout;
step 106: and repeating the steps until the triangle set to be adaptively subdivided is empty.
Preferably, the circle center of the eccentric circumcircle of the triangle is obtained according to the following steps:
s1: calculating the center of a circumscribed circle of the triangle, and setting the center of the circumscribed circle as a candidate point to be inserted;
s2: if the candidate to-be-inserted point does not erode the side of any integrated circuit layout polygon and the side of the triangle does not contain the side of the integrated circuit layout polygon, the candidate to-be-inserted point is the center of the eccentric circumscribed circle of the triangle, and the operation is finished;
s3: if the candidate to-be-inserted point erodes the edge of a polygon of the integrated circuit layout, finding a point on the eroded edge as the candidate to-be-inserted point, wherein the minimum angle of a triangle formed by the point and the adjacent edge of the polygon of the integrated circuit layout is equal toθ threshold Setting candidate points to be inserted as the centers of the eccentric circumscribed circles of the triangles, and ending; the adjacent edge of the integrated circuit layout polygon refers to the edge of any integrated circuit layout polygon which shares a vertex with the edge of the integrated circuit layout polygon; by "common vertex" is meant that two edges of the polygon have a same vertex.
S4: if the side of the triangle comprises the side of the polygon of the integrated circuit layout and the candidate to-be-inserted point and the triangle formed by the two vertexes of the side of the triangle comprising the side of the polygon of the integrated circuit layout are not triangles with poor quality, the candidate to-be-inserted point is the center of an eccentric circumscribed circle of the triangle, and the operation is finished;
s5: if the side of the triangle comprises the side of the integrated circuit layout polygon, and the candidate to-be-inserted point and the triangle formed by two vertexes of the side of the triangle comprising the side of the integrated circuit layout polygon are triangles with poor quality, finding one point on the perpendicular bisector of the side formed by the other two vertexes of the triangle with poor quality except the candidate to-be-inserted point as the candidate to-be-inserted point, wherein the opening angle of the side formed by the two vertexes at the point isθ threshold ；
S6: the process proceeds to S2.
Preferably, the repeatedly inserting the eccentric midpoint into the initial Delaunay triangular mesh to eliminate the edge of the polygon of the lost vlsi layout and the edge of the eroded polygon to form the first triangular mesh specifically includes:
obtaining a plurality of polygons containing a plurality of vertexes in a super large scale integrated circuit layout to be subdivided;
forming a Delaunay triangular grid by using the polygon vertex of the super-large-scale integrated circuit layout as a grid node by adopting a Delaunay triangulation algorithm;
determining the sides of the lost polygon and the eroded polygon in the Delaunay triangular mesh, restoring the sides of the lost polygon by adopting an eccentric midpoint restoration method, and eliminating the sides of the eroded polygon by adopting an eccentric midpoint elimination method to generate the unstructured mesh of the to-be-subdivided VLSI (very large scale integration) layout.
Preferably, the determining the edges of the lost polygons and the edges of the eroded polygons in the Delaunay triangular meshes, and recovering the edges of the lost polygons by using an eccentric midpoint recovery method, and eliminating the edges of the eroded polygons by using an eccentric midpoint elimination method to generate the unstructured meshes of the to-be-subdivided very large scale integrated circuit layout specifically includes:
arranging the Edges of the lost polygon and the Edges of the eroded polygon in ascending order according to the edge length to form a set Edges of the Edges of the lost polygon and the Edges of the eroded polygon;
sequentially extracting the Edges with the shortest side length from the set Edges, and judging the type of the Edges with the shortest side length; if the side with the shortest side length is the lost polygon side, recovering the side with the shortest side length by adopting an eccentric midpoint recovery method; and if the side of the eroded polygon with the side with the shortest side length is the side with the shortest side length, eliminating the side with the shortest side length by adopting an eccentric midpoint elimination method.
Preferably, the triangles to be adaptively subdivided in the non-structural mesh are determined according to the set ratio threshold, the minimum angle threshold and the side length threshold, and all the determined triangles to be adaptively subdivided are placed into the triangle set to be adaptively subdivided; inserting the center of the eccentric circumcircle of the triangle as an insertion point into the existing triangular mesh to update the non-structural mesh subdivision of the polygon of the super-large-scale integrated circuit layout and the side of the polygon in the super-large-scale integrated circuit layout, and the method specifically comprises the following steps:
arranging the Triangles to be adaptively subdivided in ascending order according to the shortest side length of the Triangles to form a triangle set triangle to be adaptively subdivided;
sequentially extracting the side with the shortest side length of the triangle from the set Triangles, and acquiring the center of the eccentric circumscribed circle of the triangle according to the step of acquiring the center of the eccentric circumscribed circle of the triangle;
and inserting the circle center of the eccentric circumcircle of the triangle into the existing triangular mesh as an insertion point so as to update the non-structural mesh subdivision of the polygon of the super-large-scale integrated circuit layout and the side of the polygon in the super-large-scale integrated circuit layout.
In the following, a specific example is used to describe the above-mentioned integrated circuit layout polygon unstructured mesh adaptive subdivision method provided by the present invention, and in the practical application process, those skilled in the art may modify the method based on the specific embodiment provided by the present invention according to the actual needs, but all of the methods belong to the protection scope of the technical solution provided by the present invention.
For a multilayer ultra-large scale integrated circuit, when the electromagnetic field of the multilayer ultra-large scale integrated circuit is solved with high precision by a numerical calculation method, high-quality mesh subdivision needs to be carried out on the layout. An integrated circuit layout is usually described by polygons, and for a metal region in the layout, a positive (counterclockwise) polygon is used for description, while for an insulation region in the layout, a negative (clockwise) polygon is used for description. The task of mesh generation is to divide the forward polygons into non-overlapping and non-gap segments by using one or more small-sized units. The smaller the cell size, the closer the segmented cell is to the ideal shape (two-dimensional: regular triangle, square, three-dimensional: regular tetrahedron, cube, etc.), the higher the numerical calculation accuracy based on such segmented cells. For an integrated circuit layout area with a complex structure, a non-structural grid is usually adopted for grid subdivision. Firstly, performing initial mesh subdivision on polygons for describing a super-large-scale integrated circuit layout by adopting a Delaunay method to form all vertexes of the polygons as initial mesh nodes, and adding the vertexes of the polygons into a Delaunay triangular mesh one by adopting the Delaunay method.
In the triangular mesh generated by the Delaunay method, all vertexes of the polygon of the super-large scale integrated circuit layout are added into the triangular mesh, but the sides of the polygon of the super-large scale integrated circuit layout are not necessarily all sides of a triangle, namely, the triangle exists, at least one side of the triangle is intersected with the side of the polygon of the super-large scale integrated circuit layout, and the triangle spans at least two different areas, which is the situation that the mesh subdivision is not allowed to occur. Therefore, it is necessary to eliminate such a triangle by an appropriate means and restore the side of a polygon (missing polygon side) that is not a triangle side to the side of the triangle. The edge of the polygon can be recovered by adopting a method of inserting a new mesh node, the traditional method is to insert a new mesh node in the middle point of the lost edge, add the mesh node into the existing triangular mesh to form a new triangular mesh, simultaneously, the edge of the original lost polygon is also divided into two edges by the middle point, and then, only whether the subdivided edge is the edge of the lost polygon is judged. This process is repeated until all the polygon edges are the triangle edges in the mesh, i.e., there are no missing polygon edges.
Based on the above concept, the method adopts an eccentric midpoint recovery method to recover the lost polygon edges. The process of recovering the edge of the lost polygon by using the eccentric midpoint recovery method specifically comprises the following steps:
from the first vertex of the edge of the missing polygonAAnd a second vertexBStarting respectively, all vertices of the edge intersecting the edge of the missing polygon are found.
Determining at said lossIf the vertex closest to the first vertex A or the second vertex B of the edge of the lost polygon is the closest point C, among all the vertices within the edge diameter circle of the polygonExchanging the first vertexAAnd said second vertexBIs located such that. As shown in fig. 2, the edgeIncludes a vertexCAnd vertexDVertex, pointCEdge separationTop point of (2)BMost recently, so select the vertexCThe nearest vertex. In fig. 2, the sides of the polygon are indicated by thick lines.
Determining the eccentric center point on the edge of the lost polygon according to the set conditionsO. The setting conditions are as follows: the eccentric center pointOSo thatEqual to the minimum angular threshold of the triangleθ threshold 。
Judging line segmentAnd
Centering the eccentric center pointOInserting into the edge of the lost polygon to form a new polygon edge
And judging whether the first Delaunay triangular mesh has the edge of the lost polygon. And if the lost polygon edge exists, returning to the step of finding all the vertexes of the edge intersected with the lost polygon edge starting from the first vertex A and the second vertex B of the lost polygon edge respectively until all the lost polygon edges are recovered.
The step of, if there is a missing polygon edge, returning to the step of finding all vertices of the edge intersecting with the missing polygon edge from the first vertex a and the second vertex B of the missing polygon edge, respectively, until all missing polygon edges are restored, preferably includes:
if there are missing edges of the polygon, adding all the missing edges in the first Delaunay triangle mesh to the missing polygon's set of edges.
And calling a lost edge from the edge set of the lost polygon, and performing a step of finding all the vertexes of the edge intersected with the edge of the lost polygon starting from the first vertex A and the second vertex B of the edge of the lost polygon respectively until the edges of all the lost polygons in the edge set of the lost polygon are recovered.
When the grid division is carried out on the solving area, the quality of the grid unit is required to meet certain requirements, and the condition number of a solving matrix generated by numerical calculation is increased due to the fact that triangles with poor quality are close to singular, so that the solving error is directly increased; meanwhile, the size of the grid also meets certain requirements, namely the maximum side length of the grid unit cannot be larger than a set side length threshold, otherwise, the solving error cannot meet the requirements due to too large grid size. By adopting the above step of recovering the lost polygon edge, although the lost edge of the polygon in the integrated circuit layout can be eliminated, and it is ensured that the edges of all polygons are the edges of the triangle unit in the mesh subdivision, in the process of recovering the lost edge, there may be a triangle with poor quality or a triangle with a size larger than a set edge length threshold, and therefore, the triangles with poor quality and large size must be eliminated to ensure the accuracy of numerical calculation.
In the conventional method, a new node is inserted into an existing mesh by inserting the new node near a triangle with poor quality and large size, that is, the Delaunay criterion is adopted, so that the vertices of the triangle near the new node are connected with the new node to form a new triangle, thereby eliminating the triangle with poor quality and large size.
The premise of applying the Delaunay criterion is that the existing triangular meshes conform to the Delaunay criterion, that is, the circumscribed circles of all the triangles do not strictly contain the vertices of any triangle. Conversely, if the diametric circle of an edge of a certain polygon contains the vertices of a certain triangle, the edge of this triangle does not meet the Delaunay criterion, requiring the insertion of a new node to eliminate the edge of this polygon. The conventional approach defines the edges of such polygons as eroded polygon edges, however, the present invention considers this definition too loose, which allows more polygon edges to be selected as eroded polygon edges, resulting in the insertion of more redundant nodes. Based on this deficiency, the present invention redefines the edges of the eroded polygons to be: if the diameter circle of the polygon edge contains other mesh nodes and at least one of the connected triangles is a triangle of poor quality, the edge is the eroded polygon edge. Based on this definition, the present invention provides an off-center midpoint elimination method to eliminate the edges of the eroded polygon.
The process of eliminating the eroded polygon edge by the eccentric midpoint elimination method specifically includes:
determining a first vertex of an eroded side of a diametric circle of an edge of the eroded polygonOr second vertex
Finding eccentric midpoints on the sides of the eroded polygon
Judging line segment
Centering the eccentric center point
And judging whether the second Delaunay triangular mesh has the eroded polygon edge. If the eroded polygon edge exists, returning to determine the first vertex of the eroded polygon edge in the diameter circle of the eroded polygon edge
In the above process, if there is an eroded polygon edge, the first vertex between the diameter circle of the eroded polygon edge and the eroded polygon edge is determinedOr second vertexA vertex nearest to the vertex
if there are edges of the eroded polygon, adding the edges of the eroded polygon in all of the second Delaunay triangular meshes to the set of edges of the eroded polygon.
Retrieving an edge of an eroded polygon from the set of edges of the eroded polygon, and performing a determination of a first vertex of the circle of diameters of the edge of the eroded polygon corresponding to the edge of the eroded polygon
For a triangle with poor quality or a triangle with a maximum side length larger than a set side length threshold, the traditional method is to calculate the center of a circumscribed circle of the triangle, and insert the center into the existing mesh according to the Delaunay criterion, which will cause the following problems: 1) the newly inserted center of the circle may fall near the edge of the polygon of the vlsi layout, causing the edge of the polygon to become the edge of the eroded polygon. 2) Newly introducing an eroded polygon edge requires inserting an eccentric midpoint on the eroded polygon edge to eliminate the eroded polygon edge. 3) In the area with large scale of the integrated circuit layout structure, the size of the generated triangle with good quality is too large to meet the precision requirement. Through the processing, the newly inserted nodes generate redundancy, and finally, excessively dense grids are generated locally, or the size of the grids generated in the area with large scale of the integrated circuit layout structure cannot meet the precision requirement.
Therefore, the invention adopts the eccentric circumcircle center method to solve the above problems in the prior art, which specifically comprises the following steps:
and determining triangles to be adaptively subdivided in the non-structural grid according to a set ratio threshold or a minimum angle threshold and a side length threshold, and putting all determined triangles to be adaptively subdivided into a triangle set to be adaptively subdivided.
And calculating the center of an external circle of the triangle to be adaptively subdivided, and setting the center of the external circle as a candidate point to be inserted. As shown in fig. 6Is a poor quality triangle in the figureThe center of the circumscribed circle is a pointOThe thick lines shown in the figureAndthe edges of the integrated circuit layout polygon.
If the candidate point to be insertedODoes not corrode the polygon side of the integrated circuit layout, does not contain the polygon side of the integrated circuit layout, and inserts the candidate points to be insertedOAnd inserting the mesh into the existing mesh, and updating the mesh subdivision and the information of the polygon edge.
If the candidate point to be insertedOEroding the polygon edge of an IC layout, as shown in FIG. 6, the candidate points to be insertedOEroding polygon edges of integrated circuit layout
And if the side of the triangle contains the side of the polygon of the integrated circuit layout and the candidate to-be-inserted point and the triangle formed by two vertexes of the side of the triangle containing the side of the polygon of the integrated circuit layout are not triangles with poor quality, inserting the candidate to-be-inserted point into the existing mesh and updating the information of mesh subdivision and the polygon side. Otherwise, as shown in FIG. 6, the sides of the triangleAnd
Due to the multi-scale characteristics of the layout polygon, the side length and the gap size range of the layout polygon are from centimeter to nanometer. Therefore, the unit size of the formed non-structural grid has the same multi-scale characteristics, and the unit of the grid subdivision is also converted from small scale to large scale in the process that the side length of the layout polygon is changed from small scale to large scale. In the area with small scale, the mesh division is very dense, and in the area with large scale, the mesh division is relatively sparse, from the area with dense mesh to the area with sparse mesh, the divided mesh has a transition from dense to sparse, the invention uses the change rule of the mesh from dense to sparse transition unit scale to provide the insertion sequence of the eccentric center point introduced by the lost polygon side and the eroded polygon side to the eccentric center of the triangle with poor quality. And for the lost edge and the eroded polygon edge, the eccentric middle points are inserted according to the order from small edge to large edge so as to eliminate the lost polygon edge and the eroded polygon edge. For the triangle with poor quality, the circle center of the eccentric circumcircle is inserted according to the sequence of the shortest side of the triangle from small to large so as to eliminate the triangle with poor quality. Theoretically, the insertion of the eccentric middle point and the eccentric circumcircle center in the order of the side length from small to large increases the shortest side length of the triangle by q times every subdivision from dense to sparse, as shown in fig. 7, wherein,then ideally, the minimum scalelTransition to maximum dimensionLOnly need to
Based on the above, the specific steps of inserting the eccentric midpoints in sequence provided by the invention are as follows:
and sequencing the lost Edges and the eroded Edges according to the side length to form an orderly set edge of the lost Edges and the eroded Edges with the side length from small to large.
And sorting the Triangles with the quality difference according to the side length of the shortest side to form a triangle set Triangles with the ordered quality difference, wherein the side length of the shortest side is from small to large.
And taking the edge with the shortest side length from the set Edges, and deleting the edge from the set Edges. If the shortest side is a lost side, recovering the lost side by an eccentric midpoint recovery method, and if the shortest side is an eroded side, eliminating the eroded side by an eccentric midpoint elimination method.
And when the set Edges is empty, taking the triangle with the shortest side out of the set Triangles, deleting the triangle from the set Triangles, and eliminating the triangle with poor quality according to the eccentric circumscribed circle center method provided by the above until the set Triangles are empty.
The invention provides a method for sequentially inserting the centers of eccentric circumscribed circles, which comprises the following specific steps:
arranging the Triangles to be adaptively subdivided in ascending order according to the shortest side length of the Triangles to form a triangle set triangle to be adaptively subdivided;
sequentially extracting the side with the shortest side length of the triangle from the set Triangles, and acquiring the center of the eccentric circumscribed circle of the triangle according to the step of acquiring the center of the eccentric circumscribed circle of the triangle;
and inserting the circle center of the eccentric circumcircle of the triangle into the existing triangular mesh as an insertion point so as to update the non-structural mesh subdivision of the polygon of the super-large-scale integrated circuit layout and the side of the polygon in the super-large-scale integrated circuit layout.
In comparison of mesh division results performed by respectively adopting a random insertion method and a sequential insertion method from small side length to large side length for quality control of layout polygons and mesh units which are input in the same way, the number of nodes of final mesh division in fig. 8 is 305, the number of triangle units is 601, the number of nodes of final mesh division in fig. 9 is 257, and the number of triangle units is 526. It is clear that the number of nodes and the number of grids in fig. 9 are both reduced by about 15% compared to fig. 8.
In view of the above-mentioned method for adaptively subdividing the polygonal unstructured grid of the integrated circuit layout, the present invention also provides a system for adaptively subdividing the polygonal unstructured grid of the integrated circuit layout, as shown in fig. 10, which includes:
the triangular mesh acquisition module 1 is used for forming an initial Delaunay triangular mesh based on the polygon of the super-large-scale integrated circuit layout;
the first triangular mesh forming module 2 is used for repeatedly inserting eccentric midpoints into the initial Delaunay triangular mesh, eliminating the sides of polygons of the lost ultra-large scale integrated circuit layout and the sides of eroded polygons and forming a first triangular mesh;
a triangle to be adaptively subdivided setting module 3, configured to set a triangle to be adaptively subdivided in the first triangle mesh as a triangle with poor quality or a triangle with a maximum side length greater than a set side length threshold;
a triangle set generating module 4, configured to obtain the triangles to be adaptively subdivided in the initial unstructured grid of the very large scale integrated circuit layout according to a set ratio threshold, a minimum angle threshold, or a side length threshold, and place all the determined triangles to be adaptively subdivided into a triangle set to be adaptively subdivided; the ratio threshold is as follows: setting a maximum limit value of the ratio of the radius of a circumscribed circle of the triangle to the length of the shortest side of the circumscribed circle;
the updating module 5 is used for inserting the circle center of the eccentric circumcircle of the triangle to be adaptively subdivided into the triangle to be adaptively subdivided as an insertion point so as to update the unstructured mesh subdivision of the polygon of the super-large-scale integrated circuit layout and the edge of the polygon in the super-large-scale integrated circuit layout;
and the circulating module 6 is used for repeating the steps until the triangle set to be adaptively subdivided is empty.
As a preferred embodiment of the present invention, the system further includes an eccentric circumscribed circle center obtaining module; the eccentric circumscribed circle center obtaining module comprises:
the circumscribed circle center determining unit is used for determining the center of the circumscribed circle of the triangle to be adaptively subdivided and setting the center of the circumscribed circle as a candidate point to be inserted;
a first to-be-inserted point determining unit, configured to determine, when a candidate to-be-inserted point does not erode an edge of any integrated circuit layout polygon and an edge of the to-be-adaptively subdivided triangle does not include the edge of the integrated circuit layout polygon, that the candidate to-be-inserted point is a center of an eccentric circumscribed circle of the to-be-adaptively subdivided triangle, and end;
a second to-be-inserted point determining unit, configured to find a point on the eroded edge as a candidate to-be-inserted point when the candidate to-be-inserted point erodes the edge of a polygon of the integrated circuit layout, where a minimum angle of a triangle formed by the point and an adjacent edge of the polygon of the integrated circuit layout isθ threshold Setting candidate points to be inserted as the centers of the eccentric circumscribed circles of the triangles, and ending; the adjacent side is the side of any integrated circuit layout polygon which shares the vertex with the side of the integrated circuit layout polygon; the above-mentionedθ threshold The minimum angle threshold of the triangle for the quality to reach the set requirement is set;
a third to-be-inserted point determining unit, configured to determine, when the edge of the triangle includes an edge of a polygon of the integrated circuit layout, and a triangle formed by the candidate to-be-inserted point and two vertices of the edge of the triangle to be adaptively subdivided is not a triangle with poor quality, that the candidate to-be-inserted point is a center of an eccentric circumscribed circle of the triangle, and end;
a fourth to-be-inserted point determining unit, configured to, when the edge of the triangle includes an edge of an integrated circuit layout polygon, and a candidate to-be-inserted point and a triangle formed by two vertices of the edge of the triangle to be adaptively subdivided are of a triangle with poor quality, find a point on a midperpendicular of an edge formed by two other vertices of the triangle with poor quality except the candidate to-be-inserted point as a candidate to-be-inserted point, where an opening angle of the edge formed by the two vertices of the point isθ threshold ；
And the circulating unit is used for returning and executing the step that when the candidate to-be-inserted point does not erode the edge of any integrated circuit layout polygon and the edge of the triangle to be adaptively subdivided does not contain the edge of the integrated circuit layout polygon, the candidate to-be-inserted point is the center of the eccentric circumcircle of the triangle to be adaptively subdivided.
Wherein, the first triangular mesh forming module preferably includes:
the polygon obtaining unit is used for obtaining a plurality of polygons which comprise a plurality of vertexes in the super-large-scale integrated circuit layout to be subdivided;
the triangle mesh forming unit is used for forming a Delaunay triangle mesh which takes the polygon vertex of the super-large-scale integrated circuit layout as a mesh node by adopting a Delaunay triangulation algorithm;
an unstructured grid generating unit, configured to determine a missing polygon edge and an eroded polygon edge in the Delaunay triangular grid, recover the missing polygon edge by using an eccentric midpoint recovery method, and eliminate the eroded polygon edge by using an eccentric midpoint elimination method, so as to generate an unstructured grid of the to-be-subdivided very large scale integrated circuit layout; the unstructured mesh is the first triangular mesh.
Preferably, the unstructured grid generating unit specifically includes:
the aggregation forming unit is used for arranging the sides of the lost polygons and the sides of the eroded polygons in an ascending order according to the side lengths to form aggregation Edges of the sides of the lost polygons and the sides of the eroded polygons;
the edge recovery or elimination unit is used for sequentially extracting the edge with the shortest side length from the set Edges and judging the type of the edge with the shortest side length; if the side with the shortest side length is the lost polygon side, recovering the side with the shortest side length by adopting an eccentric midpoint recovery method; and if the side with the shortest side length is the side of the eroded polygon, eliminating the side of the eroded polygon by adopting an eccentric midpoint elimination method.
As another preferred embodiment of the present invention, the update module 5 specifically includes:
the set generating unit is used for performing ascending arrangement on the Triangles to be adaptively subdivided according to the shortest side length of the Triangles to form a triangle set Triangles to be adaptively subdivided;
the eccentric circumcircle center obtaining unit is used for sequentially extracting the Triangles to be adaptively subdivided of the sides with the shortest side length of the Triangles from the set Triangles and obtaining the eccentric circumcircle centers of the extracted Triangles to be adaptively subdivided;
and the updating unit is used for inserting the circle center of the eccentric circumcircle of the triangle into the existing triangular mesh as an insertion point so as to update the non-structural mesh subdivision of the polygon of the super-large scale integrated circuit layout and the side of the polygon in the super-large scale integrated circuit layout.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. For the system disclosed by the embodiment, the description is relatively simple because the system corresponds to the method disclosed by the embodiment, and the relevant points can be referred to the method part for description.
The principles and embodiments of the present invention have been described herein using specific examples, which are provided only to help understand the method and the core concept of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, the specific embodiments and the application range may be changed. In view of the above, the present disclosure should not be construed as limiting the invention.
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