Mask auxiliary graph optimization method, computer readable medium and system
阅读说明：本技术 一种掩模辅助图形的优化方法、计算机可读介质及系统 (Mask auxiliary graph optimization method, computer readable medium and system ) 是由 张生睿 施伟杰 于 2019-02-22 设计创作，主要内容包括：本发明涉及一种掩模辅助图形的优化方法,该方法包括以下步骤,步骤S1：提供一张原始设计版图,并在原始设计版图中选取至少一个小区域版图；步骤S2：对选取的小区域版图做基于光刻模型的辅助图形优化,得到对应小区域版图的掩模形貌图；步骤S3：建立BP人工神经网络模型,并根据小区域版图的掩模形貌图和其对应的小区域版图训练BP人工神经网络模型；步骤S4：将训练好的BP人工神经网络模型应用在原始设计版图上,获得原始设计版图的掩模设计形貌图；及步骤S5：从掩模设计形貌图提取出掩模辅助图形。本发明还提供一种计算机可读介质。本发明还提供一种掩模辅助图形的系统。(The invention relates to a method for optimizing a mask auxiliary pattern, which comprises the following steps of S1: providing an original design layout, and selecting at least one small-area layout in the original design layout; step S2: performing auxiliary graph optimization based on a photoetching model on the selected small area layout to obtain a mask topography corresponding to the small area layout; step S3: establishing a BP artificial neural network model, and training the BP artificial neural network model according to a mask topography of the small region layout and the small region layout corresponding to the mask topography; step S4: applying the trained BP artificial neural network model to an original design layout to obtain a mask design topography of the original design layout; and step S5: the mask assist pattern is extracted from the mask design topography map. The invention also provides a computer readable medium. The invention also provides a system for mask auxiliary patterns.)
1. A method for optimizing mask assist patterns, comprising: the method comprises the following steps of,
step S1: providing an original design layout, and selecting at least one small-area layout in the original design layout;
step S2: performing auxiliary graph optimization based on a photoetching model on the selected small area layout to obtain a mask topography corresponding to the small area layout;
step S3: establishing a BP artificial neural network model, and training the BP artificial neural network model according to a mask topography of the small region layout and the small region layout corresponding to the mask topography;
step S4: applying the trained BP artificial neural network model to an original design layout to obtain a mask design topography of the original design layout; and
step S5: the mask assist pattern is extracted from the mask design topography map.
2. The method of optimizing a mask assist pattern according to claim 1, wherein: the step S2 includes the steps of,
step S21: inputting one or more small area layouts and performing lattice point formation on the small area layouts to form a design pattern;
step S22: constructing an initial auxiliary graphical guide image to produce an objective function;
step S23: performing iterative optimization for multiple times to generate an optimized objective function so as to obtain an optimized guide image;
step S24: carrying out binarization processing and polygon figure extraction on the optimized guide image to obtain a mask topography with an auxiliary figure; and
step S25: the mask profile is optimized.
3. The method of optimizing a mask assist pattern according to claim 2, wherein: the step S25 includes the steps of,
step S251: cleaning and optimizing the mask topography;
step S252: graphically simplifying the mask topography map based on the manufacturable rules of the geometry; and
step S253: carrying out anti-printing inspection and treatment on the mask topography;
the sequence between step S252 and step S253 may be interchanged or may be performed simultaneously.
4. The method of optimizing a mask assist pattern according to claim 1, wherein: the step S3 includes the steps of,
step S31: establishing a BP artificial neural network model and setting the structure of the model;
step S32: respectively inputting the mask topography map and the small region layout corresponding to the mask topography map into corresponding structures of the BP artificial neural network model; and
step S33: and training the BP artificial neural network model to obtain an optimized model of the mask topography.
5. The method of optimizing a mask assist pattern according to claim 1, wherein: the step S4 includes the steps of,
step S41: inputting an original design layout into an optimization model of a mask topography; and
step S42: and performing operation to obtain a mask design topography of the original design layout.
6. The method of optimizing a mask assist pattern according to claim 1, wherein: in step S1, the selected small region layout includes two or three of any one or any combination of typical pattern regions, critical pattern regions, or regions of known defect layout designs.
7. The method of optimizing a mask assist pattern according to claim 1, wherein: the step S5 of extracting the mask assist pattern from the mask design profile further includes: and carrying out binarization processing and polygon figure extraction on the mask design topography map to obtain a mask auxiliary figure.
8. The method of optimizing a mask assist pattern according to claim 1, wherein: step S6 is also included after step S5: the mask assist pattern is optimized.
9. A computer-readable medium, characterized in that: the computer-readable medium has stored thereon a computer program, wherein the computer program is arranged to execute the method for optimizing a mask assist pattern as claimed in any one of claims 1 to 8 when executed.
10. A system for optimizing mask assist features, comprising: the optimization system comprises a selection module, a selection module and a calculation module, wherein the selection module is used for selecting at least one small area layout in an original design layout; the photoetching optimization module is used for performing auxiliary graph optimization based on a photoetching model on the selected small-area layout to obtain a mask topography corresponding to the small-area layout; the network training module is used for training a BP artificial neural network model according to the mask topography of the small region layout and the small region layout corresponding to the mask topography; the network application module is used for applying the trained BP artificial neural network model to the original design layout to obtain a mask design topography of the original design layout; and the extraction module is used for extracting the mask auxiliary graph from the mask design topography.
[ technical field ] A method for producing a semiconductor device
The invention relates to the field of mask manufacturing of integrated circuits, and provides a method, a computer readable medium and a system for optimizing mask auxiliary patterns.
[ background of the invention ]
The photolithography process is the most important process step in the modern very large scale integrated circuit manufacturing process, and transfers the design pattern of the integrated circuit on the mask to the silicon wafer by the photolithography machine. When the integrated circuit design pattern on the mask is projected and imaged on a silicon wafer through a photoetching machine, the characteristic dimension of the pattern on the mask is continuously reduced along with the continuous evolution of technical nodes, and the diffraction phenomenon of light is increasingly remarkable.
When some high-order diffracted light cannot participate in imaging due to the limitation of the aperture of the optical system of the projection objective, the imaging on a silicon wafer generates the phenomena of deformation and indistinguishable graph. This phenomenon is called the Optical Proximity Effect (OPE). In order to improve the imaging resolution and the imaging quality, one can realize the correction of the optical Proximity effect, namely OPC (optical Proximity correction), by optimizing the pattern on the mask. In the OPC practice, some auxiliary patterns (Sub-resolution assisted features) are usually added in addition to the Main patterns (Main features) of the mask, and the auxiliary patterns are usually much smaller than the Main patterns and are not printed on the silicon wafer, but only have the effect of enhancing the imaging of the Main patterns.
The placement of the auxiliary patterns was based on rules, and the mainstream placement is based on the lithography model. The initial auxiliary graph is obtained based on the photoetching model, a large amount of overlapping exists in the initial auxiliary graphs corresponding to different geometric sides of the main graph, therefore, a large amount of time and work are needed to be spent on cleaning the graphs overlapped and overlapped between the main graph and the auxiliary graphs, graph simplification and anti-printing inspection processing are carried out on the mask topography graph based on the manufacturable rules of the geometric topography, the auxiliary graphs are further optimized, and therefore the efficiency and the accuracy of the existing scheme are low.
[ summary of the invention ]
To overcome the problems of the prior art, the present invention provides a method, a computer-readable medium, and a system for optimizing a mask assist pattern.
The solution of the technical problem of the present invention is to provide a method for optimizing a mask assist pattern, which includes the following steps, step S1: providing an original design layout, and selecting at least one small-area layout in the original design layout; step S2: performing auxiliary graph optimization based on a photoetching model on the selected small area layout to obtain a mask topography corresponding to the small area layout; step S3: establishing a BP artificial neural network model, and training the BP artificial neural network model according to a mask topography of the small region layout and the small region layout corresponding to the mask topography; step S4: applying the trained BP artificial neural network model to an original design layout to obtain a mask design topography of the original design layout; and step S5: the mask assist pattern is extracted from the mask design topography map.
Preferably, the step S2 includes the step S21: inputting one or more small area layouts and performing lattice point formation on the small area layouts to form a design pattern; step S22: constructing an initial auxiliary graphical guide image to produce an objective function; step S23: performing iterative optimization for multiple times to generate an optimized objective function so as to obtain an optimized guide image; step S24: carrying out binarization processing and polygon figure extraction on the optimized guide image to obtain a mask topography with an auxiliary figure; and step S25: the mask profile is optimized.
Preferably, step S25 includes step S251: cleaning and optimizing the mask topography; step S252: graphically simplifying the mask topography map based on the manufacturable rules of the geometry; and step S253: carrying out anti-printing inspection and treatment on the mask topography; the sequence between step S252 and step S253 may be interchanged or may be performed simultaneously.
Preferably, the step S3 includes the step S31: establishing a BP artificial neural network model and setting the structure of the model; step S32: respectively inputting the mask topography map and the small region layout corresponding to the mask topography map into corresponding structures of the BP artificial neural network model; and step S33: and training the BP artificial neural network model to obtain an optimized model of the mask topography.
Preferably, the step S4 includes the step S41: inputting an original design layout into an optimization model of a mask topography; and step S42: and performing operation to obtain a mask design topography of the original design layout.
Preferably, in step S1, the selected small region layout includes two or three of any one or any combination of typical pattern regions, critical pattern regions, or regions of known defect layout design.
Preferably, the step S5 of extracting the mask auxiliary pattern from the mask design topography further comprises: and carrying out binarization processing and polygon figure extraction on the mask design topography map to obtain a mask auxiliary figure.
Preferably, step S5 is followed by step S6: the mask assist pattern is optimized.
The invention also provides a computer-readable medium, in which a computer program is stored, wherein the computer program is arranged to execute the above-mentioned method for optimizing a mask assist pattern when running.
The invention also provides an optimization system of the mask auxiliary graph, which comprises a selection module, a calculation module and a calculation module, wherein the selection module is used for selecting one or more small area layouts in the original design layout; the photoetching optimization module is used for performing auxiliary graph optimization based on a photoetching model on the selected small-area layout to obtain a mask topography corresponding to the small-area layout; the network training module is used for training a BP artificial neural network model according to the mask topography of the small region layout and the small region layout corresponding to the mask topography; the network application module is used for applying the trained BP artificial neural network model to the original design layout to obtain a mask design topography of the original design layout; and the extraction module is used for extracting the mask auxiliary graph from the mask design topography.
Compared with the prior art, the optimization method of the mask auxiliary pattern has the following advantages:
1. in the mask auxiliary optimization method based on the photoetching model, a large amount of time and workload are needed to optimize the mask auxiliary graph after the original design layout is optimized, namely, the overlapped and overlapped part is cleaned; in the optimization method of the mask auxiliary graph, one or more small area layouts in the original design layout are selected to perform mask auxiliary graph optimization based on the photoetching model for one time, then the optimized mask topography and the small area layouts corresponding to the optimized mask topography are input into the BP artificial neural network model to be trained to obtain the optimization method of the mask auxiliary graph, and then the original design layout is input into the optimization model of the mask topography to obtain the mask auxiliary graph finally. The mask topography obtained by the small-area layout is only required to be optimized, and compared with the whole original design layout, a large amount of time and workload can be saved.
2. When the mask topography obtained by the small-area layout is optimized, the mask topography is subjected to graphic simplification and anti-printing check and processing based on the manufacturable rule of the geometric topography, so that the geometric topography and the final result of the obtained auxiliary graphic are very close, and compared with the graphic simplification and anti-printing check processing of the whole original design layout, the workload and the required time for simplification are less.
3. The target function is generated through the guide image, the target function is optimized, the optimized guide image is obtained, and the mask topography map extracted from the optimized guide image is beneficial to reducing the workload of optimizing the mask topography map.
[ description of the drawings ]
FIG. 1 is a flowchart illustrating a method for optimizing a mask assist pattern according to a first embodiment of the present invention.
Fig. 2 is a flowchart illustrating a method for optimizing a mask assist pattern according to a first embodiment of the present invention, in step S2 of fig. 1.
Fig. 3 is a flowchart illustrating the method for optimizing the mask assist pattern according to the first embodiment of the present invention, step S25 in fig. 2.
Fig. 4 is a flowchart illustrating a method for optimizing a mask assist pattern according to a first embodiment of the present invention, in step S3 in fig. 1.
FIG. 5 is a diagram of a BP artificial neural network model established by the optimization method of mask assist patterns according to the first embodiment of the present invention.
Fig. 6 is a flowchart illustrating a method for optimizing a mask assist pattern according to a first embodiment of the present invention, in step S4 in fig. 1.
FIG. 7 is a mask design profile obtained by the method for optimizing mask assist features according to the first embodiment of the present invention.
Fig. 8A is a mask auxiliary pattern extracted from fig. 7 by the optimization method of the mask auxiliary pattern according to the first embodiment of the present invention.
Fig. 8B is a mask assist pattern obtained based on the lithography model.
FIG. 9A is a diagram of a PV-BAND distribution of a mask design profile obtained by the method for optimizing a mask assist feature according to the first embodiment of the present invention.
FIG. 9B is a PV-BAND distribution plot of a mask assist map based on a lithography model.
FIG. 10 is a block diagram of a system for optimizing mask assist features according to a third embodiment of the present invention.
FIG. 11 is a block diagram of a lithography optimization model in a system for optimizing mask assist patterns according to a third embodiment of the present invention.
Description of reference numerals: 1. optimizing the system; 11. selecting a module; 12. a lithography optimization module; 13. a network training module; 14. a network application module; 15. an extraction module; 121. a grid cell; 122. a construction unit; 123. an iteration unit; 124. an extraction unit; 125. and an optimization unit.
[ detailed description ] embodiments
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Referring to fig. 1, a first embodiment of the present invention provides a method for optimizing a mask assist pattern, which is exemplified by a 14nm node logic circuit VIA layer (VIA) layout design. The method comprises the following steps of,
step S1: providing an original design layout, and selecting at least one small-area layout in the original design layout;
step S2: performing auxiliary graph extraction based on a photoetching model on the selected small region layout to obtain a mask topography graph with auxiliary graphs corresponding to the small region layout;
step S3: establishing a BP artificial neural network model, and training the BP artificial neural network model according to a mask topography of the small region layout and the small region layout corresponding to the mask topography;
step S4: applying the trained BP artificial neural network model to an original design layout to obtain a mask design topography of the original design layout; and
step S5: the mask assist pattern is extracted from the mask design topography map.
Firstly, providing an original design layout, wherein the original design layout comprises a plurality of nodes, selecting a small area layout formed by a plurality of nodes for optimization, and the selected small area layout can be one, two or more, and each small area layout is provided with one or more main graphs formed by the nodes; then inputting the selected small region layout into a photoetching model to construct an initial guide image of the auxiliary graph, and performing repeated iterative optimization to obtain a mask topography graph with the auxiliary graph corresponding to the small region layout; then, establishing a BP artificial neural network model, inputting the mask topography of the small region layout obtained based on the photoetching model and the corresponding small region layout into the BP artificial neural network model to train the BP artificial neural network model so as to obtain an optimization model of the mask topography, wherein the trained BP artificial neural network model is the optimization model of the mask topography; then, inputting the original design layout into an optimization model of the mask topography, and calculating the mask design topography corresponding to the original design layout through a BP artificial neural network model; and finally, directly extracting the mask auxiliary pattern from the mask topography.
It is to be understood that, in the step S1, the selected small region layout includes two or three of any one or any combination of typical pattern regions, critical pattern regions, or regions of known defect layout designs. The selected small region layout can be a combination of a typical pattern region and a key pattern region, a combination of the typical pattern region and a known defect layout design region, a combination of the typical pattern region, the key pattern region and the known defect layout design region, and the like.
Referring to fig. 2, step S2 includes,
step S21: inputting one or more small area layouts and performing lattice point formation on the small area layouts to form a design pattern;
step S22: constructing an initial auxiliary graphical guide image to produce an objective function;
step S23: performing iterative optimization for multiple times to generate an optimized objective function so as to obtain an optimized guide image;
step S24: carrying out binarization processing and polygon figure extraction on the optimized guide image to obtain a mask topography with an auxiliary figure; and
step S25: the mask profile is optimized.
Firstly, inputting a selected small area layout into a photoetching model, and rasterizing the small area layout according to the distribution of nodes in the small area layout to form a design pattern; then, constructing an initial auxiliary graph guide image according to the design pattern, and generating an objective function by combining the design pattern and the initial auxiliary graph guide image; then, obtaining a first iteration guide image according to the initial auxiliary graph guide image and the target function, generating a first iteration target function by combining the initial auxiliary graph guide image and the first iteration guide image, and performing multiple iteration optimization to generate an optimized target function so as to obtain an optimized guide image; then, performing binarization processing on the optimized guide image and extracting a polygon graph according to the relation with the geometric side of the main graph to obtain a mask topography with an auxiliary graph, namely selecting a mask auxiliary graph corresponding to the small-area layout; finally, the mask topography is optimized to better image the main feature on the silicon wafer.
It can be understood that the guide image is an image of the auxiliary graphic extracted from the design pattern; the target function is a function for measuring the imaging quality of the current small-area layout; the iterative optimization is a process of optimizing an objective function, and an optimized guide image is obtained through iterative optimization.
It is understood that the layout input into the lithography model may be one, two or more selected small region layouts, or may be an original design layout.
It should be noted that, the binarization processing is to make the gray value of a pixel point on the guide image be 0 or 255, so that the guide image has an effect of only two colors. And extracting the polygon figure is to extract the outline of the image from the image subjected to binarization processing so as to obtain a mask topography with an auxiliary figure.
Referring to fig. 3, step S25 includes,
step S251: cleaning and optimizing the mask topography;
step S252: graphically simplifying the mask topography map based on the manufacturable rules of the geometry; and
step S253: carrying out anti-printing inspection and treatment on the mask topography;
the sequence between step S252 and step S253 may be interchanged or may be performed simultaneously.
In the mask topography with the auxiliary patterns obtained by sequentially performing binarization processing and polygon pattern extraction, a large amount of overlapping may occur between the auxiliary patterns corresponding to the geometric sides of different main patterns, so the mask topography is optimized. Firstly, cleaning overlapped parts in a mask topography so as to improve the quality of a graph imaged on a silicon wafer; then, the mask topography map is graphically reduced based on geometric manufacturable rules, such as reducing irregular polygons to rectangles, to ensure that the main pattern can be processed and manufactured on the silicon wafer; and finally, carrying out anti-printing inspection and treatment on the mask topography, namely carrying out simulated exposure through the photoetching model to inspect whether the auxiliary pattern is printed out, and if so, reducing the size of the auxiliary pattern according to the simulation result of the photoetching model or directly deleting the auxiliary pattern to avoid printing out and ensure that the auxiliary pattern cannot be printed out on the silicon wafer. It is understood that the sequence between step S252 and step S253 may be interchanged or may be performed simultaneously.
Referring to fig. 4-5, step S3 includes,
step S31: establishing a BP artificial neural network model and setting the structure of the model;
step S32: respectively inputting the mask topography map and the small region layout corresponding to the mask topography map into a BP artificial neural network model for training; and
step S33: and training the BP artificial neural network model to obtain an optimized model of the mask topography.
Firstly, a BP artificial neural network model is established, the structure of the model is set, namely, an input layer X, a hidden layer and an output layer Y of the BP artificial neural network model are set, the number of neurons is respectively defined in the input layer X, the hidden layer and the output layer Y, the input layer is set to be 40X40 nodes, namely 1600 neurons are input in the input layer X, the output layer Y is set to be a node, the hidden layer adopts a double-hidden-layer structure, namely, a first hidden layer B and a second hidden layer C, and then the BP artificial neural network model is established. Then, respectively sending the mask topography map of the small region layout and the small region layout corresponding to the mask topography map to the corresponding structure of the BP artificial neural network model, namely respectively inputting the mask topography map and the small region layout into an output layer X and an input layer Y of the BP artificial neural network model; and finally, training the BP artificial neural network model to obtain an optimization model of the mask topography. And calculating an error function through the BP artificial neural network model, and setting the precision of the error function value or the maximum learning times before. When the calculated error function value meets the requirement of the set error function value, ending the algorithm; otherwise, the algorithm is ended according to the error reverse propagation algorithm until the calculated error function value meets the requirement of the set error function value, that is, the training of the BP artificial neural network model is completed, and the specific calculation process is not repeated herein.
It can be understood that, since the mask topography map has been optimized in step S25, and then the optimized mask topography map is input into the BP artificial neural network model for training, the BP artificial neural network model also grasps the optimization method in step S25.
Referring to fig. 6-7, step S4 includes,
step S41: inputting an original design layout into an optimization model of a mask topography; and
step S42: and performing operation to obtain a mask design topography of the original design layout.
Since the optimized model of the mask topography has been obtained in step S3, the mask design topography corresponding to the original design layout can be calculated by inputting the original design layout corresponding to the small region layout into the optimized model of the mask topography, as shown in fig. 7. Firstly, applying a trained BP artificial neural network model to an original design layout, namely inputting the original design layout into an optimized model input layer of a mask topography, and calculating the mask design topography of the original design layout; then, an operation is performed to obtain a mask design profile of the original design layout. Since the mask topography has been optimized in step S2, the mask design topography from which the original design layout was calculated has also been optimized.
Referring to fig. 8A, in step S5, a mask assist pattern is obtained by performing binarization processing based on the mask design topography and extracting a polygon pattern according to the binarization processing. Since the mask design profile characterizes the mask itself, the available mask assist patterns are obtained directly after extraction.
And (3) experimental comparison:
referring to fig. 8A-8B, wherein fig. 8A is a mask auxiliary pattern obtained based on a BP artificial neural network model, and fig. 8B is a mask auxiliary pattern obtained based on a lithography model, it can be seen from observation that the mask auxiliary patterns obtained by the two methods are very similar, and the mask auxiliary pattern obtained by the method does not need to clean a pattern overlapping between the main pattern and the auxiliary pattern compared with the mask auxiliary pattern obtained based on the lithography model.
Referring to FIGS. 9A-9B, FIG. 9A is a diagram of a PV-BAND (Process Variation Band) distribution of a mask design profile obtained based on a BP artificial neural network model, with PV-BNAD values on the abscissa and the number of nodes on the ordinate. Wherein the number of the nodes is between 3 and 12nm, and the number of the nodes distributed between 6 and 8nm is the largest. FIG. 9B is a graph of PV-BAND distribution of mask assist maps based on lithography modeling, where the number of nodes is between 3-14nm and the maximum number of nodes is between 6-9nm, as calculated by averaging the PV-BNAD values in FIGS. 8A and 8B, giving the following table:
TABLE 1
The lithographic performance here is measured at the PV-band. The PV-band is calculated as follows:
PV-band ═ max (PE @ PW _ conditions) min (EPE @ PW _ conditions); EPE represents the position error between the outline on the silicon chip and the target design graph; PW _ conditions are the exposure conditions of the lithography process, and defocus is adopted in the embodiment at plus or minus 40nm, and the exposure dose error is plus or minus 3%.
And (4) experimental conclusion:
the auxiliary graph optimization based on the BP artificial neural network model can obtain the same level of optimization precision as the traditional auxiliary graph optimization based on the photoetching model.
Step S5 is followed by step S6, if necessary: the mask assist pattern is optimized. The BP artificial neural network model already masters the optimization method of the mask topographic map, namely, the mask topographic map is cleaned and optimized, the mask topographic map is graphically simplified based on geometric topography manufacturing rules, and the mask topographic map is subjected to anti-printing inspection and processing. Therefore, the mask auxiliary graph optimized graph obtained by the BP artificial neural network model does not need to clean the overlapped graph, and meanwhile, the simplification of the graph and the anti-printing work processing amount are reduced. Because the optimization method of the auxiliary graph is mastered from the whole trend during the training of the BP artificial neural network model, the geometric appearance and the final result of the obtained auxiliary graph are very close, the workload of the simplification and the anti-printing of the graph is less compared with the workload of the simplification and the anti-printing processing based on the photoetching model, and therefore the efficiency and the accuracy of the whole processing can be improved.
It can be understood that the mask topography and the corresponding small region layout obtained by the method other than the lithography model are respectively input into the output layer and the input layer of the BP artificial neural network model, and the BP artificial neural network model can be trained as well, so that the original design layout is input into the optimization model of the mask topography to obtain the optimization of the corresponding mask auxiliary pattern.
A second embodiment of the invention provides a computer-readable medium, in which a computer program is stored, wherein the computer program is arranged to perform the above-mentioned method for optimizing a mask assist pattern when running.
According to an embodiment of the present disclosure, the processes described above with reference to the flowcharts may be implemented as computer software programs. For example, embodiments of the present disclosure include a computer program product comprising a computer program embodied on a computer readable medium, the computer program comprising program code for performing the method illustrated in the flow chart. In such an embodiment, the computer program may be downloaded and installed from a network via the communication section, and/or installed from a removable medium. The computer program, when executed by a Central Processing Unit (CPU), performs the above-described functions defined in the method of the present application. It should be noted that the computer readable medium described herein can be a computer readable signal medium or a computer readable storage medium or any combination of the two. The computer readable storage medium may be, for example, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of the computer readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the present application, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. In this application, however, a computer readable signal medium may include a propagated data signal with computer readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated data signal may take many forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to: wireless, wire, fiber optic cable, RF, etc., or any suitable combination of the foregoing.
Computer program code for carrying out operations for aspects of the present application may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, Smalltalk, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider).
Referring to fig. 10, a third embodiment of the invention provides a mask assist pattern optimization system 1, which includes a selecting module 11, a
Referring to fig. 11, the
Compared with the prior art, the optimization method of the mask auxiliary pattern has the following advantages:
1. in the mask auxiliary optimization method based on the photoetching model, a large amount of time and workload are needed to optimize the mask auxiliary graph after the original design layout is optimized, namely, the overlapped and overlapped part is cleaned; in the optimization method of the mask auxiliary graph, one or more small area layouts in the original design layout are selected to perform mask auxiliary graph optimization based on the photoetching model for one time, then the optimized mask topography and the small area layouts corresponding to the optimized mask topography are input into the BP artificial neural network model to be trained to obtain the optimization method of the mask auxiliary graph, and then the original design layout is input into the optimization model of the mask topography to obtain the mask auxiliary graph finally. The mask topography obtained by the small-area layout is only required to be optimized, and compared with the whole original design layout, a large amount of time and workload can be saved.
2. When the mask topography obtained by the small-area layout is optimized, the mask topography is subjected to graphic simplification and anti-printing check and processing based on the manufacturable rule of the geometric topography, so that the geometric topography and the final result of the obtained auxiliary graphic are very close, and compared with the graphic simplification and anti-printing check processing of the whole original design layout, the workload and the required time for simplification are less.
3. The target function is generated through the guide image, the target function is optimized, the optimized guide image is obtained, and the mask topography map extracted from the optimized guide image is beneficial to reducing the workload of optimizing the mask topography map.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit of the present invention are intended to be included within the scope of the present invention.
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