Serial bus and communication device
阅读说明：本技术 一种串行总线及通信装置 (Serial bus and communication device ) 是由 甄亮文 于 2020-05-21 设计创作，主要内容包括：一种串行总线及通信装置。所述串行总线,包括：连接所述应用处理器的第一接口单元；连接所述调制解调器的第二接口单元；以及连接所述第一接口单元与所述第二接口单元的连接线；其中,所述第一接口单元,包括：接收子单元,用于接收所述应用处理器发送的第一数据；监测子单元,用于监测所述第一数据的响应数据；处理子单元,用于在预设时长内未监测到所述第一数据的响应数据时,向所述应用处理器发送异常中断反馈信息,使得所述应用处理器基于所述异常中断反馈信息,执行相应的恢复操作。应用上述方案,可以防止应用处理器挂死。(A serial bus and a communication device are provided. The serial bus, comprising: a first interface unit connected to the application processor; a second interface unit connected to the modem; the connecting line is used for connecting the first interface unit and the second interface unit; wherein the first interface unit includes: the receiving subunit is used for receiving the first data sent by the application processor; the monitoring subunit is used for monitoring response data of the first data; and the processing subunit is configured to send the abnormal interrupt feedback information to the application processor when the response data of the first data is not monitored within a preset time period, so that the application processor executes a corresponding recovery operation based on the abnormal interrupt feedback information. By applying the scheme, the application processor can be prevented from being hung up.)
1. A serial bus is applied to a communication device, the communication device comprises an application processor and a modem, and the application processor and the modem are communicated through the serial bus; wherein the serial bus comprises:
a first interface unit connected to the application processor;
a second interface unit connected to the modem;
the connecting line is used for connecting the first interface unit and the second interface unit;
wherein the first interface unit includes:
the receiving subunit is used for receiving the first data sent by the application processor;
the monitoring subunit is used for monitoring response data of the first data;
and the processing subunit is configured to send the abnormal interrupt feedback information to the application processor when the response data of the first data is not monitored within a preset time period, so that the application processor executes a corresponding recovery operation based on the abnormal interrupt feedback information.
2. The serial bus of claim 1, wherein said abort feedback information further comprises: abnormality type indication information indicating specific location information causing an abnormality.
3. The serial bus of claim 2, wherein said processing subunit is further configured to receive specific location information that caused an exception and to generate said exception type indication information.
4. The serial bus of claim 3, wherein said exception type indication information corresponds to a particular location that caused an exception.
5. The serial bus of claim 3, wherein said specific location causing an exception comprises at least one of:
the first interface unit;
the second interface unit;
a processing module in the modem that generates the response data;
and the second interface unit is connected with a connection line between the processing module which generates the response data in the modem.
6. The serial bus of claim 1, wherein said resume operation comprises at least one of:
resetting;
and (5) restarting after power failure.
7. A communications apparatus, comprising:
an application processor;
a modem;
the application processor and the modem communicate via the serial bus of any of claims 1 to 6.
8. The communications apparatus of claim 7, further comprising:
a shared memory module coupled to and directly accessible by the application processor, the modem coupled to and indirectly accessible to the shared memory by the application processor.
9. The communications apparatus of claim 7, the application processor comprising:
the storage control unit is communicated with the shared storage module and is used for receiving an access request of the modem and accessing the shared storage module according to the access request.
10. The communications device of claim 9, wherein the memory control unit is further configured to feed back access results to the shared memory module to the modem.
Technical Field
The invention relates to the technical field of communication, in particular to a serial bus and a communication device.
Background
In order to meet the diversified demands of users, communication devices such as mobile phones and the like gradually expand diversified functions such as camera shooting and games in addition to the function of realizing communication. These applications may be controlled and implemented based on independent systems.
Therefore, for a communication device capable of implementing multiple applications, there are usually at least two integrated circuit chips, one of which is a modem (modem) for implementing a cellular communication function, which can be understood as a communication system; the other chip is an Application Processor (AP) for implementing functions such as shooting, displaying, 2D/3D engine, and may be understood as an Application processing system.
In general, in a communication device such as a mobile phone, an application processor and a modem communicate with each other via a serial bus. The application processor may transmit data to the modem over a serial bus. However, in some cases, the serial bus or the modem may be abnormal, which results in that the module in the application processor that transmits data to the modem cannot complete the data transmission and is mounted and cannot recover, and even the whole application processor may enter a hang-up state.
Disclosure of Invention
The invention solves the technical problem of providing an improved serial bus which can prevent an application processor from being hung up.
In order to solve the above technical problem, an embodiment of the present invention provides a serial bus, which is applied to a communication device, where the communication device includes an application processor and a modem, and the application processor and the modem communicate with each other through the serial bus; the serial bus, comprising:
a first interface unit connected to the application processor;
a second interface unit connected to the modem;
the connecting line is used for connecting the first interface unit and the second interface unit;
wherein the first interface unit includes:
the receiving subunit is used for receiving the first data sent by the application processor;
the monitoring subunit is used for monitoring response data of the first data;
and the processing subunit is configured to send the abnormal interrupt feedback information to the application processor when the response data of the first data is not monitored within a preset time period, so that the application processor executes a corresponding recovery operation based on the abnormal interrupt feedback information.
Optionally, the feedback information of the abnormal interrupt further includes: abnormality type indication information indicating specific location information causing an abnormality.
Optionally, the processing subunit is further configured to receive specific location information that causes an exception, and generate the exception type indication information.
Optionally, the abnormality type indication information corresponds to a specific location causing an abnormality.
Optionally, the cause abort location includes at least one of:
the first interface unit;
the second interface unit;
a processing module in the modem that generates the response data;
and the second interface unit is connected with a connection line between the processing module which generates the response data in the modem.
Optionally, the recovery operation includes at least one of:
resetting;
and (5) restarting after power failure.
An embodiment of the present invention further provides a communication device, where the communication device includes:
an application processor;
a modem;
the application processor and the modem communicate via any of the above-described serial buses.
Optionally, the communication device further comprises:
a shared memory module coupled to and directly accessible by the application processor, the modem coupled to and indirectly accessible to the shared memory by the application processor.
Optionally, the application processor comprises:
the storage control unit is communicated with the shared storage module and is used for receiving an access request of the modem and accessing the shared storage module according to the access request.
Optionally, the storage control unit of the communication device is further configured to feed back a result of accessing the shared storage module to the modem.
Compared with the prior art, the technical scheme of the embodiment of the invention has the following beneficial effects:
the embodiment of the invention provides a serial bus, wherein a first interface unit of the serial bus can monitor response data of first data sent by an application processor to a modem, and send abnormal interrupt feedback information to the application processor when the response data of the first data is not monitored in a preset time length, so that the application processor executes corresponding recovery operation based on the abnormal interrupt feedback information, and the application processor can be prevented from being hung up.
Further, the feedback information of the abnormal interrupt further includes: and the exception type indicating information is used for indicating specific position information causing an exception, so that the application processor can more accurately execute recovery operation according to the exception type indicating information, and the time of exception interruption is effectively reduced.
Further, an embodiment of the present invention further provides a communication apparatus, where a shared memory is disposed in the communication apparatus, the application processor is coupled to the shared memory module and can directly access the shared memory module, and the modem is coupled to the application processor and indirectly accesses the shared memory through the application processor.
Compared with the existing double-port storage scheme, the bandwidth and the speed are low, and the performance requirements of the system on high bandwidth and low delay cannot be met, or the existing defects that the overall size is large and the system cost is high are caused by respectively configuring the storage modules for each system. The scheme of the embodiment provides an improved communication device, which can enable a plurality of systems with large capacity, high bandwidth and low delay memory access requirements to share the same physical memory, is beneficial to reducing the overall cost and improving the system competitiveness. Specifically, the shared memory module is hung under the application processor, the application processor can directly access the shared memory module, and the modem indirectly accesses the shared memory module through the application processor. Thus, a plurality of large-capacity, high-bandwidth and low-delay systems can share one off-chip physical memory.
Drawings
Fig. 1 is a schematic structural diagram of a communication device according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a first interface unit in the embodiment of the present invention.
Detailed Description
In a communication device such as a mobile phone, an application processor and a modem communicate with each other via a serial bus. Hardware modules on the application processor side, such as processors, accelerators, controllers, etc., send data to the modem over the serial bus, or access the modem's address space, such as the address space of chip registers or built-in memory, etc.
In some specific cases, an exception may occur in the serial bus or the modem, which may cause the module in the application processor that transmits data to the modem to fail to complete the data transmission and to mount and fail to recover, and even the entire application processor may enter a mount state.
In order to solve the foregoing technical problem, an embodiment of the present invention provides a serial bus, where a first interface unit of the serial bus is capable of monitoring response data of first data sent by an application processor to a modem, and sending abnormal interrupt feedback information to the application processor when the response data of the first data is not monitored within a preset time period, so that the application processor executes a corresponding recovery operation based on the abnormal interrupt feedback information, thereby preventing the application processor from being hung up.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
For convenience of understanding, in the embodiment of the present invention, a communication device where a serial bus is located is briefly described first, and then specific contents of the serial bus are described in conjunction with the communication device.
Referring to fig. 1, the communication apparatus 1 may include: application processor 11, modem 12. The application processor 11 and the modem 12 communicate over a serial bus.
In an embodiment of the invention, the serial bus comprises:
a
a second interface unit 123 connected to the modem 12;
and a connection line 14 connecting the
Referring to fig. 2, the
the receiving
the monitoring subunit 22 is configured to monitor response data of the first data;
the
In particular implementations, the application Processor 11 may include a first processing module (Processor)113 and the modem 12 may include a second processing module 122. The first processing module 113 may send data to the second processing module 122 through the first bus 112 or access an address space of the second processing module 122 according to system operation requirements.
The first bus 112 may be understood as a common channel within the application processor 11. Similarly, the second bus 121 may be understood as a common channel within the modem 12.
The first processing module 113 may be a processor, an accelerator, a controller, or the like in the application processor 11, and the second processing module 122 may be a module for receiving corresponding data on the application processor 11 side. The data sent by the first processing module 113 to the second processing module 122 may be data required by the second processing module 122, or may be an access request, for example, to access an address space of a chip register or an internal memory.
Under normal conditions, after receiving the data sent by the first processing module 113, the second processing module 122 feeds back corresponding response data to the first processing module 113 through the second bus 121. For example, the second processing module 122 may feed back ACK or NACK information, or feed back data to be accessed, and the like.
In some specific cases, the serial bus connecting the application processor 11 and the modem 12, or the modem 12 may be abnormal, so that the first processing module 113 cannot complete the transmission and access.
Therefore, in the embodiment of the present invention, the
In the embodiment of the present invention, for convenience of description, an exception caused by not receiving response data of the first data is fed back in an interrupt type, which is referred to as an abort. The abort feedback information may inform the application processor 11 that the transmission of the first data is not completed, and the application processor 11 may perform a recovery operation in time based on the abort feedback information.
In specific implementation, the preset duration may be set according to an actual situation, for example, a value range of the preset duration may be 1 microsecond to 10 seconds, and a specific value is selected as the preset duration in the value range.
In an embodiment of the present invention, in order to further reduce the time of the abort, the abort feedback information may further include: abnormality type indication information indicating specific location information causing an abnormality.
In a specific implementation, the abnormality type indication information may be obtained in various manners, for example, the abnormality type may be detected by other devices except the serial bus, and the abnormality type indication information is generated and sent to the
In an embodiment of the present invention, it is,
the
In a specific implementation, the location causing the abort may be any one of the following locations:
the
the second interface unit 123;
a processing module in the modem 12 that generates the response data;
the second interface unit 123 is connected to the connection line 14 between the processing module of the modem 12 that generates the response data.
Of course, any two or more of the above abnormal specific positions may be possible.
In particular implementations, to facilitate indicating the type of anomaly, the anomaly type indication information may be set to correspond to a particular location that caused the anomaly. For example, the length of the abnormal type indication information may be 2 bits, where "00" indicates that the specific location causing the abnormality is the
In an implementation, whether the serial bus is abnormal or not can be detected by using an additional detection device, and whether the modem 12 is abnormal or not can be detected through the serial bus, which is not limited in particular.
In a specific implementation, the recovery operation may include a reset, or may include a power-off restart, or, of course, may be reset first, or may be power-off restart if the application processor 11 is not recovered yet.
It will be appreciated that in particular implementations, the data management capabilities of the application processor 11 are greater than the modem 12. After the application processor 11 is powered on and started, necessary initialization and resource allocation are required, and then the application processor 11 starts the modem 12. Since the operations of power-on, power-off, and reset of the modem 12 are controlled by the application processor 11, the application processor 11 plays a role of master control with respect to the modem 12 in a communication device such as a mobile phone, and thus in the embodiment of the present invention, the application processor 11 performs a recovery operation to prevent the whole system from being hung up.
Each system of the existing communication device is respectively and independently configured with an off-chip physical memory, so that the overall cost is high, the PCB area is large, and the miniaturization design is not facilitated.
Although the prior art also has a scheme for implementing a shared memory based on a dual-port memory (memory). However, the interface of dual port memories is mainly parallel port and the rate is usually not high. The bandwidth that the existing dual-port memory can provide is about 6.4Gbps at most, which is far lower than the requirement of a system with the requirements of large capacity, high bandwidth and low delay memory access. Generally speaking, high bandwidth means that the bandwidth requirement of a system for accessing an off-chip physical memory is above 16 Gbps; low latency means that the system access off-chip physical memory latency requirement is less than 1000 ns.
In an embodiment of the present invention, an improved communication device 1 is provided, where the communication device 1 may further include: a shared memory module 13, the application processor 11 coupled to the shared memory module 13 and having direct access to the shared memory module 13, the modem 12 coupled to the application processor 11 and having indirect access to the shared memory module 13 through the application processor 11.
The communication device 1 can enable a plurality of systems with large capacity, high bandwidth and low delay memory access requirements to share the same physical memory, thereby being beneficial to reducing the overall cost and improving the system competitiveness. Specifically, the shared memory module 13 is hung under the application processor 11, the application processor 11 can directly access the shared memory module 13, and the modem 12 indirectly accesses the shared memory module 13 through the application processor 11. Thus, a plurality of large-capacity, high-bandwidth and low-delay systems can share one off-chip physical memory.
Since the application processor 11 acts as a master with respect to the modem 12. And the application processor 11 has a large number of accesses to the shared memory module 13, and the shared memory module 13 has a large space, so in the embodiment of the present invention, the shared memory module 13 is mounted on the application processor 11 side, not on the modem 12 side.
It should be noted that the direct access in this embodiment does not mean that the application processor 11 and the shared memory module 13 are directly connected by using a data line. In practical applications, the application processor 11 and the shared memory module 13 may be connected through an interface or the like, and in this case, the application processor 11 may also be considered to directly access the shared memory module 13.
In the embodiment of the present invention, the shared memory module 13 is a single-port memory, that is, only one interface is configured to couple with the application processor 11, and another interface is not configured to couple with the modem 12 at the same time. Compared with a double-port memory, the single-port memory has the advantages that the interface of the single-port memory is mainly a serial port, the speed is usually very high, and the requirements of a system with high capacity, high bandwidth and low delay memory access requirements can be better met. And the single-port memory is more convenient to manage.
In one implementation, referring to fig. 1, the application processor 11 may include: a storage control unit 111, where the storage control unit 111 is in communication with the shared storage module 13, and the storage control unit 111 may be configured to receive access requests from the application processor 11 and the modem 12, and access the shared storage module 13 according to the access requests.
Further, data transmission may also be performed between the storage control unit 111 and the shared storage module 13 based on a bus, and a standard data format used during data transmission may be the same as or different from a standard data format used during data transmission on the first bus 112 and a standard data format used during data transmission on the second bus 121.
The first processing module 113 can access the shared memory module 13 through the first bus 112 and the memory control unit 111 according to system operation requirements. The second processing module 122 may send an access request through the second bus 121 according to the system operation requirement, so as to request to access the shared memory module 13. The access request is transmitted to the first bus 112 through the coupling relationship between the modem 12 and the application processor 11, and then transmitted to the shared memory module 13 through the memory control unit 111.
In one embodiment, the shared Memory module 13 may be a Double Data Rate Synchronous Random Access Memory (DDR SDRAM, DDR for short).
In an embodiment of the present invention, the storage control unit 111 is further configured to feed back the access result to the shared storage module 13 to the modem 12. The access result of the modem 12 to the shared memory module 13 may sequentially go through the first bus 112, the
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.
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