阅读说明：本技术 可编程逻辑阵列fpga功能测试装置 (Programmable logic array FPGA function testing device ) 是由 马卫东 杜秋平 胡斌 李亚飞 张鸿 于 2020-05-28 设计创作，主要内容包括：本发明公开了可编程逻辑阵列FPGA功能测试装置,包括测试控制器,与测试控制器相连接且对该测试控制器进行供电的电源,以及与测试控制器相连接且用于设置FPGA的测试装置；所述测试装置由前板、底板、后板、上板以及两个侧板组成。本发明提供可编程逻辑阵列FPGA功能测试装置,很好的降低了测试装置的体积,简化了FPGA功能测试的难度,能够有效的降低企业进行FPGA功能测试所需投入的成本,能够更好的在行业中普及FPGA功能测试,降低企业商业机密的外泄几率,更好的保护了企业的发展。(The invention discloses a programmable logic array FPGA function testing device, which comprises a test controller, a power supply and a testing device, wherein the power supply is connected with the test controller and supplies power to the test controller; the testing device is composed of a front plate, a bottom plate, a rear plate, an upper plate and two side plates. The programmable logic array FPGA function testing device provided by the invention has the advantages that the size of the testing device is well reduced, the difficulty of FPGA function testing is simplified, the investment cost required by an enterprise to perform FPGA function testing can be effectively reduced, the FPGA function testing can be popularized in the industry better, the leakage probability of business secrets of the enterprise is reduced, and the development of the enterprise is protected better.)

1. Programmable logic array FPGA functional test device, its characterized in that: the FPGA test system comprises a test controller, a power supply and a test device, wherein the power supply is connected with the test controller and supplies power to the test controller; the testing device is composed of a front plate (1), a bottom plate (2), a rear plate (4), an upper plate (5) and two side plates (3).

2. The FPGA functional test device of claim 1, wherein: the contact edge position department of front bezel (1) and bottom plate (2) is connected through loose-leaf piece (11), and the contact edge position department of curb plate (3) and bottom plate (2) is connected through setting up loose-leaf piece (11), and the contact edge position department of back plate (4) and bottom plate (2) is connected through loose-leaf piece (11), and upper plate (5) set up perpendicularly and contact edge position department is solid as an organic whole with back plate (2).

3. The FPGA functional test device of claim 2, wherein: the upper side surface of the bottom plate (2) is provided with an FPGA fixing plate (13), the FPGA fixing plate (13) is fixed on the bottom plate (2) through a screw, a limiting sleeve is sleeved on the screw and positioned between the FPGA fixing plate (13) and the bottom plate (2), and the length of the limiting sleeve is at least 2 CM; the bottom plate (2) is also provided with four corner platforms (12), the four corner platforms (12) are cubic, and the four corner platforms are respectively arranged at four corners of the upper side surface of the bottom plate (2); the FPGA fixing plate (13) is plate-shaped, and a plurality of strip-shaped or round hole-shaped through holes penetrating through the FPGA fixing plate (13) are further arranged on the FPGA fixing plate (13).

4. The FPGA functional test device of claim 3, wherein: the front plate (1) is arranged in front of the bottom plate (2), at least one radiating fan (8) is arranged on the front plate (1), and protective nets are arranged on the front side and the rear side of each radiating fan (8); the heat radiation fan (8) is electrically connected with the test controller.

5. The FPGA functional test device of claim 4, wherein: the two side plates (3) are respectively symmetrically arranged at the left side and the right side of the bottom plate (2), at least one wire inlet (10) is formed in each side plate (3), and the distance between each wire inlet (10) and the bottom plate (2) is 2 CM.

6. The FPGA functional test device of claim 5, wherein: the rear plate (4) is arranged behind the bottom plate (2), an air outlet (9) is formed in the rear plate (4), and a dust screen is further arranged on the air outlet (9).

7. The FPGA functional test device of claim 6, wherein: the upper plate (5) is arranged on the edge of the upper side of the rear plate (4), and a limiting card (6) and a temperature detection structure are further arranged on the upper plate (5); the limiting clamping piece (6) is a metal sheet with an L-shaped section, one side of the limiting clamping piece (6) is fixed on the edge of the upper side face of the upper plate (5), and the other side of the limiting clamping piece (6) extends downwards from the edge of the upper side face of the upper plate (5) until the limiting clamping piece extends out of the lower side face of the upper plate (5); the front edge, the left edge and the right edge of the upper plate (5) are respectively provided with at least one limiting card (6).

8. The FPGA functional test device of claim 7, wherein: the temperature detection structure is an infrared scanner (7), the infrared scanner (7) is perpendicular to the upper plate (5), and the front end of the infrared scanner (7) penetrates through the upper plate (5); the infrared scanner (7) is electrically connected with the test controller.

9. The FPGA functional test device of claim 7, wherein: the temperature detection structure is a heat conducting fin (14), the heat conducting fins (14) are arranged on the upper plate (5) in an array, and the heat conducting fins (14) penetrate through the upper plate (5); and the upper end of the heat conducting sheet (14) is provided with a temperature sensor electrically connected with the test controller.

10. The FPGA functional test device of any one of claims 8 or 9, wherein: the specific using method comprises the following steps:

firstly, presetting an automatic test program in a test controller;

fixing the tested FPGA on an FPGA fixing plate (13);

thirdly, connecting a connecting wire of the test controller with an interface of the FPGA after penetrating through a wire inlet (10) arranged on the side plate (3);

firstly, the front plate (1) and the two side plates (3) are turned upwards and kept vertical, and then the rear plate (4) is turned upwards and the side edges of the limiting clamping pieces (6) are clamped on the outer side surfaces of the front plate (1) and the two side plates (3);

fifthly, starting an automatic test program preset in the test controller;

sixthly, the test controller receives feedback information of the tested FPGA;

in the testing process, the testing controller collects the heating condition of the tested FPGA through the temperature detection structure, and starts the cooling fan (8) when the heating of the tested FPGA exceeds a preset value;

and seventhly, the test controller collects the feedback information, the heating condition and the running condition of the cooling fan and displays the feedback information, the heating condition and the running condition of the cooling fan in a table mode.

Technical Field

The invention belongs to the field of testing, and particularly relates to a programmable logic array FPGA function testing device.

Background

The existing FPGA function test equipment is large in size, poor in convenience and high in setting cost, popularization of FPGA function test is not facilitated, and in order to reduce the cost of FPGA function test, a plurality of enterprises carry out outsourcing test on the FPGA function test, so that development of the enterprises and protection of commercial confidentiality are not facilitated.

Disclosure of Invention

The invention aims to overcome the problems and provide the FPGA function testing device for the programmable logic array, so that the volume of the testing device is well reduced, the difficulty of FPGA function testing is simplified, the cost required by an enterprise to perform FPGA function testing can be effectively reduced, the FPGA function testing can be popularized in the industry better, the leakage probability of business secrets of the enterprise is reduced, and the development of the enterprise is protected better.

The purpose of the invention is realized by the following technical scheme:

the programmable logic array FPGA function test device comprises a test controller, a power supply and a test device, wherein the power supply is connected with the test controller and supplies power to the test controller; the testing device is composed of a front plate, a bottom plate, a rear plate, an upper plate and two side plates.

Preferably, the contact edge positions of the front plate and the bottom plate are connected through loose-leaf sheets, the contact edge positions of the side plates and the bottom plate are connected through loose-leaf sheets, the contact edge positions of the rear plate and the bottom plate are connected through loose-leaf sheets, the upper plate and the rear plate are vertically arranged, and the contact edge positions are fixed into a whole.

Preferably, an FPGA fixing plate is arranged on the upper side face of the bottom plate, the FPGA fixing plate is fixed on the bottom plate through a screw, a limiting sleeve is further sleeved on the screw and located between the FPGA fixing plate and the bottom plate, and the length of the limiting sleeve is at least 2 CM; the bottom plate is also provided with four corner tables, the four corner tables are cubic, and the four corner tables are respectively arranged at the four corners of the upper side surface of the bottom plate; the FPGA fixing plate is plate-shaped, and a plurality of through holes which are strip-shaped or round hole-shaped and penetrate through the FPGA fixing plate are further arranged on the FPGA fixing plate.

Preferably, the front plate is arranged in front of the bottom plate, at least one cooling fan is arranged on the front plate, and protective nets are arranged on the front side and the rear side of each cooling fan; the heat radiation fan is electrically connected with the test controller.

Preferably, the two side plates are respectively symmetrically arranged at the left side and the right side of the bottom plate, at least one wire inlet is arranged on each side plate, and the distance between each wire inlet and the bottom plate is 2 CM.

Preferably, the rear plate is arranged behind the bottom plate, the rear plate is provided with an air outlet, and the air outlet is further provided with a dust screen.

Preferably, the upper plate is arranged on the edge of the upper side of the rear plate, and a limiting card and a temperature detection structure are further arranged on the upper plate; the limiting clamping piece is a metal sheet with an L-shaped section, one side of the limiting clamping piece is fixed on the edge of the upper side surface of the upper plate, and the other side of the limiting clamping piece extends downwards from the edge of the upper side surface of the upper plate until the limiting clamping piece extends out of the lower side surface of the upper plate; the front side edge, the left side edge and the right side edge of the upper plate are respectively provided with at least one limiting card.

Preferably, the temperature detection structure is an infrared scanner, the infrared scanner is perpendicular to the upper plate, and the front end of the infrared scanner penetrates through the upper plate; the infrared scanner is electrically connected with the test controller.

As another preferred mode, the temperature detecting structure is a heat conducting fin, the heat conducting fins are arranged on the upper plate in an array mode, and the heat conducting fins penetrate through the upper plate; and the upper end of the heat conducting sheet is provided with a temperature sensor electrically connected with the test controller.

Further, the specific use method is as follows:

firstly, presetting an automatic test program in a test controller;

fixing the tested FPGA on the FPGA fixing plate;

thirdly, connecting a connecting wire of the test controller with an interface of the FPGA after penetrating through a wire inlet arranged on the side plate;

firstly, the front plate and the two side plates are turned upwards and kept vertical, and then the rear plate is turned upwards to enable the side edges of the limiting clamping pieces to be clamped on the outer side surfaces of the front plate and the two side plates;

fifthly, starting an automatic test program preset in the test controller;

sixthly, the test controller receives feedback information of the tested FPGA;

in the testing process, the testing controller collects the heating condition of the tested FPGA through the temperature detection structure, and starts the cooling fan when the heating of the tested FPGA exceeds a preset value;

and seventhly, the test controller collects the feedback information, the heating condition and the running condition of the cooling fan and displays the feedback information, the heating condition and the running condition of the cooling fan in a table mode.

Compared with the prior art, the invention has the following advantages and beneficial effects:

(1) the temperature detection structure can be an infrared scanner or a heat conducting fin, and provides more choices for products, so that users can select different structures to match according to self requirements or economic conditions, and the application range of the products is greatly improved.

(2) The invention well reduces the volume of the testing device, simplifies the difficulty of FPGA function test, can effectively reduce the investment cost required by an enterprise to carry out the FPGA function test, can well popularize the FPGA function test in the industry, reduces the leakage probability of business secrets of the enterprise and better protects the development of the enterprise.

Drawings

FIG. 1 is a block diagram of the present invention.

Figure 2 is a front view of one configuration of the present invention.

FIG. 3 is an expanded view of one configuration of the present invention.

Fig. 4 is a front view of another configuration of the present invention.

Fig. 5 is a top view of another structure of the present invention.

Fig. 6 is an expanded view of another configuration of the present invention.

Description of reference numerals: 1. a front plate; 2. a base plate; 3. a side plate; 4. a back plate; 5. an upper plate; 6. a limiting card; 7. an infrared scanner; 8. a heat radiation fan; 9. an air outlet; 10. a wire inlet; 11. a loose-leaf sheet; 12. a corner platform; 13. an FPGA fixing plate; 14. a heat conductive sheet.

Detailed Description

The present invention will be described in further detail with reference to examples, but the embodiments of the present invention are not limited thereto.