阅读说明：本技术 Pnp型低bvebo达林顿三极管器件结构及制造方法 (PNP type low BVEBODarlington triode device structure and manufacturing method ) 是由 许柏松 沈晓东 徐永斌 叶新民 沈峰 于 2020-03-06 设计创作，主要内容包括：一种PNP型低BV<Sub>EBO</Sub>达林顿三极管器件结构及制造方法,包括重型掺硼掺杂衬底上外延一层轻掺厚外延层,在轻掺厚外延层上形成两个圆柱形N型基区有源区分别作为T1和T2管的基区,在两个基区有源区的顶部分别采用相同的窗口再次进行N型重掺杂,且进行氧化扩散以形成N+型区域和隔离氧化层,在N+型区域内形成重掺的P型发射区,在划片区域内和T1管、T2管间隔区域内形成保护环,且在表面LPCVD的方法淀积一层二氧化硅作为铝下隔离介质和保护层,在N+型区域和P型发射区内部开出接触孔,在接触孔的上部淀积一层金属作为连接层,连接层将T1管与T2管串联起来,在连接层上部采用聚酰亚胺光刻胶形成保护层,且留有锯片和封装球焊用的PAD区。(PNP type low BV EBO A Darlington transistor device structure and manufacturing method thereof, comprising a light doped thick epitaxial layer extending on a heavy doped boron substrate, forming two cylindrical N-type base region active regions on the light doped thick epitaxial layer as base regions of T1 and T2 tubes, respectively, performing N-type heavy doping again by using the same window at the top of the two base region active regions, and performing oxidation diffusion to form an N + type region and an isolation oxide layer, forming a heavily doped P-type emitter region in the N + type region, forming guard rings in the scribe region, the T1 tube and the T2 tube spacing region, depositing a layer of silicon dioxide as an aluminum lower isolation medium and a protective layer on the surface L PCVD, forming contact holes in the N + type region and the P-type emitter region, depositing a layer of metal on the upper portion of the contact holes as a connection layer, connecting the T1 tube and the T2 tubes in series by the connection layer, forming a protective layer by using a polyimide photoresist on the upper portion of the connection layer, and leaving a saw blade and a packaging ball bonding padPAD area for use.)

1. PNP type low BV_EBOThe Darlington triode device structure is characterized by comprising a heavy-duty boron-doped substrate serving as a reference wafer, a P-type high-resistivity lightly-doped thick epitaxial layer which is of the same doping type and only accounts for 5% -15% of the doping amount of the heavy-duty boron-doped substrate is extended on the heavy-duty boron-doped substrate in an epitaxial mode, two cylindrical N-type base region active regions are formed on the lightly-doped thick epitaxial layer in a high-temperature diffusion mode and are respectively used as base regions of a T1 tube and a T2 tube, and the tops of the two N-type base region active regions are respectively in a phase modeAnd performing N-type heavy doping again on the same window, performing oxidation diffusion to form an N + type region and an isolation oxide layer, forming a heavily doped P-type emitting region in the N + type region by photoetching and diffusion methods, forming guard rings in the scribing region and the T1 tube and T2 tube spacing region, depositing a layer of silicon dioxide on the surface by using a L PCVD method as an aluminum lower isolation medium and a protective layer, forming contact holes for metal leads in the N + type region and the P-type emitting region, depositing a layer of metal on the upper parts of the contact holes in an evaporation mode as a connecting layer of a chip and a finished tube, connecting the T1 tube and the T2 tube in series by using the connecting layer, forming the protective layer by using polyimide photoresist on the upper parts of the connecting layer, and leaving a PAD region for saw blade and packaging ball bonding.

2. The PNP type low BV of claim 1_EBOThe Darlington triode device structure is characterized in that the resistivity of the heavy boron-doped substrate is 0.006-0.009 ohm per centimeter.

3. The PNP type low BV of claim 1_EBOThe Darlington triode device structure is characterized in that the thickness of the lightly doped thick epitaxial layer is 15-50 microns.

4. PNP type low BV_EBOA method of fabricating a darlington triode device structure, comprising the steps of:

step one, extending a layer of P-type high-resistivity lightly doped thick epitaxial layer which is of the same doping type but the doping total amount of which only accounts for 5% -15% of the doping amount of a heavy boron-doped substrate on the heavy boron-doped substrate, thermally oxidizing to grow a silicon dioxide layer with the thickness of 0.9-1.1 microns by using a high-temperature oxidation method for a subsequent isolation oxidation layer for doping and blocking a source region of a T1 tube and a T2 tube, and forming windows for the T1 tube and the T2 tube by sequentially adopting negative photoresist, contact exposure and wet etching methods;

forming an oxide layer with the thickness of less than 1000 angstroms as an injected damage barrier layer in the windows of the T1 and T2 tubes by adopting a high-temperature oxidation method, injecting N-type light doping substances into the windows of the T1 and T2 tubes by utilizing an isolation oxide layer, and performing high-temperature oxidation diffusion to form base region active regions of the T1 and T2 tubes, wherein the base region active regions have a certain junction depth;

removing the oxide layer with the thickness of less than 1000 angstroms by adopting a wet etching method, still keeping the isolation oxide layer, leaking out the window of the active region of the N-type base region, injecting N-type heavy doping substances into the window of the active region of the N-type base region again, forming a certain diffusion depth by a diffusion oxidation method after injection is finished so as to form an N + type region, and increasing the thickness of the isolation oxide layer;

forming doping windows of emitters of T1 and T2 tubes in the N + type region respectively by adopting a negative photoetching mode, forming a protection ring window in the interval region of the T1 tube and the T2 tube, simultaneously forming a window of a scribing region, carrying out constant doping on boron in the doping windows, the protection ring window and the scribing region window by adopting a liquid boron source doping method, and depositing a layer of silicon dioxide on the surface as an aluminum lower isolation and protection layer by adopting a low-pressure deposition method after doping is finished;

step five, forming lead holes in the scribing region, the N + type region and the P type emitting region respectively by adopting a negative photoetching mode, depositing metal on the surface of the chip to serve as leads of the regions, and removing the metal among the regions to form series connection of T1 and T2 tubes and interconnection of a base region and an emitting region in the tube core;

and sixthly, coating a layer of polyimide photoresist on the upper part of the metal layer, and etching a scribing groove and a PAD area for packaging ball bonding in a photoetching mode.

5. The PNP type low BV of claim 4_EBOThe manufacturing method of the Darlington triode device structure is characterized in that the resistivity of the heavy boron-doped substrate is 0.006-0.009 ohm per centimeter.

6. The PNP type low BV of claim 4_EBOThe manufacturing method of the Darlington triode device structure is characterized in that the thickness of the light-doped thick epitaxial layer is 15-50 microns。

7. The PNP type low BV of claim 4_EBOThe manufacturing method of the Darlington triode device structure is characterized in that the junction depth in the second step is 8-14 microns.

8. The PNP type low BV of claim 4_EBOThe manufacturing method of the Darlington triode device structure is characterized in that the diffusion depth in the third step is 4 microns.

Technical Field

The invention belongs to the technical field of integrated circuit or discrete device manufacturing,in particular to a PNP type low BV_EBODarlington transistor device structure and its manufacturing method are provided.

Background

PNP type low BV developed according to market demand_EBOThe darlington triode product is mainly used as an amplifying geminate transistor for sound power amplification, the topological structure of a power amplification circuit applied in the type is mainly class A and class B amplifiers, and the darlington transistor with the height of β is generally adopted in the amplifiers of the type in order to obtain better linearity.

In class ab amplifiers, crossover distortion is relatively easily generated, resulting in loss of harmonics. In order to reduce crossover distortion, various parameters of transistor products are required to be adapted to mainstream circuit structures and parameters of users. BV is yet_EBOThe parameters can affect the circuit sampling, when the parameter temperature change of the transistor is asynchronous with the temperature change of a sampling product, cross distortion is easily caused, the voltage resistance of the transistor for the class AB power amplifier is generally higher, the amplification is larger, therefore, the base region concentration is single due to the generally matched process, the junction depth is deep, and BV is finally caused_EBOAre generally above 15V. Empirically, when the transistor BV_EBOAt around 12V, the crossover distortion is small.

Disclosure of Invention

The invention aims to provide a PNP type low BV in order to reduce BVEBO of a Darlington transistor and cross-over distortion when the Darlington transistor is used on a sound power amplifier circuit_EBOThe Darlington triode device structure and the manufacturing method thereof can obtain the triode with high reliability and high safety.

The invention solves the technical problems through the following technical scheme:

the invention provides a PNP type low BV_EBOThe Darlington triode device structure is characterized by comprising a heavy-duty boron-doped substrate as a reference wafer, a P-type high-resistivity light-doped thick epitaxial layer which is of the same doping type and the total doping amount of which only accounts for 5% -15% of the doping amount of the heavy-duty boron-doped substrate is epitaxially grown on the heavy-duty boron-doped substrate, and a high-temperature expansion method is adopted on the light-doped thick epitaxial layerTwo cylindrical N-type base region active regions are formed in a scattering mode and are respectively used as base regions of a T1 tube and a T2 tube, N-type heavy doping is carried out again on the tops of the two N-type base region active regions through the same windows, oxidation diffusion is carried out to form an N + type region and an isolation oxide layer, a heavily doped P-type emitting region is formed in the N + type region through photoetching and diffusion methods, a protective ring is formed in a scribing region and a T1 tube and T2 tube spacing region, a layer of silicon dioxide is deposited on the surface L PCVD method and is used as an aluminum lower isolation medium and a protective layer, contact holes for metal leads are formed in the N + type region and the P-type emitting region, a layer of metal is deposited on the upper portion of the contact holes in an evaporation mode and is used as a connecting layer of a chip and a finished tube, the T1 tube and the T2 tube are connected in series through the connecting layer, a polyimide photoresist is used on the upper portion of the connecting layer to form a protective layer, and a saw blade area for packaging ball bonding is.

Preferably, the resistivity of the heavy-duty boron-doped substrate is 0.006-0.009 ohm per centimeter.

Preferably, the thickness of the lightly doped thick epitaxial layer is 15 to 50 microns.

The invention also provides a PNP type low BV_EBOA method of fabricating a darlington triode device structure, comprising the steps of:

step one, extending a layer of P-type high-resistivity lightly doped thick epitaxial layer which is of the same doping type but the doping total amount of which only accounts for 5% -15% of the doping amount of a heavy boron-doped substrate on the heavy boron-doped substrate, thermally oxidizing to grow a silicon dioxide layer with the thickness of 0.9-1.1 microns by using a high-temperature oxidation method for a subsequent isolation oxidation layer for doping and blocking a source region of a T1 tube and a T2 tube, and forming windows for the T1 tube and the T2 tube by sequentially adopting negative photoresist, contact exposure and wet etching methods;

forming an oxide layer with the thickness of less than 1000 angstroms as an injected damage barrier layer in the windows of the T1 and T2 tubes by adopting a high-temperature oxidation method, injecting N-type light doping substances into the windows of the T1 and T2 tubes by utilizing an isolation oxide layer, and performing high-temperature oxidation diffusion to form base region active regions of the T1 and T2 tubes, wherein the base region active regions have a certain junction depth;

removing the oxide layer with the thickness of less than 1000 angstroms by adopting a wet etching method, still keeping the isolation oxide layer, leaking out the window of the active region of the N-type base region, injecting N-type heavy doping substances into the window of the active region of the N-type base region again, forming a certain diffusion depth by a diffusion oxidation method after injection is finished so as to form an N + type region, and increasing the thickness of the isolation oxide layer;

forming doping windows of emitters of T1 and T2 tubes in the N + type region respectively by adopting a negative photoetching mode, forming a protection ring window in the interval region of the T1 tube and the T2 tube, simultaneously forming a window of a scribing region, carrying out constant doping on boron in the doping windows, the protection ring window and the scribing region window by adopting a liquid boron source doping method, and depositing a layer of silicon dioxide on the surface as an aluminum lower isolation and protection layer by adopting a low-pressure deposition method after doping is finished;

step five, forming lead holes in the scribing region, the N + type region and the P type emitting region respectively by adopting a negative photoetching mode, depositing metal on the surface of the chip to serve as leads of the regions, and removing the metal among the regions to form series connection of T1 and T2 tubes and interconnection of a base region and an emitting region in the tube core;

and sixthly, coating a layer of polyimide photoresist on the upper part of the metal layer, and etching a scribing groove and a PAD area for packaging ball bonding in a photoetching mode.

Preferably, the resistivity of the heavy-duty boron-doped substrate is 0.006-0.009 ohm per centimeter.

Preferably, the thickness of the lightly doped thick epitaxial layer is 15 to 50 microns.

Preferably, the junction depth in the second step is 8-14 μm.

Preferably, the diffusion depth in step three is 4 microns.

On the basis of the common knowledge in the field, the above preferred conditions can be combined randomly to obtain the preferred embodiments of the invention.

The positive progress effects of the invention are as follows:

darlington control by the structure of the inventionBV of transistor_EBOTo treat BV_EBOA typical value is controlled at 12V. On the basis of not increasing the photoetching times, only the oxide layer in the window is removed by a wet etching method, the window without the oxide layer is leaked out, and then the doping is directly carried out, so that the method is simple in process and easy to realize.

Drawings

FIG. 1 shows a PNP type low BV in accordance with a preferred embodiment of the present invention_EBOThe structure of the Darlington triode device is schematically shown.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention.

As shown in FIG. 1, this example provides a PNP type low BV_EBOThe Darlington triode device structure comprises a heavy type boron-doped substrate 1 with the resistivity of 0.006-0.009 as a reference wafer, a P type high-resistivity light-doped thick epitaxial layer 2 which is of the same doping type and only accounts for 5% -15% of the doping amount of the heavy type boron-doped substrate is extended on the heavy type boron-doped substrate 1 in an epitaxial mode, the thickness of the light-doped thick epitaxial layer 2 is 15-50 microns, two cylindrical N type base region active regions 4 are formed on the light-doped thick epitaxial layer 2 in a high-temperature diffusion mode and are respectively used as base regions of a T1 tube and a T2 tube, the N type heavy doping active regions 4 are respectively subjected to N type re-doping through the same window at the tops of the N type base region active regions 4 and subjected to oxidation diffusion to form an N + type region 5 and an isolation oxide layer 6, a heavy-doped P type emitter region 7 is formed in the N + type region 5 through a photoetching and diffusion method, meanwhile, a guard ring 11 is formed in a scribing region 3, a T1 tube and a T2 tube isolation tube, a surface is used as a P type emitter region L and an isolation layer 5, and an aluminum oxide layer is formed in the P + emitter region 5, and an innerA contact hole for a metal lead is formed, a layer of metal is deposited on the upper portion of the contact hole in an evaporation mode to serve as a connecting layer 9 of a chip and a finished tube, the T1 tube and the T2 tube are connected in series through the connecting layer, a protective layer 10 is formed on the upper portion of the connecting layer through polyimide photoresist, and a PAD area for saw blade and packaging ball bonding is reserved.

This embodiment also provides a PNP type low BV_EBOA method of fabricating a darlington triode device structure, comprising the steps of:

step one, extending a layer of P-type high-resistivity lightly doped thick epitaxial layer 2 which has the same doping type but the total doping amount of which only accounts for 5% -15% of the doping amount of a heavy boron-doped substrate on the heavy boron-doped substrate 1 with the resistivity of 0.006-0.009, wherein the thickness of the lightly doped thick epitaxial layer is 15-50 microns, growing a silicon dioxide layer with the thickness of 0.9-1.1 micron by using a high-temperature oxidation method for a subsequent isolation oxide layer 6 for source region doping and blocking of T1 and T2 tubes, and forming windows for T1 and T2 tubes by sequentially adopting negative photoresist, contact exposure and wet etching methods.

And step two, forming an oxide layer with the thickness of less than 1000 angstroms as an injected damage barrier layer in the windows of the T1 and T2 tubes by adopting a high-temperature oxidation method, injecting N-type light doping substances into the windows of the T1 and T2 tubes by utilizing the isolation oxide layer 6, and performing high-temperature oxidation diffusion to form base region active regions of the T1 and T2 tubes, wherein the base region active regions have a certain junction depth, and the junction depth is 8-14 microns.

Removing the oxide layer with the thickness of less than 1000 angstroms by adopting a wet etching method, remaining the isolation oxide layer 6, leaking out the window of the N-type base region active region 4, and injecting N-type heavy doping into the window of the N-type base region active region 4 again, wherein the concentration of the impurity injected at this time is relatively high, so as to ensure that the low BV is ensured_EBOAfter the implantation, a diffusion depth of about 4 μm is formed by diffusion oxidation to form the N + type region 5, and the thickness of the isolation oxide layer is increased.

And fourthly, forming doping windows 7 of emitters of T1 and T2 tubes in the N + type region 5 by adopting a negative photoetching mode, forming a protection ring window 11 in a spacing region of the T1 tube and the T2 tube, forming a window of the scribing region 3 at the same time, carrying out boron constant doping in the doping windows 7, the protection ring window 11 and the scribing region 3 by adopting a liquid boron source doping method, and depositing a layer of silicon dioxide on the surface by adopting a low-pressure deposition method to serve as an aluminum lower isolation and protection layer 8 after doping.

And step five, forming lead holes in the scribing region 3, the N + type region 5 and the P type emitting region 7 respectively by adopting a negative photoetching mode, depositing metal on the surface of the chip to serve as leads of the regions, and removing the metal among the regions to form series connection of T1 and T2 tubes and interconnection of the base region and the emitting region in the die.

And sixthly, coating a polyimide photoresist layer on the upper part of the metal layer to form a protective layer 10, and etching a scribing groove and a PAD area of the packaging ball bonding in a photoetching mode.

The present invention adopts the structure shown in figure I to control BV of Darlington transistor_EBOTo treat BV_EBOA typical value is controlled at 12V.

While specific embodiments of the invention have been described above, it will be appreciated by those skilled in the art that these are by way of example only, and that the scope of the invention is defined by the appended claims. Various changes and modifications to these embodiments may be made by those skilled in the art without departing from the spirit and scope of the invention, and these changes and modifications are within the scope of the invention.