阅读说明：本技术 半导体装置 (Semiconductor device with a plurality of semiconductor chips ) 是由 小松香奈子 于 2019-01-11 设计创作，主要内容包括：实施方式的半导体装置具备：第1导电型的半导体层；多个带状区域,设置在上述半导体层上,并沿第1方向延伸；第2导电型的多个漏极区域,设置在上述半导体层上,配置于上述带状区域之间,并与上述带状区域隔离,沿上述第1方向延伸；栅电极,沿上述第1方向延伸；第1接触区,与上述带状区域连接；以及第2接触区,与上述漏极区域连接。各上述带状区域具有第1导电型的背栅区域和第2导电型的源极区域。在上述多个带状区域以及上述多个漏极区域排列的第2方向,上述多个漏极区域中的最接近中央部的上述漏极区域与上述第2接触区的接触面积比配置于最外侧的上述漏极区域与上述第2接触区的接触面积小。(The semiconductor device of the embodiment includes: a semiconductor layer of a 1 st conductivity type; a plurality of stripe regions provided on the semiconductor layer and extending in a 1 st direction; a plurality of drain regions of a 2 nd conductivity type provided on the semiconductor layer, disposed between the stripe regions, isolated from the stripe regions, and extending in the 1 st direction; a gate electrode extending in the 1 st direction; a 1 st contact region connected to the band region; and a 2 nd contact region connected to the drain region. Each of the strip regions has a back gate region of the 1 st conductivity type and a source region of the 2 nd conductivity type. In the 2 nd direction in which the plurality of stripe regions and the plurality of drain regions are arranged, a contact area between the drain region closest to the central portion of the plurality of drain regions and the 2 nd contact region is smaller than a contact area between the drain region arranged on the outermost side and the 2 nd contact region.)

1. A semiconductor device, comprising:

a semiconductor layer of a 1 st conductivity type;

a plurality of stripe regions provided on the semiconductor layer and extending in a 1 st direction;

a plurality of drain regions of a 2 nd conductivity type provided on the semiconductor layer, disposed between the stripe regions, isolated from the stripe regions, and extending in the 1 st direction;

a gate insulating film provided in a region directly above a region between the band-shaped region and the drain region in the semiconductor layer;

a gate electrode provided on the gate insulating film and extending in the 1 st direction;

a 1 st contact region connected to the band region; and

a 2 nd contact region connected to the drain region,

each of the band-shaped regions includes:

a back gate region of the 1 st conductivity type, the back gate region having an effective impurity concentration higher than that of the semiconductor layer; and

a source region of a 2 nd conductivity type having an effective impurity concentration higher than that of the semiconductor layer,

in a 2 nd direction in which the plurality of stripe regions and the plurality of drain regions are arranged, a contact area between the drain region and the 2 nd contact region that is closest to a central portion in the 2 nd direction among the plurality of drain regions is smaller than a contact area between the drain region and the 2 nd contact region that are disposed outermost in the 2 nd direction.

2. The semiconductor device according to claim 1,

the contact area between the drain region and the 2 nd contact region is smaller as the drain region is closer to the central portion in the 2 nd direction.

3. The semiconductor device according to claim 1,

the number of the 2 nd contact regions connected to the drain region closest to the central portion is smaller than the number of the 2 nd contact regions connected to the drain region disposed outermost.

4. The semiconductor device according to claim 3,

the number of the 2 nd contact regions connected to the drain region closer to the central portion in the 2 nd direction is smaller.

5. The semiconductor device according to claim 1,

in the 2 nd direction, a contact area between the 1 st land and the strip-shaped region closest to the 2 nd direction center portion among the plurality of strip-shaped regions is smaller than a contact area between the 1 st land and the strip-shaped region disposed on the 2 nd direction outermost side.

6. The semiconductor device according to claim 5,

the contact area between the belt-shaped region and the 1 st contact region is smaller as the belt-shaped region is closer to the center portion in the 2 nd direction.

7. The semiconductor device according to claim 1,

in the stripe region, the back gate region and the source region are alternately arranged along the 1 st direction.

8. A semiconductor device, comprising:

a semiconductor layer of a 1 st conductivity type;

a plurality of stripe regions provided on the semiconductor layer and extending in a 1 st direction;

a plurality of drain regions of a 2 nd conductivity type provided on the semiconductor layer, disposed between the stripe regions, isolated from the stripe regions, and extending in the 1 st direction;

a gate insulating film provided in a region directly above a region between the band-shaped region and the drain region in the semiconductor layer;

a gate electrode provided on the gate insulating film and extending in the 1 st direction;

a 1 st contact region connected to the band region; and

a 2 nd contact region connected to the drain region,

each of the band-shaped regions includes:

a back gate region of the 1 st conductivity type, the back gate region having an effective impurity concentration higher than that of the semiconductor layer; and

a source region of a 2 nd conductivity type having an effective impurity concentration higher than that of the semiconductor layer,

in a 2 nd direction in which the plurality of stripe regions and the plurality of drain regions are arranged, a contact area between the stripe region closest to a central portion in the 2 nd direction and the 1 st contact region among the plurality of stripe regions is smaller than a contact area between the stripe region arranged outermost in the 2 nd direction and the 1 st contact region.

9. The semiconductor device according to claim 8,

the contact area between the belt-shaped region and the 1 st contact region is smaller as the belt-shaped region is closer to the center portion in the 2 nd direction.

10. The semiconductor device according to claim 8,

the number of the 1 st land connected to the belt-shaped region closest to the central portion is smaller than the number of the 1 st land connected to the belt-shaped region disposed on the outermost side.

11. The semiconductor device according to claim 10,

the number of the 1 st contact regions connected to the strip-shaped region is smaller as the strip-shaped region is closer to the center portion in the 2 nd direction.

12. The semiconductor device according to claim 8,

when at least 1 of the drain regions is divided into a 1 st region, a 2 nd region and a 3 rd region, the 2 nd region is disposed between the 1 st region and the 3 rd region in the 1 st direction, and the length of the 1 st region, the length of the 2 nd region and the length of the 3 rd region in the 1 st direction are equal to each other,

a contact area between the 2 nd region and the 2 nd contact region is smaller than a contact area between the 1 st region and the 2 nd contact region, and a contact area between the 2 nd region and the 2 nd contact region is smaller than a contact area between the 3 rd region and the 2 nd contact region.

13. The semiconductor device according to claim 8,

in the stripe region, the back gate region and the source region are alternately arranged along the 1 st direction.

14. A semiconductor device, comprising:

a semiconductor layer of a 1 st conductivity type;

a plurality of stripe regions provided on the semiconductor layer and extending in a 1 st direction;

a plurality of drain regions of a 2 nd conductivity type provided on the semiconductor layer, disposed between the stripe regions, isolated from the stripe regions, and extending in the 1 st direction;

a gate insulating film provided in a region directly above a region between the band-shaped region and the drain region in the semiconductor layer;

a gate electrode provided on the gate insulating film and extending in the 1 st direction;

a 1 st contact region connected to the band region; and

a 2 nd contact region connected to the drain region,

each of the band-shaped regions includes:

a back gate region of the 1 st conductivity type, the back gate region having an effective impurity concentration higher than that of the semiconductor layer; and

a source region of a 2 nd conductivity type having an effective impurity concentration higher than that of the semiconductor layer,

when at least 1 of the drain regions is divided into a 1 st region, a 2 nd region and a 3 rd region, the 2 nd region is disposed between the 1 st region and the 3 rd region in the 1 st direction, and the length of the 1 st region, the length of the 2 nd region and the length of the 3 rd region in the 1 st direction are equal to each other,

a contact area between the 2 nd region and the 2 nd contact region is smaller than a contact area between the 1 st region and the 2 nd contact region, and a contact area between the 2 nd region and the 2 nd contact region is smaller than a contact area between the 3 rd region and the 2 nd contact region.

15. The semiconductor device according to claim 14,

when at least 1 of the strip-shaped regions is divided into a 4 th region, a 5 th region and a 6 th region, the 5 th region is disposed between the 4 th region and the 6 th region in the 1 st direction, and the length of the 4 th region, the length of the 5 th region and the length of the 6 th region in the 1 st direction are equal to each other,

a contact area between the 5 th region and the 1 st contact region is smaller than a contact area between the 4 th region and the 1 st contact region, and a contact area between the 5 th region and the 1 st contact region is smaller than a contact area between the 6 th region and the 1 st contact region.

16. The semiconductor device according to claim 14,

in the stripe region, the back gate region and the source region are alternately arranged along the 1 st direction.

17. A semiconductor device, comprising:

a semiconductor layer of a 1 st conductivity type;

a plurality of stripe regions provided on the semiconductor layer and extending in a 1 st direction;

a plurality of drain regions of a 2 nd conductivity type provided on the semiconductor layer, disposed between the stripe regions, isolated from the stripe regions, and extending in the 1 st direction;

a gate insulating film provided in a region directly above a region between the band-shaped region and the drain region in the semiconductor layer;

a gate electrode provided on the gate insulating film and extending in the 1 st direction;

a 1 st contact region connected to the band region; and

a 2 nd contact region connected to the drain region,

each of the band-shaped regions includes:

a back gate region of the 1 st conductivity type, the back gate region having an effective impurity concentration higher than that of the semiconductor layer; and

a source region of a 2 nd conductivity type having an effective impurity concentration higher than that of the semiconductor layer,

when at least 1 of the strip-shaped regions is divided into a 1 st region, a 2 nd region and a 3 rd region, the 2 nd region is arranged between the 1 st region and the 3 rd region in the 1 st direction, and the length of the 1 st region, the length of the 2 nd region and the length of the 3 rd region in the 1 st direction are equal to each other,

a contact area between the 2 nd region and the 1 st contact region is smaller than a contact area between the 1 st region and the 1 st contact region, and a contact area between the 2 nd region and the 1 st contact region is smaller than a contact area between the 3 rd region and the 1 st contact region.

18. The semiconductor device according to claim 17,

in the stripe region, the back gate region and the source region are alternately arranged along the 1 st direction.

19. The semiconductor device according to claim 17, further comprising:

an element isolation insulating film provided between the drain region and the source region, and contacting the drain region but not contacting the source region; and

and a drift region of the 2 nd conductivity type provided in a region directly below the element isolation insulating film, connected to the drain region, and having an effective impurity concentration lower than that of the drain region.

20. A semiconductor device, comprising:

a semiconductor layer of a 1 st conductivity type;

a plurality of stripe regions provided on the semiconductor layer and extending in a 1 st direction;

a plurality of drain regions of a 2 nd conductivity type provided on the semiconductor layer, disposed between the stripe regions, isolated from the stripe regions, and extending in the 1 st direction;

a gate insulating film provided in a region directly above a region between the band-shaped region and the drain region in the semiconductor layer;

a gate electrode provided on the gate insulating film and extending in the 1 st direction;

a 1 st contact region connected to the band region; and

a 2 nd contact region connected to the drain region,

each of the band-shaped regions includes:

a back gate region of the 1 st conductivity type, the back gate region having an effective impurity concentration higher than that of the semiconductor layer; and

a source region of a 2 nd conductivity type having an effective impurity concentration higher than that of the semiconductor layer,

in the 1 st direction and at least one of the 2 nd directions in which the plurality of stripe regions and the plurality of drain regions are arranged, a contact area between the drain region and the 2 nd contact region located at a central portion of the at least one direction of the semiconductor layer is smaller than a contact area between the drain region and the 2 nd contact region located at an end portion of the at least one direction of the semiconductor layer, or a contact area between the stripe region and the 1 st contact region located at a central portion of the at least one direction of the semiconductor layer is smaller than a contact area between the stripe region and the 1 st contact region located at an end portion of the at least one direction of the semiconductor layer.

21. A semiconductor device, comprising:

a semiconductor layer of a 1 st conductivity type;

a plurality of stripe regions provided on the semiconductor layer and extending in a 1 st direction;

a plurality of drain regions of a 2 nd conductivity type provided on the semiconductor layer, disposed between the stripe regions, isolated from the stripe regions, and extending in the 1 st direction;

a gate insulating film provided in a region directly above a region between the band-shaped region and the drain region in the semiconductor layer;

a gate electrode provided on the gate insulating film and extending in the 1 st direction;

a 1 st contact region connected to the band region; and

a 2 nd contact region connected to the drain region,

each of the band-shaped regions includes:

a back gate region of the 1 st conductivity type, the back gate region having an effective impurity concentration higher than that of the semiconductor layer; and

a source region of a 2 nd conductivity type having an effective impurity concentration higher than that of the semiconductor layer,

in the 1 st direction and at least one of the 2 nd directions in which the plurality of band-shaped regions and the plurality of drain regions are arranged, a contact area between the drain region and the 2 nd contact region located at a central portion of the at least one direction of the semiconductor layer is smaller than a contact area between the drain region and the 2 nd contact region located at a central portion of the at least one direction of the semiconductor layer other than the drain region, or a contact area between the band-shaped region and the 1 st contact region located at a central portion of the at least one direction of the semiconductor layer is smaller than a contact area between the 1 st contact region and one of the band-shaped regions located at a central portion of the at least one direction of the semiconductor layer other than the band-shaped region.

Technical Field

Background

With the high integration of semiconductor devices, the current density increases, and there is a concern about destruction due to an increase in temperature.

Disclosure of Invention

Drawings

Fig. 1 is a plan view schematically showing a semiconductor device according to embodiment 1.

Fig. 2 is a partially enlarged plan view showing a region a in fig. 1.

Fig. 3A is a sectional view taken along line B-B 'shown in fig. 2, and fig. 3B is a sectional view taken along line C-C' shown in fig. 2.

Fig. 4 is a plan view schematically showing the semiconductor device according to embodiment 2.

Fig. 5 is a plan view schematically showing the semiconductor device according to embodiment 3.

Fig. 6 is a plan view schematically showing the semiconductor device according to embodiment 4.

Fig. 7 is a plan view schematically showing the semiconductor device according to embodiment 5.

Fig. 8 is a plan view schematically showing the semiconductor device according to embodiment 6.

Fig. 9 is a plan view schematically showing the semiconductor device according to embodiment 7.

Fig. 10 is a plan view schematically showing a semiconductor device according to embodiment 8.

Fig. 11 is a plan view schematically showing the semiconductor device according to embodiment 9.

Fig. 12 is a plan view schematically showing the semiconductor device according to embodiment 10.

Embodiments relate to a semiconductor device.