阅读说明：本技术 支承玻璃基板和使用了其的层叠基板 (Supporting glass substrate and laminated substrate using same ) 是由 村田哲哉 藤井美红 铃木良太 于 2018-06-15 设计创作，主要内容包括：本发明的支承玻璃基板的特征在于，30～380℃的温度范围的平均线热膨胀系数为30×10<Sup>?7</Sup>/℃以上且55×10<Sup>?7</Sup>/℃以下，杨氏模量为80GPa以上。(The support glass substrate is characterized in that the average linear thermal expansion coefficient of the support glass substrate in the temperature range of 30-380 ℃ is 30 multiplied by 10 ‑7 Over/° CAnd 55X 10 ‑7 The Young's modulus is 80GPa or more at a temperature of less than/° C.)

1. A supporting glass substrate characterized in that the average linear thermal expansion coefficient is 30 x 10 in a temperature range of 30 to 380 DEG C^-7over/DEG C and 55X 10^-7The Young's modulus is 80GPa or more at a temperature of less than/° C.

2. The supporting glass substrate according to claim 1, wherein the total thickness variation TTV is less than 2.0 μm.

3. The supporting glass substrate according to claim 1 or 2, wherein the glass composition contains SiO in mass%₂50％～66％、Al₂O₃7％～34％、B₂O₃0％～8％、MgO 0％～22％、CaO 1％～15％、Y₂O₃+La₂O₃+ZrO₂0％～20％。

4. A supporting glass substrate according to any one of claims 1 to 3, wherein the substrate is a processed substrate in which a semiconductor chip is molded with a resin in a process of manufacturing a semiconductor package.

5. A laminated substrate comprising at least a processing substrate and a supporting glass substrate for supporting the processing substrate, wherein the supporting glass substrate is the supporting glass substrate according to any one of claims 1 to 4.

6. The laminate substrate according to claim 5, wherein the processing substrate is a processing substrate in which the semiconductor chip is molded with a resin.

7. A method for manufacturing a semiconductor package, comprising:

preparing a laminated substrate including at least a processing substrate and a support glass substrate for supporting the processing substrate; and

a step of processing the processing substrate, and,

the supporting glass substrate according to any one of claims 1 to 4.

8. The method of manufacturing a semiconductor package according to claim 7, wherein the processing includes a step of performing wiring on one surface of the processing substrate.

9. The method of manufacturing a semiconductor package according to claim 7 or 8, wherein the processing treatment includes a step of forming a solder bump on one surface of the processing substrate.

Technical Field

The present invention relates to a support glass substrate and a laminated substrate using the same, and more particularly, to a support glass substrate for supporting a processed substrate in which a semiconductor chip is molded with a resin in a process of manufacturing a semiconductor package, and a laminated substrate using the same.

Background

Portable electronic devices such as cellular phones, notebook personal computers, and pda (personal Data assistance) are required to be small and light. Accordingly, the mounting space of the semiconductor chips used in these electronic devices is also strictly limited, and high-density mounting of the semiconductor chips is becoming a problem. Therefore, in recent years, high-density mounting of semiconductor packages has been achieved by a three-dimensional mounting technique in which semiconductor chips are stacked on each other and wiring connections are made between the semiconductor chips.

In addition, a conventional Wafer Level Package (WLP) is manufactured by forming bumps in a wafer state and then singulating the wafer by dicing. However, the conventional WLP has a problem that it is difficult to increase the number of pins, and a semiconductor chip is easily broken when mounted in a state where the back surface of the semiconductor chip is exposed.

Therefore, a fan out type WLP has been proposed as a new WLP. The fan out WLP can increase the number of pins and protect the end of the semiconductor chip to prevent the semiconductor chip from being broken.

The fan out WLP has a chip first (chip first) type and a chip last (chip last) type manufacturing method. The chip-first type includes, for example, the following steps: a step of molding a plurality of semiconductor chips with a resin sealing material to form a processed substrate, and then wiring one surface of the processed substrate; a step of forming solder bumps, and the like. The chip last type includes, for example, the following steps: and a step of forming a solder bump after forming a processing substrate by providing a wiring layer on a support substrate, arranging a plurality of semiconductor chips, and molding the processing substrate with a resin sealing material.

Further, a semiconductor package called a Panel Level Package (PLP) has also been recently studied. In PLP, a rectangular support substrate is used instead of a wafer in order to increase the number of semiconductor packages mounted per 1 support substrate and reduce manufacturing cost.

In the manufacturing process of these semiconductor packages, the sealing material may be deformed or the processed substrate may be warped due to the heat treatment at about 200 ℃. If the processed substrate is warped, it is difficult to perform high-density wiring on one surface of the processed substrate, and it is also difficult to accurately form the solder bump.

From this situation, in order to suppress warpage of the processing substrate, it has been studied to use a glass substrate for supporting the processing substrate (see patent document 1).

The glass substrate is easy to smooth the surface and has rigidity. Therefore, if a glass substrate is used as the support substrate, the processed substrate can be firmly and accurately supported. In addition, the glass substrate easily transmits light such as ultraviolet light and infrared light. Therefore, when a glass substrate is used as the support substrate, the processed substrate can be easily fixed by providing an adhesive layer of an ultraviolet-curable adhesive or the like. Further, the processed substrate can be easily separated by providing a release layer or the like which absorbs infrared rays. In another embodiment, the processing substrate can be easily fixed and separated by providing an adhesive layer or the like with an ultraviolet curable adhesive tape or the like.

Disclosure of Invention

Problems to be solved by the invention

The fan out WLP and PLP include the following steps: a step of molding a plurality of semiconductor chips with a resin sealing material to form a processed substrate, and then wiring on one surface of the processed substrate; a step of forming solder bumps, and the like.

In these steps, since heat treatment is carried out at about 200 to 300 ℃, the sealing material may be deformed and the processed substrate may be changed in dimension. If the processed substrate is changed in size, it is difficult to perform high-density wiring on one surface of the processed substrate, and it is also difficult to accurately form solder bumps.

In order to suppress the dimensional change of the processing substrate, it is effective to use a glass substrate as the support substrate. However, even when a glass substrate is used, the size of the processed substrate may change.

The present invention has been made in view of the above circumstances, and a technical object thereof is to provide a support glass substrate in which dimensional change of a processing substrate is less likely to occur, thereby contributing to high-density mounting of a semiconductor package.

Means for solving the problems

The present inventors have repeatedly performed various experiments, and as a result, have found that: the above technical problem can be solved by strictly controlling the thermal expansion coefficient of the support glass substrate and increasing the young's modulus of the support glass substrate, and the present invention has been made. That is, the supporting glass substrate of the present invention is characterized in that the average linear thermal expansion coefficient in the temperature range of 30 to 380 ℃ is 30X 10^-7over/DEG C and 55X 10^-7The Young's modulus is 80GPa or more at a temperature of less than/° C. Here, the "average linear thermal expansion coefficient in the temperature range of 30 to 380 ℃" can be measured by an dilatometer. "Young's modulus" can be measured by a known resonance method.

In the support glass substrate of the present invention, the average linear thermal expansion coefficient in the temperature range of 30 to 380 ℃ is controlled to be 30 x 10^-7over/DEG C and 55X 10^-7Below/° c. This makes it easy to match the thermal expansion coefficients of the processing substrate and the supporting glass substrate. Further, if the thermal expansion coefficients of the two are matched, dimensional change (particularly warp deformation) of the processing substrate during the processing is easily suppressed. As a result, the wiring can be performed with high density on one surface of the processed substrate, and the solder bump can be formed accurately.

Further, in the supporting glass substrate of the present invention, the Young's modulus is controlled to 80GPa or more. This improves the rigidity of the laminated substrate, and therefore, it is easy to control the dimensional change (particularly, warp deformation) of the processed substrate, and the processed substrate can be firmly and accurately supported.

In addition, the supporting glass substrate of the present invention preferably has a Total Thickness Variation (TTV) of less than 2.0. mu.m. This facilitates improvement in the precision of the processing. In particular, since the wiring accuracy can be improved, high-density wiring can be realized. The number of times of reuse of the support glass substrate can also be increased. Here, "Total Thickness Variation (TTV)" is the difference between the maximum thickness and the minimum thickness of the whole, and can be measured, for example, by SBW-331ML/d manufactured by Kobelco scientific research.

Further, the support glass substrate of the present invention is preferably: the glass composition contains SiO in mass%₂50～66％、Al₂O₃7～34％、B₂O₃0～8％、MgO 0～22％、CaO 1～15％、Y₂O₃+La₂O₃+ZrO₂0 to 20 percent. Here, "Y₂O₃+La₂O₃+ZrO₂"means Y₂O₃、La₂O₃And ZrO₂The total amount of (a).

The support glass substrate of the present invention is preferably used for supporting a processed substrate in which a semiconductor chip is molded with a resin in a process of manufacturing a semiconductor package.

The laminated substrate of the present invention is preferably a laminated substrate including at least a processing substrate and a support glass substrate for supporting the processing substrate, and the support glass substrate is the support glass substrate.

In the laminated substrate of the present invention, the processing substrate is preferably a processing substrate in which a semiconductor chip is molded with a resin.

In addition, the method for manufacturing a semiconductor package of the present invention preferably includes: preparing a laminated substrate including at least a processing substrate and a support glass substrate for supporting the processing substrate; and a step of processing the processing substrate, wherein the supporting glass substrate is the supporting glass substrate.

In the method for manufacturing a semiconductor package according to the present invention, the processing preferably includes a step of wiring one surface of the processing substrate.

In addition, the method for manufacturing a semiconductor package of the present invention preferably includes: the processing treatment includes a step of forming a solder bump on one surface of the processing substrate.

Drawings

Fig. 1 is a schematic perspective view showing an example of a laminated substrate of the present invention.

Fig. 2 is a schematic cross-sectional view showing a chip-first manufacturing process of a fan out WLP.

Fig. 3 is a schematic cross-sectional view showing a step of using a support glass substrate as a back grind (back grind) substrate and thinning the processed substrate.

Detailed Description

In the support glass substrate of the present invention, the average linear thermal expansion coefficient in the temperature range of 30 to 380 ℃ is 30X 10^-7over/DEG C and 55X 10^-7/DEG C or less, preferably 32X 10^-7over/DEG C and 52X 10^-7Less than/DEG C, preferably 33X 10^-7over/DEG C and 49X 10^-7Less than/° C, and particularly preferably 34X 10^-7over/DEG C and 44X 10^-7Below/° c. If the average linear thermal expansion coefficient in the temperature range of 30 to 380 ℃ is outside the above range, it is difficult to match the thermal expansion coefficients of the processing substrate and the supporting glass substrate. Further, if the thermal expansion coefficients of the two are not matched, dimensional change (particularly warp deformation) of the processed substrate is likely to occur during processing.

In the supporting glass substrate of the present invention, the Young's modulus is preferably 80GPa or more, 85GPa or more, 90GPa or more, 95GPa or more, and particularly 96 to 130 GPa. If the young's modulus is too low, it becomes difficult to maintain the rigidity of the laminate, and dimensional changes (particularly warp deformation) tend to occur in the processed substrate.

In the supporting glass substrate of the present invention, the Total Thickness Variation (TTV) is preferably less than 2.0 μm, 1.5 μm or less, 1.0 μm or less, and particularly 0.1 μm or more and less than 1.0. mu.m. If the Total Thickness Variation (TTV) is too large, the accuracy of the processing is likely to be lowered. In addition, it is difficult to reuse the supporting glass substrate.

The entire surface of the support glass substrate of the present invention is preferably a polished surface. Thus, the Total Thickness Variation (TTV) can be easily controlled to be less than 2.0 μm, 1.5 μm or less, 1.0 μm or less, and particularly less than 1.0 μm. As a method of the polishing treatment, various methods can be employed, and the following methods are preferred: the glass substrate is polished while being held between a pair of polishing pads on both surfaces thereof and rotated together with the pair of polishing pads. Further, it is preferable that the pair of polishing pads have different outer diameters, and that the polishing process is performed so that a part of the glass substrate is intermittently exposed from the polishing pads during polishing. This makes it easy to reduce the Total Thickness Variation (TTV) and also to reduce the amount of warpage. In the polishing treatment, the polishing depth is not particularly limited, but the polishing depth is preferably 50 μm or less, 30 μm or less, 20 μm or less, and particularly 10 μm or less. The smaller the polishing depth, the more the productivity of the supporting glass substrate is improved.

The supporting glass substrate of the present invention is further preferably a glass composition containing SiO in mass%₂50～66％、Al₂O₃7～34％、B₂O₃0～8％、MgO 0～22％、CaO 1～15％、Y₂O₃+La₂O₃+ZrO₂0 to 20 percent. The reason why the contents of the respective components are limited as described above is as follows. In the description of the content of each component,% represents mass% unless otherwise specified.

SiO₂Is a component forming a glass network. SiO 2₂The content of (b) is preferably 50-66%, 51-65%, 52-64%, 53-63%, 54-62.5%, 56-62%, especially 58-61%. If SiO₂When the content of (b) is too small, vitrification is difficult and weather resistance is liable to decrease. Further, the thermal expansion coefficient becomes excessively high. On the other hand, if SiO₂When the content (b) is too large, the meltability and moldability are liable to be lowered, and the thermal expansion coefficient is too low.

Al₂O₃Is a component for improving Young's modulus and weather resistance. Al (Al)₂O₃The content of (b) is preferably 7-34%, 8-26%, 9-24%, 11-23%, 12-22%, 14-21%, especially 16-21%. If Al is present₂O₃When the content of (b) is too small, the Young's modulus and weather resistance tend to be lowered. On the other hand, if Al₂O₃When the content of (b) is too large, the meltability, moldability and devitrification resistance are liable to be deteriorated.

B₂O₃Is a component forming a glass network, and is a component for lowering Young's modulus and weather resistance. Thus, B₂O₃The content of (b) is preferably 0 to 8%, 0.1 to 7%, 1 to 6%, particularly 3 to 5%.

MgO is a component that greatly increases young's modulus, and also reduces high-temperature viscosity to improve meltability and moldability. The content of MgO is preferably 0 to 22%, 0.5 to 21%, 1 to 20.5%, 2 to 20%, 4 to 19.5%, 5 to 19%, 7 to 19%, 8 to 18%, 8.5 to 16%, 9 to 14%, particularly 9 to 12%. If the content of MgO is too small, it is difficult to obtain the above-described effects. On the other hand, if the content of MgO is too large, devitrification resistance is liable to decrease.

CaO is a component that lowers the high-temperature viscosity and improves the meltability and formability. The preferable content of CaO is 1-15%, 2-12%, 3-10%, especially 5-8%. If the CaO content is too small, it is difficult to obtain the above-described effects. On the other hand, if the content of CaO is too large, devitrification resistance is liable to be lowered.

From the viewpoint of improving the young's modulus, the molar ratio MgO/(MgO + CaO + SrO + BaO) is preferably 0 or more, 0.1 or more, 0.2 or more, 0.3 or more, 0.4 or more, 0.5 or more, 0.6 or more, and particularly 0.7 or more. The term "MgO/(MgO + CaO + SrO + BaO)" refers to a value obtained by dividing the MgO content by the total amount of MgO, CaO, SrO, and BaO.

Y₂O₃、La₂O₃And ZrO₂Is a component for increasing the Young's modulus. Y is₂O₃、La₂O₃And ZrO₂The total amount of (A) is preferably 0-20%, 0.1-18%, 0.5-16%, 1-15%, 1-14%, 1-12%1.2 to 10%, 1.3 to 8%, especially 1.5 to 5%. If Y is₂O₃、La₂O₃And ZrO₂If the amount of (3) is too large, the devitrification resistance is liable to deteriorate. Y is₂O₃The content of (b) is preferably 0 to 15%, 0.1 to 14%, 0.5 to 13%, 0.5 to 12%, 0.5 to 10%, 0.5 to 8%, 0.5 to 6%, particularly 1 to 4%. La₂O₃The content of (B) is preferably 0 to 6%, 0 to 4%, particularly 0 to 2%. ZrO (ZrO)₂The content of (B) is preferably 0 to 10%, 0.1 to 6%, 0.5 to 4%, particularly 1 to 3%. If Y is₂O₃If the content of (b) is too large, the devitrification resistance is liable to be lowered, and the raw material cost is liable to be increased. If La₂O₃If the content of (b) is too large, the devitrification resistance is liable to be lowered, and the raw material cost is liable to be increased. If ZrO of₂If the content of (b) is too large, the devitrification resistance is liable to be lowered.

In addition to the above components, for example, the following components may be added.

SrO and BaO are components that lower the high-temperature viscosity and improve the meltability and moldability. SrO and BaO are respectively 0-15%, 0.1-12% and especially 0.5-10%.

ZnO is a component that reduces the high-temperature viscosity and significantly improves the meltability. The content of ZnO is preferably 0 to 7%, 0.1 to 5%, particularly 0.5 to 3%. If the content of ZnO is too small, it is difficult to obtain the above effect. When the content of ZnO is too large, the glass is likely to devitrify.

Li₂O、Na₂O and K₂O is a component for lowering the high-temperature viscosity and improving the meltability and moldability, and is a component for increasing the thermal expansion coefficient. In order to increase the thermal expansion coefficient while reducing the high-temperature viscosity and improving the meltability and formability, Li₂O、Na₂O and K₂The total amount of O is preferably 0 to 15%, 0.01 to 10%, 0.05 to 8%, particularly 0.1 to 5%. Li₂O、Na₂O and K₂The content of each O is preferably 0 to 10%, 0.01 to 5%, 0.05 to 4%, particularly 0.1% or more and less than 3%. To reduce the coefficient of thermal expansion, Li₂O、Na₂O and K₂The total content of O is preferably 0-15% and 0-10%0 to 5%, 0 to 1%, 0 to 0.1%, 0 to 0.05%, particularly 0% or more and less than 0.01%. Li₂O、Na₂O and K₂The content of each O is preferably 0 to 15%, 0 to 10%, 0 to 5%, 0 to 1%, 0 to 0.1%, 0 to 0.05%, particularly 0% or more and less than 0.01%.

TiO₂Is a component for improving weather resistance, but is a component for coloring glass. Thus, TiO₂The content of (b) is preferably 0 to 0.5%, particularly 0% or more and less than 0.1%.

0.05-0.5% of SnO selected from the group consisting of SnO can be added as a clarifier₂、Cl、SO₃、CeO₂Preferably SnO₂、SO₃Group(s) of (a).

Fe₂O₃Is a component that is inevitably mixed into the glass raw material as an impurity, and is a coloring component. Thus, Fe₂O₃The content of (B) is preferably 0.5% or less, 0.001 to 0.1%, 0.005 to 0.07%, 0.008 to 0.03%, particularly 0.01 to 0.025%.

V₂O₅、Cr₂O₃、CoO₃And NiO is a coloring component. Thus, V₂O₅、Cr₂O₃、CoO₃And NiO are each preferably contained in an amount of 0.1% or less, particularly less than 0.01%.

From the viewpoint of environment, it is preferable that the glass composition contains substantially no As₂O₃、5b₂O₃、PbO、Bi₂O₃And F. Here, "substantially free of … …" means that: the gist of the case where the indicating component is not positively added as the glass component but is allowed to be mixed as an impurity is specifically that the content of the indicating component is less than 0.05%.

The supporting glass substrate of the present invention preferably has the following characteristics.

The strain point is preferably 580 ℃ or higher, 620 ℃ or higher, 650 ℃ or higher, 680 ℃ or higher, particularly 700 to 850 ℃. The higher the strain point, the more likely the thermal shrinkage of the support glass substrate is reduced in the manufacturing process of the semiconductor package. As a result, the accuracy of the processing is easily improved. The "strain point" refers to a value measured by the method of ASTM C336.

The liquid phase temperature is preferably 1300 ℃ or lower, 1280 ℃ or lower, 1250 ℃ or lower, 1160 ℃ or lower, 1130 ℃ or lower, particularly 1100 ℃ or lower. This facilitates the formation into a plate shape, and therefore, even if the surface is not polished or the polishing is performed in a small amount, the Total Thickness Variation (TTV) can be reduced to less than 2.0 μm, particularly less than 1.0 μm, and as a result, the production cost of the support glass substrate can be reduced. Further, devitrification crystals are easily prevented from being generated at the time of molding. Here, the "liquid phase temperature" can be calculated as follows: the glass powder which passed through a standard sieve of 30 mesh (500 μm) and remained in a sieve of 50 mesh (300 μm) was put into a platinum boat, and then kept in a temperature gradient furnace for 24 hours, and the temperature at which crystals were precipitated was measured, thereby calculating the temperature.

The liquid phase viscosity is preferably 10^3.810 dPas or more^4.010 dPas or more^4.210 dPas or more^4.4dPas or more, especially 10^4.6dPas or more. This facilitates the formation into a plate shape, and therefore, even if the surface is not polished or the polishing is performed in a small amount, the Total Thickness Variation (TTV) can be reduced to less than 2.0 μm, particularly less than 1.0 μm, and as a result, the production cost of the support glass substrate can be reduced. Here, the "liquid phase viscosity" can be measured by the platinum ball pulling method.

10^2.5The temperature at dPa · s is preferably 1550 ℃ or lower, 1500 ℃ or lower, 1480 ℃ or lower, 1450 ℃ or lower, particularly 1200 to 1400 ℃ or lower. If 10^2.5When the temperature at dPa · s is high, the meltability is lowered, and the production cost of the support glass substrate increases. Here, "10^2.5The "temperature at dPa · s" can be measured by the platinum ball pulling method.

The plate thickness is preferably 1.5mm or less, 1.2mm or less, 1.0mm or less, particularly 0.9mm or less. On the other hand, if the thickness is too thin, the strength of the supporting glass substrate itself is reduced, and it is difficult to exert the function as a supporting substrate. Therefore, the thickness of the supporting glass substrate is preferably 0.5mm or more, 0.6mm or more, and particularly more than 0.7 mm.

The warpage amount is preferably 60 μm or less, 55 μm or less, 50 μm or less, 1 to 45 μm, and particularly 5 to 40 μm. The smaller the amount of warpage, the easier it is to improve the precision of the processing. In particular, since the wiring accuracy can be improved, high-density wiring can be realized. In order to reduce the amount of warpage, it is preferable to stack a plurality of glass substrates and perform heat treatment. The "warpage amount" means: the sum of the absolute value of the maximum distance between the highest position and the least square focal plane of the entire support glass substrate and the absolute value of the lowest position and the least square focal plane can be measured by, for example, SBW-331ML/d manufactured by Kobelco scientific research.

The supporting glass substrate of the present invention is preferably in a wafer shape (substantially in a perfect circle shape), the diameter thereof is preferably 100mm or more and 500mm or less, particularly preferably 150mm or more and 450mm or less, and the roundness (excluding the notch portion) thereof is preferably 1mm or less, 0.1mm or less, 0.05mm or less, particularly preferably 0.03mm or less. This facilitates application to the manufacturing process of the semiconductor package. The "roundness" is a value obtained by subtracting a minimum value from a maximum value of the outer shape of the wafer.

The support glass substrate of the present invention preferably has a notch portion (notch-shaped alignment portion), and more preferably, the deep portion of the notch portion is substantially circular or substantially V-groove shaped in plan view. Thus, the positioning member such as a positioning pin is brought into contact with the notch portion of the support glass substrate, and the position of the support glass substrate is easily fixed. As a result, the support glass substrate and the processing substrate are easily aligned. In particular, when the positioning member is brought into contact with the notch portion formed in the processing substrate, the entire laminate can be easily aligned.

On the other hand, when the positioning member is brought into contact with the notch portion of the support glass substrate, stress is likely to concentrate on the notch portion, and the support glass substrate is likely to be damaged from the notch portion as a starting point. In particular, this tendency becomes remarkable when the support glass substrate is bent by an external force. Therefore, it is preferable that all or a part of the end edge region where the surface of the notch portion intersects with the end face is chamfered. This can effectively avoid damage from the notch portion.

Further, it is preferable that 50% or more of the end edge region where the surface of the notch portion intersects with the end face is chamfered, particularly preferably 90% or more of the end edge region where the surface of the notch portion intersects with the end face is chamfered, and most preferably all of the end edge region where the surface of the notch portion intersects with the end face is chamfered. The larger the chamfered region, the lower the probability of breakage starting from the notch.

The chamfer width in the front surface direction (the same applies to the chamfer width in the back surface direction) of the notch is preferably 50 to 900 μm, 200 to 800 μm, 300 to 700 μm, 400 to 650 μm, and particularly 500 to 600 μm. If the chamfer width in the surface direction of the notch portion is too small, the support glass substrate is likely to be damaged from the notch portion as a starting point. On the other hand, if the chamfering width in the surface direction of the notch portion is too large, chamfering efficiency is liable to decrease, and the manufacturing cost of the support glass substrate is liable to increase.

The chamfer width (the sum of the chamfer widths of the front and back surfaces) in the plate thickness direction of the notch portion is preferably 5 to 80%, 20 to 75%, 30 to 70%, 35 to 65%, particularly 40 to 60% of the plate thickness. If the chamfer width in the thickness direction of the notch portion is too small, the support glass substrate is likely to be damaged from the notch portion as a starting point. On the other hand, if the chamfer width in the plate thickness direction of the notch portion is too large, external force tends to concentrate on the end face of the notch portion, and the support glass substrate tends to be damaged from the end face of the notch portion as a starting point.

The supporting glass substrate of the present invention is preferably not subjected to chemical strengthening treatment from the viewpoint of reducing the Total Thickness Variation (TTV). In other words, the surface preferably has no compressive stress layer.

Various methods can be selected as the method of forming the supporting glass substrate. For example, a slit draw down method, a roll out method, a redraw method, a float method, a blank forming method, or the like can be selected.

The laminated substrate of the present invention is a laminated substrate including at least a processing substrate and a support glass substrate for supporting the processing substrate, wherein the support glass substrate is the support glass substrate. Here, the technical features (preferable configuration and effect) of the laminated substrate of the present invention overlap with those of the supporting glass substrate of the present invention. Therefore, in the present specification, detailed description of the overlapping portions is omitted.

The laminated substrate of the present invention preferably has an adhesive layer between the processing substrate and the support glass substrate. The adhesive layer is preferably a resin, and is preferably a thermosetting resin, a photocurable resin (particularly an ultraviolet-curable resin), or the like, for example. In addition, it is preferable to have heat resistance that can withstand heat treatment in the manufacturing process of the semiconductor package. Thus, the adhesive layer is less likely to melt in the manufacturing process of the semiconductor package, and the precision of the processing can be improved.

The laminated substrate of the present invention preferably further includes a peeling layer between the processing substrate and the supporting glass substrate, more specifically, between the processing substrate and the adhesive layer, or a peeling layer between the supporting glass substrate and the adhesive layer. Thus, the processing substrate can be easily peeled from the support glass substrate after a predetermined processing is performed on the processing substrate. In view of productivity, it is preferable that the processing substrate is peeled off by irradiation with light such as laser beam.

The release layer is made of a material that causes "intra-layer peeling" or "interfacial peeling" by irradiation with light such as laser light. In other words, it is composed of: when light of a certain intensity is irradiated, bonding force between atoms or molecules in the atoms or molecules disappears or decreases, ablation (ablation) or the like occurs, and peeling occurs. Note that, there are cases where: the case where a component contained in the peeling layer is released as a gas by irradiation with irradiation light and the case where the peeling layer absorbs light to become a gas and the vapor is released to be separated.

In the laminated substrate of the present invention, the supporting glass substrate is preferably larger than the processing substrate. Thus, even when the center positions of the processing substrate and the support glass substrate are slightly shifted when the processing substrate and the support glass substrate are supported, the edge portion of the processing substrate is less likely to be exposed from the support glass substrate.

The method for manufacturing a semiconductor package according to the present invention includes: preparing a laminated substrate including at least a processing substrate and a support glass substrate for supporting the processing substrate; and a step of processing the processing substrate, wherein the support glass substrate is the support glass substrate. Here, the technical features (suitable configuration and effect) of the method for manufacturing a semiconductor package of the present invention overlap with the technical features of the supporting glass substrate and the laminated substrate of the present invention. Therefore, in the present specification, detailed description of the overlapping portions is omitted.

The method for manufacturing a semiconductor package of the present invention includes: preparing a laminated substrate including at least a processing substrate and a support glass substrate for supporting the processing substrate. The laminated substrate including at least a processing substrate and a support glass substrate for supporting the processing substrate is composed of the above-described material. As a method for forming the glass substrate, the above-described forming method can be selected.

The method for manufacturing a semiconductor package according to the present invention preferably further includes a step of transporting the laminated substrate. This can improve the processing efficiency of the processing. The "step of conveying the laminated substrate" and the "step of processing the processed substrate" are not necessarily performed separately, and may be performed simultaneously.

In the method for manufacturing a semiconductor package according to the present invention, the processing treatment is preferably a treatment of wiring one surface of the processing substrate or a treatment of forming a solder bump on one surface of the processing substrate. In the method for manufacturing a semiconductor package according to the present invention, the processing substrate is less likely to undergo dimensional change during these processes, and therefore these processes can be performed appropriately.

As the processing treatment, in addition to the above-described treatment, any one of a treatment of mechanically polishing one surface of the processing substrate (usually, the surface on the opposite side to the supporting glass substrate), a treatment of dry-etching one surface of the processing substrate (usually, the surface on the opposite side to the supporting glass substrate), and a treatment of wet-etching one surface of the processing substrate (usually, the surface on the opposite side to the supporting glass substrate) may be used. In the method for manufacturing a semiconductor package according to the present invention, the processed substrate is less likely to warp, and the rigidity of the laminated substrate can be maintained. As a result, the above-described processing can be appropriately performed.

The present invention will be further described with reference to the accompanying drawings.

Fig. 1 is a schematic perspective view showing an example of a laminated substrate 1 of the present invention. In fig. 1, a laminated substrate 1 includes a support glass substrate 10 and a processing substrate 11. In order to prevent the dimensional change of the processing substrate 11, the support glass substrate 10 is bonded to the processing substrate 11. And the average linear thermal expansion coefficient of the supporting glass substrate 10 in the temperature range of 30-380 ℃ is 32 x 10^-7over/DEG C and 55X 10^-7The Young's modulus is 80GPa or more at a temperature of less than/° C. Further, a release layer 12 and an adhesive layer 13 are disposed between the support glass substrate 10 and the processing substrate 11. The release layer 12 is in contact with the support glass substrate 10, and the adhesive layer 13 is in contact with the processing substrate 11.

As can be seen from fig. 1: the laminated substrate 1 is formed by laminating a support glass substrate 10, a release layer 12, an adhesive layer 13, and a processing substrate 11 in this order. The shape of the support glass substrate 10 is determined according to the processing substrate 11, and in fig. 1, the support glass substrate 10 and the processing substrate 11 are both in the shape of a wafer. In addition to amorphous silicon (a-Si), silicon oxide, a silicic acid compound, silicon nitride, aluminum nitride, titanium nitride, or the like is used for the peeling layer 12. The peeling layer 12 is formed by plasma CVD, spin coating by a sol-gel method, or the like. The adhesive layer 13 is made of a resin, and is formed by applying, for example, various printing methods, an ink-jet method, a spin coating method, a roll coating method, or the like. After the support glass substrate 10 is peeled from the processing substrate 11 by the peeling layer 12, the adhesive layer 13 is dissolved and removed by a solvent or the like.

Fig. 2 is a schematic cross-sectional view showing a chip-first manufacturing process of a fan out WLP. Fig. 2(a) shows a state in which an adhesive layer 21 is formed on one surface of the support member 20. If necessary, a release layer may be formed between the support member 20 and the adhesive layer 21. Next, as shown in fig. 2(b), a plurality of semiconductor chips 22 are attached to the adhesive layer 21. At this time, the active surface of the semiconductor chip 22 is brought into contact with the adhesive layer 21. Next, as shown in fig. 2(c), the semiconductor chip 22 is molded with a resin sealing material 23. The sealing material 23 is a material that undergoes little dimensional change after compression molding or dimensional change when wiring is molded. Next, as shown in fig. 2(d) and (e), the processing substrate 24 on which the semiconductor chip 22 is molded is separated from the support member 20, and then is fixed to the support glass substrate 26 via the adhesive layer 25. At this time, of the surfaces of the processing substrate 24, the surface opposite to the surface where the semiconductor chip 22 is embedded is disposed on the supporting glass substrate 26 side. This can obtain a laminated substrate 27. If necessary, a release layer may be formed between the adhesive layer 25 and the support glass substrate 26. After the obtained laminated substrate 27 is conveyed, as shown in fig. 2(f), the wiring 28 is formed on the surface of the processing substrate 24 on the side where the semiconductor chip 22 is embedded, and then a plurality of solder bumps 29 are formed. Finally, after separating the processing substrate 24 from the supporting glass substrate 26, the processing substrate 24 is cut into the individual semiconductor chips 22. And is subjected to a subsequent packaging process (fig. 2 (g)).

Fig. 3 is a schematic cross-sectional view showing a step of thinning a processed substrate by using a supporting glass substrate as a back-grinding substrate. Fig. 3(a) shows a laminated substrate 30. The laminated substrate 30 is formed by laminating a support glass substrate 31, a release layer 32, an adhesive layer 33, and a processing substrate (silicon wafer) 34 in this order. A plurality of semiconductor chips 35 are formed on the surface of the processing substrate on the side in contact with the adhesive layer 33 by photolithography or the like. Fig. 3(b) shows a step of thinning the processing substrate 34 by the polishing apparatus 36. In this step, the processing substrate 34 is mechanically polished to be, for example, a thickness of several tens of μm. Fig. 3(c) shows a step of irradiating the peeling layer 32 with ultraviolet light 37 through the support glass substrate 31. Through this step, the support glass substrate 31 can be separated as shown in fig. 3 (d). The separated support glass substrate 31 can be reused as needed. Fig. 3(e) shows a step of removing the adhesive layer 33 from the processing substrate 34. Through this step, a thin processed substrate 34 can be obtained.