阅读说明：本技术 静电放电保护半导体器件 (Static discharge protective semiconductor device ) 是由 黄正植 于 2019-01-29 设计创作，主要内容包括：提供了一种静电放电保护半导体器件,所述静电放电保护半导体器件包括：P型基底；N型阱,在P型基底中邻近于第一浅沟槽隔离件(STI)；第一N型掺杂区,在N型阱中邻近于第一STI；第二N型掺杂区,位于N型阱与P型基底之间的边界处；第一P型掺杂区,在N型阱中位于第一N型掺杂区与第二N型掺杂区之间；第二P型掺杂区,在P型基底中邻近于与第一STI分隔开的第二STI；第三N型掺杂区,位于第二N型掺杂区与第二P型掺杂区之间；以及栅电极,位于第二N型掺杂区与第三N型掺杂区之间的P型基底上。(A kind of static discharge protective semiconductor device is provided, the static discharge protective semiconductor device includes: P-type substrate；N-type trap, adjacent to the first shallow trench isolation part (STI) in P-type substrate；First N-doped zone, adjacent to the first STI in N-type trap；Second N-doped zone, the boundary between N-type trap and P-type substrate；First P-doped zone, in N-type trap between the first N-doped zone and the second N-doped zone；Second P-doped zone, adjacent to the 2nd STI separated with the first STI in P-type substrate；Third N-doped zone, between the second N-doped zone and the second P-doped zone；And gate electrode, on the P-type substrate between the second N-doped zone and third N-doped zone.)

1. a kind of semiconductor devices, the semiconductor devices include:

P-type substrate；

N-type trap, adjacent to the first shallow trench isolation part in P-type substrate；

First N-doped zone, adjacent to the first shallow trench isolation part in N-type trap；

Second N-doped zone, the boundary between N-type trap and P-type substrate；

First P-doped zone, in N-type trap between the first N-doped zone and the second N-doped zone；

Second P-doped zone, adjacent to the second shallow trench isolation separated with the first shallow trench isolation part in P-type substrate Part；

Third N-doped zone, between the second N-doped zone and the second P-doped zone；And

Gate electrode, on the P-type substrate between the second N-doped zone and third N-doped zone.

2. semiconductor devices as described in claim 1, in which:

There is no shallow trench isolation part between the first N-doped zone and the first P-doped zone,

There is no shallow trench isolation part between the first P-doped zone and the second N-doped zone, and

There is no shallow trench isolation part between third N-doped zone and the second P-doped zone.

3. semiconductor devices as described in claim 1, in which:

There is no shallow trench isolation part between the first P-doped zone and the second N-doped zone, and

First P-doped zone and the second N-doped zone form polysilicon knot circle diode.

4. semiconductor devices as described in claim 1, the semiconductor devices further include:

First dummy gate electrode, in the N-type trap between the first N-doped zone and the first P-doped zone；

Second dummy gate electrode, in the N-type trap between the first P-doped zone and the second N-doped zone；And

Third dummy gate electrode, on the P-type substrate between third N-doped zone and the second P-doped zone.

5. semiconductor devices as claimed in claim 4, wherein the first N-doped zone, the first P-doped zone, the first illusory grid Electrode and the second dummy gate electrode are connected to the anode of semiconductor devices.

6. semiconductor devices as claimed in claim 4, wherein third N-doped zone, the second P-doped zone, the illusory grid of third Electrode is connected to the cathode of semiconductor devices.

7. semiconductor devices as described in claim 1, wherein gate electrode is connected to the second N-doped zone.

8. semiconductor devices as described in claim 1, wherein the first P-doped zone, N-type trap, P-type substrate are respectively formed Emitter, base stage and the collector of one bipolar junction transistor.

9. semiconductor devices as described in claim 1, wherein N-type trap, P-type substrate and third N-doped zone are respectively formed Collector, base stage and the emitter of two bipolar junction transistors.

10. a kind of semiconductor devices, the semiconductor devices include:

First bipolar junction transistor；

Second bipolar junction transistor, have the base stage that is connect with the collector of the first bipolar junction transistor and with it is first bipolar The collector of the base stage connection of junction transistor；And

Metal oxide semiconductor transistor, there is the grid that connect with the base stage of the first bipolar junction transistor and drain and The source electrode being connect with the emitter of the second bipolar junction transistor.

11. semiconductor devices as claimed in claim 10, the semiconductor devices further includes being located at the first bipolar junction transistor Polysilicon knot circle diode between the emitter and base stage of pipe.

12. semiconductor devices as claimed in claim 10, in which:

The emitter of first bipolar junction transistor is connected to the anode of semiconductor devices, and

The emitter of second bipolar junction transistor is connected to the cathode of semiconductor devices.

13. semiconductor devices as claimed in claim 12, in which:

Semiconductor devices is connected to the input/output terminal for data input/output and is protected against the electricity of static discharge Between road, and

Input/output terminal and the circuit connection of static discharge is protected against to anode.

14. a kind of semiconductor devices, the semiconductor devices include:

First ESD protection circuit, have the anode that is connect with the input/output terminal for data input/output and with The cathode of second voltage terminal connection；

Second ESD protection circuit has the anode connecting with first voltage terminal and the yin connecting with second voltage terminal Pole；And

Be protected against the circuit of static discharge, be located at the first ESD protection circuit and the second ESD protection circuit it Between, in which:

First ESD protection circuit includes the first MOS transistor, and first MOS transistor has The grid and drain electrode that are connect with input/output terminal and the source electrode being connect with second voltage terminal, and

Second ESD protection circuit includes the second MOS transistor, and second MOS transistor has The grid and drain electrode that are connect with first voltage terminal and the source electrode being connect with second voltage terminal.

15. semiconductor devices as claimed in claim 14, wherein the first ESD protection circuit further include:

First bipolar junction transistor；And

Second bipolar junction transistor, have the base stage that is connect with the collector of the first bipolar junction transistor and with it is first bipolar The collector of the base stage connection of junction transistor.

16. semiconductor devices as claimed in claim 15, wherein the first ESD protection circuit further includes being located at first pair The first polysilicon knot circle diode between the emitter and base stage of pole junction transistor.

17. semiconductor devices as claimed in claim 16, in which:

The emitter of first bipolar junction transistor is connected to input/output terminal, and

The emitter of second bipolar junction transistor is connected to second voltage terminal.

18. semiconductor devices as claimed in claim 14, wherein the second ESD protection circuit further include:

Third bipolar junction transistor；And

4th bipolar junction transistor has the base stage that connect with the collector of third bipolar junction transistor and bipolar with third The collector of the base stage connection of junction transistor.

19. semiconductor devices as claimed in claim 18, wherein the second ESD protection circuit further includes being located at third pair The second polysilicon knot circle diode between the emitter and base stage of pole junction transistor.

20. semiconductor devices as claimed in claim 19, in which:

The emitter of third bipolar junction transistor is connected to first voltage terminal, and

The emitter of 4th bipolar junction transistor is connected to second voltage terminal.

Technical field

Background technique

Static discharge (ESD) can damage integrated circuit (IC) device.For example, the test phase of IC device in a manufacturing process Between, during assembling IC device or even using during being equipped with the device of IC device, IC device can be quiet due to accumulation Charge and damage.

Summary of the invention

Detailed description of the invention

Example embodiment is described in detail by referring to accompanying drawing, feature will be apparent to those skilled in the art, In the accompanying drawings:

Fig. 1 shows the circuit diagram of semiconductor devices according to example embodiment；

Fig. 2 shows the cross-sectional views of semiconductor devices according to example embodiment；

Fig. 3 shows the layout of semiconductor devices according to example embodiment；

Fig. 4 and Fig. 5 shows the circuit diagram of the operation of the semiconductor devices for explanation figure 1；

Fig. 6 shows the figure for explaining semiconductor devices according to example embodiment；

Fig. 7 shows the circuit diagram of semiconductor devices according to example embodiment；And

Fig. 8 and Fig. 9 shows the circuit diagram of the operation of the semiconductor devices for explanation figure 7.

Embodiment is related to static discharge (ESD) protection semiconductor devices.