阅读说明：本技术 具有可拆卸电容器连接结构的存储装置 (Memory device with detachable capacitor connecting structure ) 是由 陈晓方 乔丹洋 文伟·王 于 2020-09-08 设计创作，主要内容包括：本公开提供一种用于存储装置的可拆卸电容器连接结构。在实施例中,连接元件将包括一个或多个电容器的电容器模块可拆卸地连接到电路板,使得电容器模块堆叠在电路板上。连接元件包括：第一连接器,包括两个插针,安装在电容器模块的底平面上；以及第二连接器,包括两个插座,安装在与电容器模块的底部相对应的电路板的顶平面上,适于将第一连接器连接到电路板。(The present disclosure provides a detachable capacitor connection structure for a memory device. In an embodiment, the connecting element detachably connects a capacitor module comprising one or more capacitors to the circuit board such that the capacitor module is stacked on the circuit board. The connecting element comprises: a first connector including two pins mounted on a bottom plane of the capacitor module; and a second connector including two sockets mounted on a top plane of the circuit board corresponding to the bottom of the capacitor module, adapted to connect the first connector to the circuit board.)

1. A memory device, comprising:

a circuit board;

a capacitor module comprising one or more capacitors; and

a connection member detachably connecting the capacitor module to the circuit board such that the capacitor module is stacked on the circuit board,

wherein the connecting element comprises:

a first connector including two pins mounted on a bottom plane of the capacitor module; and

a second connector including two sockets mounted on a top plane of the circuit board corresponding to a bottom of the capacitor module, connecting the first connector to the circuit board.

2. The storage device of claim 1, wherein the first connector comprises two male pins mounted on a left side and a right side of a bottom plane of the capacitor module.

3. The storage device of claim 2, wherein the second connector comprises two female sockets mounted on left and right sides of a top plane of the circuit board corresponding to left and right sides of a bottom plane of the capacitor module, respectively.

4. The storage device of claim 3, wherein the first connector has a notch portion and the second connector has a protruding portion that is inserted into the notch portion.

5. The storage device of claim 1, wherein the capacitor is mounted on at least one of a top plane and a bottom plane of the capacitor module.

6. The memory device of claim 5, wherein the capacitor comprises a polymer tantalum solid capacitor.

7. A memory device, comprising:

a circuit board;

a capacitor module comprising one or more capacitors; and

a connection member detachably connecting the capacitor module to the circuit board,

wherein the connecting element comprises:

a finger disposed on at least one edge of the capacitor module; and

a connector mounted on a portion of the circuit board that is accessible to an edge of the capacitor module and connecting the finger to the circuit board.

8. The storage device of claim 7, wherein the connector comprises a female socket comprising a housing with one or more recesses connecting the fingers with one or more pins mounted on the portion of the circuit board.

9. The storage device of claim 7, wherein the capacitor module comprises at least one notch formed on a portion of an edge between two of the fingers.

10. The storage device of claim 7, wherein the fingers comprise gold fingers.

11. The storage device of claim 7, wherein the capacitor is mounted on a top plane of the capacitor module.

12. The memory device of claim 11, wherein the capacitor comprises a polymer tantalum solid capacitor.

13. A memory device, comprising:

a circuit board including two through holes;

a capacitor comprising two pins; and

a connection member detachably connecting the capacitor to the circuit board,

wherein the connecting element comprises:

a plug including two right-angle pins connected to the two through holes, respectively; and

a socket connected to the plug such that the two pins of the capacitor are guided to be connected to the two through holes, respectively.

14. The storage device of claim 13, wherein the plug comprises the two right angle pins and a housing with a sleeve and two through holes into which the two right angle pins are inserted.

15. The storage device of claim 14, wherein the socket includes two holes connected to the two right angle pins and a crimp structure locked to the sleeve.

16. The storage device of claim 13, wherein the capacitor comprises an aluminum electrolytic capacitor.

Technical Field

Embodiments of the present disclosure relate to schemes for connecting capacitors to memory devices.

Background

Computer environment paradigms have turned into pervasive computing systems that can be used anytime and anywhere. Therefore, the use of portable electronic devices such as mobile phones, digital cameras, and notebook computers has been rapidly increasing. These portable electronic devices typically use a memory system having memory device(s), i.e., data storage device(s). The data storage device is used as a primary memory device or a secondary memory device of the portable electronic device.

The data storage device includes a power supply. The power supply may be implemented using one or more capacitors.

Disclosure of Invention

Aspects of the present invention include a memory device having a detachable capacitor connection structure.

In one aspect, a memory device includes: a circuit board; a capacitor module comprising one or more capacitors; and a connection member for detachably connecting the capacitor module to the circuit board such that the capacitor module is stacked on the circuit board. The connecting element comprises: a first connector including two pins mounted on a bottom plane of the capacitor module; and a second connector including two sockets mounted on a top plane of the circuit board corresponding to the bottom of the capacitor module, adapted to connect the first connector to the circuit board.

In another aspect, a memory device includes: a circuit board; a capacitor module comprising one or more capacitors; and a connection member for detachably connecting the capacitor module to the circuit board. The connecting element comprises: a finger disposed on at least one edge of the capacitor module; and a connector mounted on a portion of the circuit board proximate to an edge of the capacitor module and adapted to connect the finger to the circuit board.

In yet another aspect, a memory device includes: a circuit board including two through holes; a capacitor comprising two pins; and a connection member for detachably connecting the capacitor to the circuit board. The connecting element comprises: a plug including two right-angle pins connected to the two through holes, respectively; and a socket connected to the plug such that the two pins of the capacitor are guided to be connected to the two through holes, respectively.

Other aspects of the invention will become apparent from the following description.

Drawings

FIG. 1 is a block diagram illustrating an example of a data processing system.

Fig. 2 is a diagram illustrating an example of a power supply of the storage device.

Fig. 3A and 3B illustrate a connection structure between one or more capacitors in a storage device and a circuit board according to an embodiment of the present invention.

Fig. 4A to 9C are diagrams illustrating a memory device having a detachable capacitor connection structure according to an embodiment of the present invention.

Detailed Description

Various embodiments are described in more detail below with reference to the figures. This invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Moreover, references herein to "an embodiment," "another embodiment," etc., do not necessarily refer to only one embodiment, and different references to any such phrases are not necessarily referring to the same embodiment(s). Throughout this disclosure, like reference numerals refer to like parts in the figures and embodiments of the present invention.

The invention can be implemented in numerous ways, including as a process, an apparatus, a system, a computer program product embodied on a computer readable storage medium, and/or a processor, such as a processor adapted to execute instructions stored on and/or provided by a memory coupled to the processor. In this specification, these embodiments, or any other form that the invention may take, may be referred to as techniques. In general, the order of the steps of disclosed processes may be altered within the scope of the invention. Unless otherwise specified, a component such as a processor or a memory described as being suitable for performing a task may be implemented as a general component that is temporarily configured to perform the task at a given time or as a specific component that is manufactured to perform the task. As used herein, the term "processor" or the like refers to one or more devices, circuits, and/or processing cores adapted for processing data, such as computer program instructions.

The following provides a detailed description of embodiments of the invention and accompanying drawings that illustrate aspects of the invention. The invention is described in connection with such embodiments, but the invention is not limited to any embodiment. The scope of the invention is limited only by the claims. The invention is intended to cover alternatives, modifications and equivalents, which may be included within the scope of the claims. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. These details are provided for the purpose of example; the present invention may be practiced according to the claims without some or all of these specific details. For the purpose of clarity, technical material that is known in the technical fields related to the invention has not been described in detail so that the invention is not unnecessarily obscured.

FIG. 1 is a block diagram illustrating an example of a data processing system 10.

Referring to fig. 1, a data processing system 10 may include a host device 50 and a storage device (or memory system) 100. The storage device 100 may receive a request from the host device 50 and operate in response to the received request. For example, the storage device 100 may store data to be accessed by the host device 50.

The host device 50 may be implemented using any of a variety of electronic devices. In various embodiments, host device 50 may comprise an electronic device such as a desktop computer, workstation, three-dimensional (3D) television, smart television, digital audio recorder, digital audio player, digital picture recorder, digital picture player, and/or digital video recorder, and digital video player. In various embodiments, host device 50 may comprise a portable electronic device such as: mobile phones, smart phones, electronic books, MP3 players, Portable Multimedia Players (PMPs), and/or portable game machines.

Memory device 100 may include a controller 110, a memory device 120, and a power supply 130. The controller 110 may exchange signals SGL with the host device 50 through the signal connector SC. Signal SGL may include commands, addresses, and data. The signal connector SC may be configured as any of various types of connectors according to an interface scheme between the host device 50 and the storage device 100.

The controller 110 may control the overall operation of the memory device 120 in response to a signal SGL from the host device 50. For example, the controller 110 may control the memory device 120 to perform one or more erase operations, program operations, and read operations.

Memory device 120 may be coupled to controller 110 by one or more channels. Memory device 120 may be implemented with multiple non-volatile memory devices. The controller 110 and the memory device 120 may be implemented using any of various storage devices such as a Solid State Drive (SSD) and a memory card.

The power supply 130 may supply power PWR input from the host device 50 through the power connector PC to the inside of the storage device 100.

Fig. 2 is a diagram illustrating an example of the power supply 130 of the storage apparatus 100.

Referring to fig. 2, the power supply 130 may include a plurality of capacitors C1 to Cn, a boost regulator RU, and a buck regulator RD. Although not shown in fig. 1, the storage device 100 may further include a power switch 130 and a power controller 150 coupled to the power supply 130.

The power switch 130 may provide a normal power transfer path or a Power Loss Protection (PLP) transfer path under the control of the power controller 150. In the normal power transfer path, the power supplied from the host device 50 is transferred through the normal power transfer path including the power switch 140, the power controller 150, the boost regulator RU, and the plurality of capacitors C1 to Cn. The boost regulator RU may convert a low input voltage from the main device 50 into a high voltage (e.g., 35V or higher) through the power switch 140 and the power controller 150. The high voltage may be used to charge the plurality of capacitors C1-Cn.

When the storage device 100 loses input power from the host device 50, the plurality of capacitors C1 through Cn may be discharged, and energy stored in the plurality of capacitors C1 through Cn may be transferred through a PLP transfer path including the step-down regulator RD, the power switch 140, the power controller 150, and the internal power regulator. The memory device 100 may use a plurality of capacitors (i.e., PLP capacitors) as a power supply to back up all necessary data from an internal memory (e.g., volatile memory) of the controller 110 to the memory device 120 (e.g., NAND flash memory device).

In this way, the plurality of capacitors C1-Cn may form a capacitor array to provide sufficient energy to maintain the power supply rail voltage for data backup transfers from the controller 110 to the memory device. A capacitor array or a bulk capacitor may be used as a Power Loss Protection (PLP) capacitor of the memory device 100. Typically, the capacitor array or bulk capacitors may be fixedly connected (e.g., by direct soldering) to a Printed Circuit Board (PCB) of the memory device 100. This type of connection presents challenges to test and repair work in mass production and return authorization (RMA) operations. In other words, solder reflow and manual rework may be required to remove and replace the failed capacitor. Accordingly, it is desirable to provide a connection structure for connecting one or more capacitors to a circuit board of a storage device and easily replacing a capacitor that has failed in the storage device.

Fig. 3A and 3B illustrate a connection structure between one or more capacitors and a circuit board according to an embodiment of the present invention.

Referring to fig. 3A, the capacitor 320 may be detachably connected to the circuit board 310 of the memory device 100 through a connection member 330. In some embodiments, the capacitor 320 may be implemented with a via PLP capacitor (e.g., an aluminum electrolytic capacitor), and the connection element 330 may include a connection structure as shown in fig. 4A to 7.

Referring to fig. 3B, the capacitor module 340 may be detachably connected to the circuit board 310 by a connection member 350. In some embodiments, the capacitor module 340 may be implemented with a surface mount PLP capacitor array (e.g., a polymer tantalum solid capacitor), and the connection element 330 may include a connection structure as shown in fig. 8A-9B.

Fig. 4A and 4B are diagrams illustrating a memory device 100 having a detachable capacitor connection structure according to an embodiment of the present invention.

Referring to fig. 4A, the memory device 100 may include a circuit board 310 and a capacitor 320 as shown in fig. 3A. Capacitor 320 may include two pins (+) (-). In some embodiments, capacitor 320 may be implemented using an aluminum electrolytic capacitor.

The connection element 330 may be implemented using a dual in-line package (DIP) socket as shown in fig. 4B. As shown in fig. 4B, the DIP socket may have a rectangular housing 410 with two through holes (shown at the top of the housing 410 in fig. 4B) and two parallel pins 420, the two parallel pins 420 extending into the two through holes of the housing 410. The parallel pins 420 may then be mounted on the circuit board 310. In an embodiment, the parallel pins 420 may be inserted into two through holes of the circuit board 310, respectively, to mount the capacitor 320 to the circuit board 310.

In case that the two pins (+) (-) of the capacitor 320 are inserted into the two through holes of the DIP socket, the DIP socket may detachably connect the two pins (+) (-) of the capacitor 320 to the circuit board 310, respectively. In the illustrated example of fig. 4A and 4B, the DIP socket is vertically mounted on the circuit board 310, and the capacitor 320 is horizontally arranged to the circuit board 310. Thus, the two pins (+) (-) of the capacitor 320 can be bent by about 90 degrees and inserted into the two through holes of the DIP socket.

Fig. 5A and 5B are diagrams illustrating a memory device 100 having a detachable capacitor connection structure according to an embodiment of the present invention.

Referring to fig. 5A, the memory device 100 may include a circuit board 310 and a capacitor 320 as shown in fig. 3A. Capacitor 320 may include two pins (+) (-). In some embodiments, capacitor 320 may be implemented using an aluminum electrolytic capacitor.

The connection element 330 may be implemented using a right angle socket as shown in fig. 5B. The right angle socket may have a rectangular housing 510 with two through holes and two parallel right angle pins 520. The vertical portions of the right-angle pins 520 are held in the two through holes of the housing 510, and the bent portions of the right-angle pins 520 protrude from the two through holes. The protruding portions of the parallel right-angle pins 520 may be mounted on the circuit board 310. In an embodiment, the parallel right-angle pins 520 may be mounted into two through holes of the circuit board 310, respectively.

In the case where the two pins (+) (-) of the capacitor 320 are inserted into the two through holes of the right angle socket, the right angle socket may detachably connect the two pins (+) (-) of the capacitor 320 to the two through holes of the circuit board 310, respectively. In the illustrated example of fig. 5A and 5B, the parallel right-angle pins 520 are vertically mounted to the circuit board 310, and the rectangular housing 510 and the capacitor 320 are horizontally arranged to the circuit board 310. Thus, in contrast to the example of fig. 4A and 4B, the two pins (+) (-) of the capacitor 320 can be inserted into the two through holes of the right angle receptacle without bending.

Fig. 6A to 6C are diagrams illustrating a memory device 100 having a detachable capacitor connection structure according to an embodiment of the present invention.

Referring to fig. 6A, the memory device 100 may include a circuit board 310 and a capacitor 320 as shown in fig. 3A. Capacitor 320 may include two pins (+) (-). In some embodiments, capacitor 320 may be implemented using an aluminum electrolytic capacitor.

The connecting element 330 may include a plug 330A and a receptacle 330B as shown in fig. 6B. The plug 330A may include a housing 610 and two parallel right angle pins 620. The housing 610 may include two through holes into which the two parallel right-angle pins 620 are inserted. The parallel right angle pins 620 may be mounted on the circuit board 310. In an embodiment, the parallel right-angle pins 620 may be mounted into two through holes of the circuit board 310, respectively.

The plug 330A and the receptacle 330B may have a connection structure by which the plug 330A and the receptacle 330B are interlocked with each other. With this configuration, the housing 610 of the plug 330A may include a sleeve S. The sleeve S may be formed in a direction perpendicular to the main body of the housing 610. The receptacle 330B may include a housing 630 with two through holes H1, H2 and crimp structures C1, C2. Two through holes H1, H2 may be formed in the center of the case 630 in the set direction. The crimp structures C1, C2 may protrude from the top of the housing 630 such that an opening is formed between the crimp structures C1 and C2. In other words, the plug 330A may be a locking plug and the receptacle 330B may be implemented with a crimp housing. When the plug 330A is mounted or interlocked to the receptacle 330B, the sleeve S of the plug 330A may be inserted through the opening between the crimp structures C1 and C2 of the receptacle 330B. In this manner, the crimp structures C1, C2 may guide proper installation between the plug 330A and the receptacle 330B. The interlocking structure may prevent erroneous installation between the plug 330A and the receptacle 330B. Details of the connection or mating between the plug 330A and the receptacle 330B are shown in fig. 6C. As shown in fig. 6C, the right angle pins 620 of the plug 330A may be connected to the pins of the capacitor through the pins SP of the receptacle 330B.

After the plug 330A and the socket 330B are interlocked with each other, the connecting member 330 may detachably connect the two pins (+) (-) of the capacitor 320 to the circuit board 310, respectively, in a state where the two pins (+) (-) of the capacitor 320 are inserted into the two through holes of the socket 330B. In the illustrated example of fig. 6, the parallel right-angle pins 620 are vertically mounted to the circuit board 310, while the header 330A, the receptacle 330B, and the capacitor 320 are horizontally arranged to the circuit board 310. Thus, in contrast to the example of fig. 4A and 4B, the two pins (+) (-) of the capacitor 320 can be inserted into the two through holes of the socket 330B without bending.

Fig. 7 illustrates a detachable capacitor connection structure in the memory device 100 having a plurality of capacitors 320 according to an embodiment of the present invention.

Referring to fig. 7, a plurality of capacitors 320 forming an array may be respectively connected to a circuit board 310 through a plurality of connection elements 330. In some embodiments, each of the connection elements 330 may have the same connection structure as shown in fig. 4A through 6B.

Fig. 8A to 8C are diagrams illustrating a memory device 100 having a detachable capacitor connection structure according to an embodiment of the present invention.

Referring to fig. 8A, the memory device 100 may include a circuit board 310 and a capacitor module 340 as shown in fig. 3B. Circuit board 310 may include one or more Integrated Chips (ICs). The capacitor module 340 may include one or more capacitors CAP in the array. In some embodiments, the capacitors CAP may be mounted on a top plane (or surface) of the capacitor module 340, and each capacitor may be implemented with a polymer tantalum solid capacitor.

The connector 810 and the fingers 820 as the connection element 350 may detachably connect the capacitor module 340 to the circuit board 310. The fingers 820 may be disposed on at least one edge of the capacitor module 340. In some embodiments, fingers 820 may be implemented with gold fingers. The connector 810 may be mounted on a portion of the circuit board 310 that may be close to the edge of the capacitor module 340. The fingers 820 may be inserted into the connector 810 of the circuit board 310.

The connector 810 may be implemented using a female receptacle as shown in fig. 8B. The female receptacle may include a housing 812 and one or more pins 814. The housing 812 may include one or more recessed holes to mount the pins 814. The pin 814 may be mounted on the portion of the circuit board 310. When the fingers 820 are inserted into the recessed holes of the housing 812, the connector 810 may connect the capacitor CAP to the portion of the circuit board 310 via the fingers 820 and the pins 814.

Referring to fig. 8C, the capacitor module 340 may further include a notch (or key) 830. The notch 830 may be formed on a portion of the edge of the capacitor module 340 forming the finger 820. This portion of the edge may be located between two of the fingers 820 as shown in fig. 8B. The notches 830 may prevent mis-installation between the fingers 820 and the connector 810. In some embodiments, the size of the capacitor module 340 as an add-on card module may be optimized to increase the insertion force against gravity.

Fig. 9A to 9C are diagrams illustrating a memory device 100 having a detachable capacitor connection structure according to an embodiment of the present invention.

Referring to fig. 9A, the memory device 100 may include a circuit board 310 and a capacitor module 340 as shown in fig. 3B. Circuit board 310 may include one or more Integrated Chips (ICs). The capacitor module 340 may include one or more capacitors CAP in the array. In some embodiments, the capacitors CAP may be mounted on the top plane (or surface) and/or the bottom plane of the capacitor module 340, and each capacitor may be implemented with a polymer tantalum solid capacitor. In the illustrated example, the capacitors CAP are mounted on the top and bottom planes of the capacitor module 340.

The connection element 350 may detachably connect the capacitor module 340 to the circuit board 310 such that the capacitor module 340 is stacked on the circuit board 310. The connecting element 350 may include two pins 920A, 920B as a first connector and two sockets 910A, 910B as a second connector.

The two pins 920A, 920B may be mounted on a bottom plane (or surface) of the capacitor module 340. As shown in fig. 9A, two pins 920A, 920B may be mounted on the left and right sides of the bottom plane of the capacitor module 340, respectively. In some embodiments, pins 920A, 920B may be implemented with male pins as shown in FIG. 9B.

The two sockets 910A, 910B may be mounted on a top plane of the circuit board 310 corresponding to a bottom plane of the capacitor module 340 such that the two pins 920A, 920B are connected to the circuit board 310. In some embodiments, as shown in FIG. 9B, the two receptacles 910A, 910B may be implemented using female receptacles and the two pins 920A, 920B may be implemented using male plugs. The two sockets 910A, 910B may be mounted on the left and right sides of the top plane of the circuit board 310, respectively, which correspond to the left and right sides of the bottom plane of the capacitor module 340. Each receptacle 910A, 910B may include a housing with a plurality of connection pins SP 1. Each pin 920A, 920B may include a housing with a plurality of connector pins SP 2. In some embodiments, as shown in FIG. 9B, the two receptacles 910A, 910B and the two pins 920A, 920B have an asymmetrical configuration to prevent mis-installation. In some embodiments, each of the two pins 920A, 920B has a notched portion N and each of the two sockets 910A, 910B has a protruding portion P. The protrusion portion P and the notch portion N may be formed at the setting portion. For example, the protrusion portion P may be formed at a central portion in one side of the housing of each of the sockets 910A, 910B. A notch portion N may be formed at a central portion in one side of the housing of each pin 920A, 920B. When each pin 920A, 920B is inserted into each socket 910A, 910B, the protruding portion P may be inserted into the recess portion N, and the housing of each pin 920A, 920B may surround the housing of each socket 910A, 910B. Thus, this structure can prevent erroneous installation between each socket 910A, 910B and each pin 920A, 920B. Details of the connection or mating between each receptacle 910A, 910B and each pin 920A, 920B are shown in fig. 9C. As shown in fig. 9C, when the two pins 920A, 920B are inserted into the two sockets 910A, 910B, the pin SP1 of each socket 910A, 910B may be connected to the pin SP2 of each pin 920A, 920B, so that the capacitor CAP of the capacitor module 340 is connected to the circuit board 310 through the connection of the pin SP2 and the pin SP 1.

As described above, embodiments provide a detachable capacitor connecting structure for detachably connecting one or more capacitors to a circuit board in a memory device.

Although the foregoing embodiments have been shown and described in some detail for purposes of clarity and understanding, the invention is not limited to the details provided. As will be appreciated by one of skill in the art in light of the foregoing disclosure, there are many alternative ways of implementing the present invention. Accordingly, the disclosed embodiments are illustrative and not restrictive. The invention is intended to cover all modifications and alternatives falling within the scope of the claims.