阅读说明：本技术 通信总线的挂死修复方法、装置、电子设备及存储介质 (Hanging-up repairing method and device of communication bus, electronic equipment and storage medium ) 是由 孔维宾 宋开鑫 吴常顺 于 2021-10-08 设计创作，主要内容包括：本申请公开了一种通信总线的挂死修复方法、装置、电子设备及存储介质。其中,该方法包括：检测所述中央处理器与基带处理单元之间的通信情况；在所述通信情况用于指示所述中央处理器与所述基带处理单元之间通信故障的情况下,确定部署在所述中央处理器与所述基带处理单元之间的通信总线产生的目标挂死事件；获取所述目标挂死事件对应的目标修复操作；按照所述目标修复操作对所述通信总线进行修复。本申请实施例在中央处理器与所述基带处理单元之间通信故障的情况下,能够自动确定通信总线产生的目标挂死事件,并执行目标挂死事件对应的修复操作,实现了在通信总线出现挂死的情况自动修复,提升了中央处理器在运行过程中的稳定性。(The application discloses a hang-up repairing method and device of a communication bus, electronic equipment and a storage medium. Wherein, the method comprises the following steps: detecting the communication condition between the central processing unit and the baseband processing unit; determining a target hang-up event generated by a communication bus disposed between the central processor and the baseband processing unit under the condition that the communication condition is used for indicating communication failure between the central processor and the baseband processing unit; acquiring target repairing operation corresponding to the target hang-up event; and repairing the communication bus according to the target repairing operation. According to the embodiment of the application, under the condition of communication faults between the central processing unit and the baseband processing unit, the target hang-up event generated by the communication bus can be automatically determined, the repairing operation corresponding to the target hang-up event is executed, the automatic repairing of the condition that the communication bus is hung up is realized, and the stability of the central processing unit in the operation process is improved.)

1. A hang-up repairing method of a communication bus is applied to a central processing unit, and comprises the following steps:

detecting the communication condition between the central processing unit and the baseband processing unit;

determining a target hang-up event generated by a communication bus disposed between the central processor and the baseband processing unit under the condition that the communication condition is used for indicating communication failure between the central processor and the baseband processing unit;

acquiring target repairing operation corresponding to the target hang-up event;

and repairing the communication bus according to the target repairing operation.

2. The method of claim 1, wherein said determining a target hang event generated by a communication bus disposed between said central processor and said baseband processing unit comprises:

detecting a target connection mode of the central processing unit and the baseband processing unit at the current moment;

determining a target hang-up event generated by the communication bus according to the target connection mode, wherein the target hang-up event comprises: a serial data line hang-up event and a serial clock line hang-up event.

3. The method of claim 2, wherein the target connection mode comprises:

the central processor is connected with the baseband processing unit through a communication bus;

or the like, or, alternatively,

the central processor is connected with the hot plug chip and the baseband processing unit in series through a communication bus.

4. The method of claim 3, wherein the determining the target hang-up event generated by the communication bus according to the target connection mode comprises:

when the target connection mode is that the central processing unit is connected with the baseband processing unit through a communication bus, the target hang-up event is a serial clock line hang-up event;

and under the condition that the target connection mode is that the central processing unit is connected with the hot plug chip and the baseband processing unit in series through a communication bus, the target hang-up event is a serial data line hang-up event.

5. The method of claim 3, wherein in the case that the target hang up event is a serial clock line hang up event, the repairing the communication bus according to the target repair operation comprises:

switching the central processing unit to a GPIO input mode;

when the central processing unit changes from high level to low level in the GPIO input mode, switching the central processing unit from the GPIO input mode to a GPIO output mode;

and when the central processing unit is changed from low level to high level in the GPIO output mode, the central processing unit is switched from the GPIO output mode to the IIC mode.

6. The method of claim 3, wherein in the case that the target hang up event is a serial data line hang up event, the repairing the communication bus according to the target repair operation comprises:

under the condition that the baseband processing unit is detected to be in a unplugged state, sending a first control instruction to a programming logic device corresponding to the hot plug chip, wherein the first control instruction is used for controlling the programming logic device to stop supplying power to the hot plug chip;

after the hot plug chip stops working, detecting the plugging state of the baseband processing unit;

and sending a second control instruction to the programming logic unit under the condition that the plugging state is used for indicating that the baseband processing unit is in the plugging state, wherein the second control instruction is used for controlling the programming logic unit to start to supply power to the hot plug chip.

7. The method of claim 6, wherein sending the second control instruction to the programming logic comprises:

sending a second control instruction to the programming logic device after delaying preset time;

or the like, or, alternatively,

and detecting the initialization progress of the inserted baseband processing unit, and sending a second control instruction to the programming logic unit when the initialization progress reaches a preset progress.

8. A hang-up recovery device for a communication bus, comprising:

the detection module is used for detecting the communication condition between the central processing unit and the baseband processing unit;

a determining module, configured to determine a target hang-up event generated by a communication bus disposed between the central processor and the baseband processing unit, if the communication condition is used to indicate a communication fault between the central processor and the baseband processing unit;

the acquisition module is used for acquiring target repair operation corresponding to the target hang-up event;

and the execution module is used for repairing the communication bus according to the target repairing operation.

9. A storage medium, characterized in that the storage medium comprises a stored program, wherein the program is operative to perform the method steps of any of the preceding claims 1 to 7.

10. An electronic device is characterized by comprising a processor, a communication interface, a memory and a communication bus, wherein the processor and the communication interface are used for realizing mutual communication by the memory through the communication bus; wherein:

a memory for storing a computer program;

a processor for performing the method steps of any of claims 1-7 by executing a program stored on a memory.

Technical Field

The present application relates to the field of computer technologies, and in particular, to a method and an apparatus for hang-up recovery of a communication bus, an electronic device, and a storage medium.

Background

An I2C (Inter-Integrated Circuit BUS) Integrated Circuit BUS, which is designed by NXP (original PHILIPS) corporation, is mostly used for master-slave communication between a master controller and a slave device, and is used in a small data volume occasion, and has the characteristics of short transmission distance, only one master at any time, and the like.

The IIC bus physical layer requires only two buses, one serial data line SDA and one serial clock line SCL, with the IIC being half-duplex, rather than full-duplex. Each device connected to the bus may communicate with other devices via a unique address, the master/slave roles and addresses may be configurable, and the master may act as a master transmitter and a master receiver. While the IIC is a true multi-host bus, if two or more hosts request the bus at the same time, the bus data can be prevented from being corrupted by collision detection and arbitration. The transmission rate can reach 100kb/s in standard mode and 400kb/s in fast mode.

Currently, the marine CPU supports 5 IIC buses, with the CPU supporting access to a maximum of 16 DIMMs. The IIC bus of the BBU is hung on an IIC1 channel of the CPU, an independent ST MCU singlechip is arranged on a BBU (baseband processing unit) board and realizes the BBU standby power decoupling function, and when the BBU battery is started or rebot, the ST singlechip can have a scene mainly based on the IIC and judge whether the BBU battery is a first goods source or a second goods source. Since the IIC1 of the marine light CPU is the controller on the bus IIC1, but the scene that the IIC is the main point exists in the marine light CPU and the MCU of the ST on the bus, the IIC bus has a competitive relationship, so that the problem of the IIC bus being hung up occurs.

Disclosure of Invention

In order to solve the technical problem or at least partially solve the technical problem, the present application provides a hang-up recovery method and apparatus for a communication bus, an electronic device, and a storage medium.

According to an aspect of the embodiments of the present application, there is provided a hang-up repairing method for a communication bus, which is applied to a central processing unit, the method including:

detecting the communication condition between the central processing unit and the baseband processing unit;

determining a target hang-up event generated by a communication bus disposed between the central processor and the baseband processing unit under the condition that the communication condition is used for indicating communication failure between the central processor and the baseband processing unit;

acquiring target repairing operation corresponding to the target hang-up event;

and repairing the communication bus according to the target repairing operation.

Further, the determining a target hang-up event generated by a communication bus disposed between the central processor and the baseband processing unit includes:

detecting a target connection mode of the central processing unit and the baseband processing unit at the current moment;

determining a target hang-up event generated by the communication bus according to the target connection mode, wherein the target hang-up event comprises: a serial data line hang-up event and a serial clock line hang-up event.

Further, the target connection method includes:

the central processor is connected with the baseband processing unit through a communication bus;

or the like, or, alternatively,

the central processor is connected with the hot plug chip and the baseband processing unit in series through a communication bus.

Further, the determining a target hang-up event generated by the communication bus according to the target connection mode includes:

when the target connection mode is that the central processing unit is connected with the baseband processing unit through a communication bus, the target hang-up event is a serial clock line hang-up event;

and under the condition that the target connection mode is that the central processing unit is connected with the hot plug chip and the baseband processing unit in series through a communication bus, the target hang-up event is a serial data line hang-up event.

Further, when the target hang-up event is a serial clock line hang-up event, repairing the communication bus according to the target repair operation includes:

switching the central processing unit to a GPIO input mode;

when the central processing unit changes from high level to low level in the GPIO input mode, switching the central processing unit from the GPIO input mode to a GPIO output mode;

and when the central processing unit is changed from low level to high level in the GPIO output mode, the central processing unit is switched from the GPIO output mode to the IIC mode.

Further, in a case that the target hang-up event is a serial data line hang-up event, the repairing the communication bus according to the target repair operation includes:

under the condition that the baseband processing unit is detected to be in a unplugged state, sending a first control instruction to a programming logic device corresponding to the hot plug chip, wherein the first control instruction is used for controlling the programming logic device to stop supplying power to the hot plug chip;

after the hot plug chip stops working, detecting the plugging state of the baseband processing unit;

and sending a second control instruction to the programming logic unit under the condition that the plugging state is used for indicating that the baseband processing unit is in the plugging state, wherein the second control instruction is used for controlling the programming logic unit to start to supply power to the hot plug chip.

Further, the sending the second control instruction to the programming logic unit includes:

sending a second control instruction to the programming logic device after delaying preset time;

or the like, or, alternatively,

and detecting the initialization progress of the inserted baseband processing unit, and sending a second control instruction to the programming logic unit when the initialization progress reaches a preset progress.

According to another aspect of the embodiments of the present application, there is also provided a hang-up recovery apparatus for a communication bus, including:

the detection module is used for detecting the communication condition between the central processing unit and the baseband processing unit;

a determining module, configured to determine a target hang-up event generated by a communication bus disposed between the central processor and the baseband processing unit, if the communication condition is used to indicate a communication fault between the central processor and the baseband processing unit;

the acquisition module is used for acquiring target repair operation corresponding to the target hang-up event;

and the execution module is used for repairing the communication bus according to the target repairing operation.

According to another aspect of the embodiments of the present application, there is also provided a storage medium including a stored program that executes the above steps when the program is executed.

According to another aspect of the embodiments of the present application, there is also provided an electronic apparatus, including a processor, a communication interface, a memory, and a communication bus, where the processor, the communication interface, and the memory complete communication with each other through the communication bus; wherein: a memory for storing a computer program; a processor for executing the steps of the method by running the program stored in the memory.

Embodiments of the present application also provide a computer program product containing instructions, which when run on a computer, cause the computer to perform the steps of the above method.

Compared with the prior art, the technical scheme provided by the embodiment of the application has the following advantages: according to the embodiment of the application, under the condition of communication faults between the central processing unit and the baseband processing unit, the target hang-up event generated by the communication bus can be automatically determined, the repairing operation corresponding to the target hang-up event is executed, the automatic repairing of the condition that the communication bus is hung up is realized, and the stability of the central processing unit in the operation process is improved.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and together with the description, serve to explain the principles of the application.

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art to obtain other drawings without inventive exercise.

Fig. 1 is a flowchart of a method for repairing a hang-up of a communication bus according to an embodiment of the present disclosure;

fig. 2 is a flowchart of a method for repairing a hang-up of a communication bus according to another embodiment of the present disclosure;

fig. 3 is a schematic connection diagram of a central processing unit and a baseband processing unit according to an embodiment of the present disclosure;

fig. 4 is a flowchart of a method for repairing a hang-up of a communication bus according to another embodiment of the present application;

fig. 5 is a flowchart of a method for repairing a hang-up of a communication bus according to another embodiment of the present application;

fig. 6 is a block diagram of a hang-up recovery apparatus for a communication bus according to an embodiment of the present disclosure;

fig. 7 is a schematic structural diagram of an electronic device according to an embodiment of the present application.

Detailed Description

In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely with reference to the drawings in the embodiments of the present application, it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments, and the illustrative embodiments and descriptions thereof of the present application are used for explaining the present application and do not constitute a limitation to the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

It is noted that, in this document, relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another similar entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

The embodiment of the application provides a method and a device for repairing hang-up of a communication bus, electronic equipment and a storage medium. The method provided by the embodiment of the invention can be applied to any required electronic equipment, for example, the electronic equipment can be electronic equipment such as a server and a terminal, and the method is not particularly limited herein, and is hereinafter simply referred to as electronic equipment for convenience in description.

According to an aspect of the embodiments of the present application, an embodiment of a method for hang-up repair of a communication bus is provided, where the method is applied to a central processing unit. Fig. 1 is a flowchart of a method for repairing a hang-up of a communication bus according to an embodiment of the present application, where as shown in fig. 1, the method includes:

step S11, detecting the communication condition between the central processing unit and the baseband processing unit.

The method provided by the embodiment of the application is designed for the problem that the communication bus between a central processing unit and a baseband processing unit is hung up and can not be automatically repaired, wherein the central processing unit can be a marine light CPU, and the baseband processing unit is a BBU (building Base band Unit).

In this embodiment, the central processing unit may randomly or periodically detect a communication condition with the baseband processing unit, for example: by acquiring data transmission parameters such as transmission rate, transmission amount and the like disposed on a communication bus between the central processor and the baseband processing unit. Then, the communication condition between the central processing unit and the baseband processing unit is determined according to the transmission parameters.

And step S12, in the case that the communication condition is used for indicating the communication fault between the central processing unit and the baseband processing unit, determining a target hang-up event generated by a communication bus arranged between the central processing unit and the baseband processing unit.

In an embodiment of the present application, the hang-up event includes: a serial data line hang-up event and a serial clock line hang-up event.

It should be noted that the serial data line hang event may be caused by the cpu writing data or address to the baseband processing unit, and if the baseband processing unit sends an ACK response, pulling SDA low during the clock signal. Or when the central processing unit reads data from the baseband processing unit, the baseband processing unit pulls down the SDA during the corresponding clock signal when bit is 0. The serial clock line hang event may be caused by the I2C interrupt service being unexpectedly masked, a while dead loop in the interrupt service being trapped with some flag bit queries, the I2C functional system being unexpectedly disabled, and so on.

In the embodiment of the present application, determining a target hang-up event generated by a communication bus disposed between a central processor and a baseband processing unit, as shown in fig. 2, includes the following steps a1-a 2:

and step A1, detecting the target connection mode of the central processing unit and the baseband processing unit at the current moment.

In this embodiment of the present application, a connection mode between the central processing unit and the baseband processing unit includes: the central processor is connected with the baseband processing unit through a communication bus. In this way, the hot-plug chip is in a pull-out state, and the central processing unit is directly connected with the baseband processing unit through the communication bus at the moment.

In this embodiment of the present application, the connection between the central processing unit and the baseband processing unit may also be that the central processing unit is serially connected to the hot-plug chip and the baseband processing unit through a communication bus. Referring to fig. 3, the central processing unit is bidirectionally connected to the hot-plug chip through the communication bus, and the hot-plug chip is bidirectionally connected to the baseband processing unit through the communication bus.

And step A2, determining a target hang-up event generated by the communication bus according to the target connection mode.

In this embodiment of the present application, determining a target deadlock event generated by a communication bus according to a target connection manner includes: under the condition that the target connection mode is that the central processing unit is connected with the baseband processing unit through the communication bus, the target hang-up event is a serial clock line hang-up event; and under the condition that the target connection mode is that the central processing unit is connected with the hot plug chip and the baseband processing unit in series through the communication bus, the target hang-up event is a serial data line hang-up event.

And step S13, acquiring the target repairing operation corresponding to the target hang-up event.

In the embodiment of the present application, different types of events of the hang-up event are different, and their corresponding repair operations are also different, for example: when the hang-up event is a serial clock line hang-up event, the corresponding repair operation may be switching the GPIO mode of the central processing unit. The hang-up event is a serial data line hang-up event and may be a control hot plug chip.

Step S14, repair the communication bus according to the target repair operation.

In the embodiment of the present application, in the case that the target hang-up event is a serial clock line hang-up event, step S14 repairs the communication bus according to the target repair operation, as shown in fig. 4, including the following steps B1-B3:

and step B1, switching the central processing unit to a GPIO input mode.

And step B2, when the central processing unit changes from high level to low level in the GPIO input mode, the central processing unit is switched from the GPIO input mode to the GPIO output mode.

And step B3, when the CPU is changed from low level to high level in the GPIO output mode, the CPU is switched from the GPIO output mode to the IIC mode.

In the embodiment of the present application, in the case where the serial clock line is hung up, if the sea light CPU directly sets a high level in the IIC mode, the sea light COU may be damaged, therefore, in order to solve the problem that the high level set by the marine CPU directly in the IIC mode is damaged, in the case of a serial clock line hang-up event, the central processing unit is switched from the IIC mode to the GPIO input mode (namely the input mode of the GPIO), and sets high level and low level according to preset sequence in the input mode of GPIO, after the setting is finished, the central processing unit is switched from the GPIO input mode to the GPIO output mode (namely, the output mode of GPIO), and in the GPIO output mode, the low level and the high level are set according to the preset sequence, after the central processing unit recovers to the high level, the central processing unit is switched from the GPIO output mode to the IID mode, and the central processing unit can be normally used in the IIC mode.

The embodiment of the application adopts the mode of switching the GPIO input mode and the GPIO output mode to set the high level, plays a role in buffering, and can effectively solve the problem that a sea light CPU directly sets the high level to be directly damaged in the IIC mode.

In the embodiment of the present application, in the case that the target hang-up event is a serial data line hang-up event, step S14 repairs the communication bus according to the target repair operation, as shown in fig. 5, including the following steps C1-C3:

and step C1, sending a first control instruction to the programming logic device corresponding to the hot-plug chip when the baseband processing unit is detected to be in the unplugged state, wherein the first control instruction is used for controlling the programming logic device to stop supplying power to the hot-plug chip.

And step C2, detecting the plugging state of the baseband processing unit after the hot plug chip stops working.

And step C3, sending a second control instruction to the programming logic unit under the condition that the plugging state is used for indicating that the baseband processing unit is in the plugging state, wherein the second control instruction is used for controlling the programming logic unit to start supplying power to the hot-plugged chip.

In the embodiment of the application, when the target hang-up event is a serial data line hang-up event, the central processing unit sends a detection instruction to the programming logic device corresponding to the hot-plug chip, so that the programming logic device detects the plug-in and pull-out state of the baseband processing unit, and when the baseband processing unit is detected to be in the pull-out state, sends a first control instruction to the programming logic device corresponding to the hot-plug chip, so that the programming logic device stops supplying power to the hot-plug chip, and the baseband processing unit is guaranteed to impact the hot-plug chip after being pulled out.

In addition, after the subsequent hot-plug chip stops working, the central processing unit can also control the programming logic device to continue detecting the plugging state of the baseband processing unit, and if the baseband processing unit is detected to be in the plugging state, a second control instruction is sent to the programming logic device corresponding to the hot-plug chip, so that the programming logic device starts to supply power to the hot-plug chip, and normal communication is recovered. In the embodiment of the application, the programming logic device is a CPLD, and the CPLD is mainly composed of a logic block, a programmable interconnection channel and an I/O block.

In an embodiment of the present application, the method further includes sending a second control instruction to the programming logic, and the method further includes: sending a second control instruction to the programming logic device after delaying the preset time; or detecting the initialization progress after the baseband processing unit is inserted, and sending a second control instruction to the programming logic unit under the condition that the initialization progress reaches the preset progress.

It should be noted that, in the embodiment of the present application, the central processing unit sends the second control instruction to the programming logic unit after delaying the preset time, which is beneficial to ensuring that the baseband processing unit can complete initialization within a sufficient time, so that the single chip in the baseband processing unit completes acquisition of whether the battery is the first cargo source or the second cargo source. In addition, the embodiment of the application can also determine whether the baseband processing unit completes initialization or not by detecting the initialization progress after the baseband processing unit is inserted, thereby being beneficial to the programming logic device to supply power to the hot plug chip in time.

According to the embodiment of the application, under the condition of communication faults between the central processing unit and the baseband processing unit, the target hang-up event generated by the communication bus can be automatically determined, the repairing operation corresponding to the target hang-up event is executed, the automatic repairing of the condition that the communication bus is hung up is realized, and the stability of the central processing unit in the operation process is improved.

Fig. 6 is a block diagram of a hang-up recovery apparatus for a communication bus according to an embodiment of the present disclosure, which may be implemented as part of or all of an electronic device through software, hardware, or a combination of the two. As shown in fig. 6, the apparatus includes:

the detection module 61 is used for detecting the communication condition between the central processing unit and the baseband processing unit;

a determining module 62, configured to determine a target hang-up event generated by a communication bus disposed between the central processor and the baseband processing unit, in a case that the communication condition is used to indicate a communication fault between the central processor and the baseband processing unit;

an obtaining module 63, configured to obtain a target repair operation corresponding to a target hang-up event;

and an execution module 64, configured to repair the communication bus according to the target repair operation.

In the embodiment of the present application, the determining module 62 includes:

the processing submodule is used for detecting the target connection mode of the central processing unit and the baseband processing unit at the current moment;

the determining submodule is used for determining a target hang-up event generated by the communication bus according to the target connection mode, wherein the target hang-up event comprises the following steps: a serial data line hang-up event and a serial clock line hang-up event.

In the embodiment of the present application, the target connection method includes: the central processing unit is connected with the baseband processing unit through a communication bus; or the central processing unit is connected with the hot plug chip and the baseband processing unit in series through the communication bus.

In the embodiment of the application, the determining submodule is used for determining that the target hang-up event is a serial clock line hang-up event when the target connection mode is that the central processing unit is connected with the baseband processing unit through the communication bus; and under the condition that the target connection mode is that the central processing unit is connected with the hot plug chip and the baseband processing unit in series through the communication bus, the target hang-up event is a serial data line hang-up event.

In the embodiment of the present application, in the case that the target hang-up event is a serial clock line hang-up event, the execution module 64 is configured to switch the central processing unit to the GPIO input mode; when the central processing unit is changed from a high level to a low level in the GPIO input mode, the central processing unit is switched from the GPIO input mode to the GPIO output mode; when the central processing unit is changed from low level to high level in the GPIO output mode, the central processing unit is switched from the GPIO output mode to the IIC mode.

In this embodiment of the present application, in a case that the target hang-up event is a serial data line hang-up event, the execution module 64 is configured to send a first control instruction to a programming logic device corresponding to the hot-plug chip when detecting that the baseband processing unit is in a pull-out state, where the first control instruction is used to control the programming logic device to stop supplying power to the hot-plug chip; after the hot-plug chip stops working, detecting the plugging state of the baseband processing unit; and sending a second control instruction to the programming logic unit under the condition that the plugging state is used for indicating that the baseband processing unit is in the plugging state, wherein the second control instruction is used for controlling the programming logic unit to start to supply power to the hot-plug chip.

In this embodiment of the application, in the case that the target hang-up event is a serial data line hang-up event, the execution module 64 is further configured to delay a preset time and send a second control instruction to the programming logic; or detecting the initialization progress after the baseband processing unit is inserted, and sending a second control instruction to the programming logic unit under the condition that the initialization progress reaches the preset progress.

An embodiment of the present application further provides an electronic device, as shown in fig. 7, the electronic device may include: the system comprises a processor 1501, a communication interface 1502, a memory 1503 and a communication bus 1504, wherein the processor 1501, the communication interface 1502 and the memory 1503 complete communication with each other through the communication bus 1504.

A memory 1503 for storing a computer program;

the processor 1501 is configured to implement the steps of the above embodiments when executing the computer program stored in the memory 1503.

The communication bus mentioned in the above terminal may be a Peripheral Component Interconnect (PCI) bus, an Extended Industry Standard Architecture (EISA) bus, or the like. The communication bus may be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, only one thick line is shown, but this does not mean that there is only one bus or one type of bus.

The communication interface is used for communication between the terminal and other equipment.

The Memory may include a Random Access Memory (RAM) or a non-volatile Memory (non-volatile Memory), such as at least one disk Memory. Optionally, the memory may also be at least one memory device located remotely from the processor.

The Processor may be a general-purpose Processor, and includes a Central Processing Unit (CPU), a Network Processor (NP), and the like; the Integrated Circuit may also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other Programmable logic device, a discrete Gate or transistor logic device, or a discrete hardware component.

In another embodiment provided by the present application, there is also provided a computer-readable storage medium having stored therein instructions, which when run on a computer, cause the computer to execute the method for recovering a hang-up of a communication bus as described in any of the above embodiments.

In yet another embodiment provided by the present application, there is also provided a computer program product containing instructions which, when run on a computer, cause the computer to perform the method for hang-up repair of a communication bus as described in any of the above embodiments.

In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When loaded and executed on a computer, cause the processes or functions described in accordance with the embodiments of the application to occur, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another, for example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by wire (e.g., coaxial cable, fiber optic, digital subscriber line) or wirelessly (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device, such as a server, a data center, etc., that incorporates one or more of the available media. The usable medium may be a magnetic medium (e.g., floppy Disk, hard Disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., Solid State Disk), among others.

The above description is only for the preferred embodiment of the present application, and is not intended to limit the scope of the present application. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application are included in the protection scope of the present application.

The above description is merely exemplary of the present application and is presented to enable those skilled in the art to understand and practice the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.