阅读说明：本技术 基于Aurora协议的双路冗余数据交换方法及系统 (Two-way redundant data exchange method and system based on Aurora protocol ) 是由 马文林 张国奇 闫森 王辉林 王春雷 陶威 高云龙 于 2021-09-15 设计创作，主要内容包括：本发明涉及一种基于Aurora协议的双路冗余数据交换方法及系统,其中该系统包括：第一Aurora协议模块Aurora-0、第二Aurora协议模块Aurora-1、接收侧模块Rx-top、去冗余模块Rd-arbiter、数据缓存模块dma-ctrl、数据整理发送模块Tx-engine、数据解析接收模块Rx-engine、数据分路发送模块Wr-arbiter和发送侧模块Tx-top。本发明使用了双路独立的工作接口,即所述第一Aurora协议模块Aurora-0和所述第二Aurora协议模块Aurora-1,提升链路中数据的准确性,并将优先完成校验的一路外部数据输入到所述去冗余模块Rd-arbiter,实现进行数据的缓存,能够控制数据吞吐量,不会造成数据的丢失,依据判断条件对缓存中的双路冗余数据进行判决,实现去冗余操作,此种传输方式提升了高速率下的数据稳定性。(The invention relates to a method and a system for exchanging double-path redundant data based on an Aurora protocol, wherein the system comprises the following components: the system comprises a first Aurora protocol module Aurora _0, a second Aurora protocol module Aurora _1, a receiving side module Rx _ top, a redundancy removing module Rd _ arbiter, a data caching module dma _ ctrl, a data sorting and sending module Tx _ engine, a data analyzing and receiving module Rx _ engine, a data shunting and sending module Wr _ arbiter and a sending side module Tx _ top. According to the invention, two independent working interfaces, namely the first Aurora protocol module Aurora _0 and the second Aurora protocol module Aurora _1, are used, so that the accuracy of data in a link is improved, one path of external data which is preferentially checked is input to the redundancy removal module Rd _ arbiter, the data is cached, the data throughput can be controlled, the data is not lost, the two paths of redundant data in the cache are judged according to judgment conditions, the redundancy removal operation is realized, and the data stability under high speed is improved by the transmission mode.)

1. A double-path redundant data exchange system based on an Aurora protocol is characterized by comprising a first Aurora protocol module Aurora _0, a second Aurora protocol module Aurora _1, a receiving side module Rx _ top, a redundancy removing module Rd _ arbiter, a data caching module dma _ ctrl, a data sorting and transmitting module Tx _ engine, a data analyzing and receiving module Rx _ engine, a data shunt transmitting module Wr _ arbiter and a transmitting side module Tx _ top, wherein the first Aurora protocol module Aurora _0 and the second Aurora protocol module Aurora _1 are used for independently receiving external data respectively, the receiving side module Rx _ top is connected with the first Aurora protocol module Aurora _0 and the second Aurora protocol module Aurora _1, the redundancy removing module Rd _ arbiter is connected with the receiving side module Rx _ top, the data sorting module dma _ ctr is connected with the redundancy removing module Rd _ arbiter, the redundancy removing module Rd _ arbiter is connected with the redundancy analyzing and transmitting module Rx _ engine, and the data analyzing and transmitting module Rx _ engine The data processing and transmitting module Tx _ engine and the data analyzing and receiving module Rx _ engine are also connected with PCIE, the data shunt transmitting module Wr _ arbiter is connected with the data cache module dma _ ctrl, and the transmitting side module Tx _ top is connected with the data shunt transmitting module Wr _ arbiter, the first Aurora protocol module Aurora _0 and the second Aurora protocol module Aurora _ 1.

2. The Aurora protocol-based two-way redundant data exchange system according to claim 1, wherein the data cache module dma ctrl comprises a first data segmentation module Status connected to the redundancy removal module Rd _ arbiter, a second data segmentation module Internal connected to the first data segmentation module Status, the sequential cache module Read _ req, the data parsing reception module Rx _ engine and the sequential cache module Read _ req, a sequential cache module Read _ req connected to the data parsing reception module Rx _ engine, and a sequencing output module Order connected to the data parsing reception module Rx _ engine and the redundancy removal module Rd _ arbiter.

3. The Aurora protocol-based dual-path redundant data exchange system according to claim 2, wherein the data sorting and sending module Tx _ engine includes a data packing module Pkt _ gen, a data clearing module Rdclr and a data reading and sending module Tx _ trn, the data packing module Pkt _ gen is connected to the data parsing and receiving module Rx _ engine, the data clearing module Rdclr is connected to the redundancy removing module Rd _ arbiter, the data reading and sending module Tx _ trn is connected to both the data packing module Pkt _ gen and the data clearing module Rdclr, and the data reading and sending module Tx _ trn is further connected to the PCIE.

4. The Aurora protocol-based two-way redundant data exchange system according to claim 1, wherein the data cache module dma ctrl comprises a first data fragmentation module Status and a second data fragmentation module Internal; the first data splitting module Status is connected with the data branching sending module Wr _ arbiter and the arranging sending module Tx _ engine, and the second data splitting module Internal is connected with the first data splitting module Status and the arranging sending module Tx _ engine.

5. The Aurora protocol-based dual-path redundant data exchange system according to claim 4, wherein the data arranging and sending module Tx _ engine includes a data packing module Pkt _ gen, a reset data module Dma _ rst and a data reading and sending module Tx _ trn, the data packing module Pkt _ gen is connected to the data parsing and receiving module Rx _ engine, the reset data module Dma _ rst is connected to the redundancy removing module Rd _ arbiter, the data reading and sending module Tx _ trn is connected to both the data packing module Pkt _ gen and the reset data module Dma _ rst, and the data reading and sending module Tx _ trn is further connected to PCIE.

6. The two-way redundant data exchange system according to claim 5, further comprising a data transmission module Egress, wherein the data transmission module Egress is connected to both the data branching transmission module Wr _ arbiter and the data reading transmission module Tx _ trn.

7. The two-way redundant data exchange system based on the Aurora protocol according to any one of claims 1 to 6, further comprising a Register, wherein the Register is connected to both the data splitting transmission module Wr _ arbiter and the redundancy removing module Rd _ arbiter.

8. A dual-path redundant data exchange method based on Aurora protocol, which is based on the dual-path redundant data exchange system based on Aurora protocol of claim 7, and comprises the following steps:

step S100: respectively and independently receiving external data based on the first Aurora protocol module Aurora _0 and the second Aurora protocol module Aurora _1, and inputting one path of external data which is preferentially checked into the redundancy removing module Rd _ arbiter;

step S200: initiating one DMA by the data of the redundancy removing module Rd _ arbiter, and sequentially sending the DMA to the PICE through the data caching module DMA _ ctrl and the data sorting sending module Tx _ engine;

step S300: the data analysis receiving module Rx _ engine receives the data returned by the PICE until one DMA is finished;

step S400: and the redundancy removing module Rd _ arbiter initiates a clearing signal and sends the clear signal to a PC (personal computer) end connected with PCIE through PCIE based on the data clearing module Rdclr.

9. The two-way redundant data exchange method according to the Aurora protocol, further comprising:

and respectively and independently receiving external data based on the first Aurora protocol module Aurora _0 and the second Aurora protocol module Aurora _1, and generating a first timestamp when inputting one path of external data which is preferentially checked into the redundancy removing module Rd _ arbiter.

10. The two-way redundant data exchange method according to the Aurora protocol, further comprising: when the redundancy removing module Rd _ arbiter detects that data exists in the cache of the receiving side module Rx _ top and when the index in the Register at the moment has data, reading the index and the physical address, splitting the actual transmission length into 8K, and initiating the DMA, wherein the actual transmission length is 64 KB.

Technical Field

The invention relates to the technical field of high-speed communication equipment, in particular to a method and a system for exchanging double-path redundant data based on an Aurora protocol.

Background

Along with the popularization of communication technologies such as 5G and the like, the requirements of communication equipment on data real-time processing, transmission speed and high bandwidth are gradually increased, and a low-speed transmission bus which is traditionally used in an embedded system has the advantages of strong stability, simplicity in operation and the like, but is very easy to become a bottleneck in data transmission due to the limitation of transmission bandwidth; the traditional high-speed protocol used between devices has the advantages of high bandwidth, low delay and the like, but the development difficulty and cost are increased due to poor interface universality, complex transmission protocol and gradually increased data transmission channels.

In order to cope with the trend of high-speed development of communication equipment, a communication system has higher modularization and integration level, and high-speed data exchange between equipment is carried out under the condition of ensuring stable data in a transmission link, so that the method becomes a hotspot of communication industry research. The PCIE bus is used as a computer bus which is most widely applied, and has the advantages that the bus bandwidth and the transmission rate are improved, the conflict between the bus bandwidth and a high-speed processor is relieved by adopting a DMA mode, and the PCIE bus has a dual-channel transmission technology and expanded flexibility.

At present, along with the increase of clock rate, circuit routing, clock delay and other factors, the certainty of data transmission is reduced, and in order to improve the accuracy of data in a link, a two-way redundant data exchange method and system based on an Aurora protocol are urgently needed.

Disclosure of Invention

In view of the above, it is necessary to provide a dual-path redundant data exchange system and system based on Aurora protocol, which can improve data processing efficiency.

The invention provides a dual-path redundant data exchange system based on an Aurora protocol, which comprises a first Aurora protocol module Aurora _0, a second Aurora protocol module Aurora _1, a receiving side module Rx _ top, a redundancy removing module Rd _ arbiter, a data caching module dma _ ctrl, a data sorting and sending module Tx _ engine, a data analyzing and receiving module Rx _ engine, a data branching and sending module Wr _ arbiter and a sending side module Tx _ top, wherein the first Aurora protocol module Aurora _0 and the second Aurora protocol module Rd _1 are used for independently receiving external data respectively, the receiving side module Rx _ top is connected with the first Aurora protocol module Aurora _0 and the second Aurora protocol module Aurora _1, the redundancy removing module Rd _ arbiter is connected with the receiving side module Rx _ top, and the data redundancy removing module Rd _ arbiter is connected with the redundancy removing module Rd _ arbiter, the data sorting sending module Tx _ engine and the data analyzing receiving module Rx _ engine are both connected to the data cache module dma _ ctrl, the data sorting sending module Tx _ engine and the data analyzing receiving module Rx _ engine are also both connected to PCIE, the data shunt sending module Wr _ arbiter is connected to the data cache module dma _ ctrl, and the sending side module Tx _ top is connected to the data shunt sending module Wr _ arbiter, the first Aurora _0 module and the second Aurora _1 module.

In a possible preferred embodiment, the data cache module dma _ ctrl includes a first data partitioning module Status, a second data partitioning module Internal, a sequential cache module Read _ req, and a sequencing output module Order, the first data partitioning module Status is connected to the redundancy removing module Rd _ arbiter, the second data partitioning module Internal is connected to the first data partitioning module Status, the sequential cache module Read _ req, the data parsing receiving module Rx _ engine, and the sequential cache module Read _ req, the sequential cache module Read _ req is connected to the data parsing receiving module Rx _ engine, and the sequencing output module Order is connected to the data parsing receiving module Rx _ engine and the redundancy removing module Rd _ arbiter.

In a possible preferred embodiment, the data sorting and sending module Tx _ engine includes a data packing module Pkt _ gen, a data clearing module Rdclr and a data reading and sending module Tx _ trn, the data packing module Pkt _ gen is connected to the data parsing and receiving module Rx _ engine, the data clearing module Rdclr is connected to the redundancy removing module Rd _ arbiter, the data reading and sending module Tx _ trn is connected to both the data packing module Pkt _ gen and the data clearing module Rdclr, and the data reading and sending module Tx _ trn is further connected to the PCIE.

In a possible preferred embodiment, said data caching module dma ctrl comprises a first data slicing module Status and a second data slicing module Internal; the first data splitting module Status is connected with the data branching sending module Wr _ arbiter and the arranging sending module Tx _ engine, and the second data splitting module Internal is connected with the first data splitting module Status and the arranging sending module Tx _ engine.

In a possible preferred embodiment, the data sorting and sending module Tx _ engine includes a data packing module Pkt _ gen, a reset data module Dma _ rst and a data reading and sending module Tx _ trn, the data packing module Pkt _ gen is connected to the data parsing and receiving module Rx _ engine, the reset data module Dma _ rst is connected to the redundancy removing module Rd _ arbiter, the data reading and sending module Tx _ trn is connected to both the data packing module Pkt _ gen and the reset data module Dma _ rst, and the data reading and sending module Tx _ trn is further connected to the PCIE.

In a possible preferred embodiment, the system further includes a data transmission module Egress, and the data transmission module Egress is connected to both the data shunt sending module Wr _ arbiter and the data read sending module Tx _ trn.

In a possible preferred embodiment, the system further includes a Register, and the Register is connected to both the data shunt transmission module Wr _ arbiter and the redundancy elimination module Rd _ arbiter.

The second aspect of the present invention further provides a dual-path redundant data exchange method based on an Aurora protocol, wherein the method is based on the dual-path redundant data exchange system based on the Aurora protocol, and the method comprises the following steps:

step S100: respectively and independently receiving external data based on the first Aurora protocol module Aurora _0 and the second Aurora protocol module Aurora _1, and inputting one path of external data which is preferentially checked into the redundancy removing module Rd _ arbiter;

step S200: initiating one DMA by the data of the redundancy removing module Rd _ arbiter, and sequentially sending the DMA to the PICE through the data caching module DMA _ ctrl and the data sorting sending module Tx _ engine;

step S300: the data analysis receiving module Rx _ engine receives the data returned by the PICE until one DMA is finished;

step S400: and the redundancy removing module Rd _ arbiter initiates a clearing signal and sends the clear signal to a PC (personal computer) end connected with PCIE through PCIE based on the data clearing module Rdclr.

In a possible preferred embodiment, the method further comprises:

and respectively and independently receiving external data based on the first Aurora protocol module Aurora _0 and the second Aurora protocol module Aurora _1, and generating a first timestamp when inputting one path of external data which is preferentially checked into the redundancy removing module Rd _ arbiter.

In a possible preferred embodiment, the method further comprises: when the redundancy removing module Rd _ arbiter detects that data exists in the cache of the receiving side module Rx _ top and when the index in the Register at the moment has data, reading the index and the physical address, splitting the actual transmission length into 8K, and initiating the DMA, wherein the actual transmission length is 64 KB.

The system and the method of the invention realize the following technical effects:

the two-path redundant data exchange method and the two-path redundant data exchange system based on the Aurora protocol sequentially comprise a first Aurora protocol module Aurora _0, a second Aurora protocol module Aurora _1, a receiving side module Rx _ top, a redundancy removing module Rd _ arbiter, a data caching module dma _ ctrl, a data sorting and sending module Tx _ engine, a data analyzing and receiving module Rx _ engine, a data shunt sending module Wr _ arbiter and a sending side module Tx _ top. And double independent working interfaces, namely the first Aurora protocol module Aurora _0 and the second Aurora protocol module Aurora _1, are used, so that the accuracy of data in a link is improved.

When data transmission is carried out, external data are independently received based on the first Aurora protocol module Aurora _0 and the second Aurora protocol module Aurora _1 respectively, one path of external data which is preferentially checked is input into the redundancy removing module Rd _ arbiter, then DMA is initiated once through the data of the redundancy removing module Rd _ arbiter, and the DMA is sequentially transmitted to the PICE through the data caching module DMA _ ctrl and the data sorting and transmitting module Tx _ engine.

And then, the data analysis receiving module Rx _ engine receives the data returned by the PICE until one DMA is finished, finally, the redundancy removing module Rd _ arbiter initiates a clearing signal, and sends the clear signal to a PC (personal computer) end connected with the PCIE through the PCIE based on the data clearing module Rdclr, so that the data caching is realized, the data throughput can be controlled, the data loss cannot be caused, the two-way redundancy data in the cache is judged according to the judgment condition, the redundancy removing operation is realized, and the data stability under the high speed is improved by the transmission mode.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this application, illustrate embodiments of the invention and, together with the description, serve to explain the invention and not to limit the invention. In the drawings:

FIG. 1 is a block diagram of an apparatus application environment of a two-way redundant data exchange method based on an Aurora protocol in an embodiment;

FIG. 2 is a block diagram of a two-way redundant data exchange system based on the Aurora protocol in one embodiment;

FIG. 3 is a block diagram illustrating the flow structure of DMA in the sending direction in the dual-path redundant data exchange method based on the Aurora protocol in one embodiment;

FIG. 4 is a block diagram illustrating the flow structure of DMA in the receiving direction in the dual-path redundant data exchange method based on the Aurora protocol in one embodiment;

FIG. 5 is a schematic flow chart illustrating a two-way redundant data exchange method based on the Aurora protocol in one embodiment;

FIG. 6 is a flow diagram of read and write request priority arbitration in one embodiment;

FIG. 7 is a block diagram of a flow of reading a BD in one embodiment.

Detailed Description

The following describes in detail embodiments of the present invention. The following examples will assist those skilled in the art in further understanding the invention, but are not intended to limit the invention in any way. It should be noted that variations and modifications can be made by persons skilled in the art without departing from the spirit of the invention. All falling within the scope of the present invention. Furthermore, the embodiments and features of the embodiments may be combined with each other in the present application without conflict.

In order to make those skilled in the art better understand the technical solution of the present invention, the technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, shall fall within the scope of the present invention.

It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," as well as any variations thereof, are intended to cover non-exclusive inclusions.

In one embodiment, as shown in fig. 1, an application scenario diagram of a dual-path redundant data exchange system based on an Aurora protocol and a dual-path redundant data exchange method based on the Aurora protocol is provided.

In an embodiment, as shown in fig. 2, a dual-path redundant data exchange system based on an Aurora protocol is provided, where the system includes a first Aurora protocol module Aurora _0, a second Aurora protocol module Aurora _1, a receiving-side module Rx _ top, a redundancy removing module Rd _ arbiter, a data caching module dma _ ctrl, a data sorting and transmitting module Tx _ engine, a data parsing and receiving module Rx _ engine, a data branching and transmitting module Wr _ arbiter, and a transmitting-side module Tx _ top.

The first Aurora protocol module Aurora _0 and the second Aurora protocol module Aurora _1 are data transmission conforming to Aurora protocols, data converted by the modules conform to an AXI port protocol, and the data are transmitted to FPGA internal logic for use.

The first Aurora protocol module Aurora _0 and the second Aurora protocol module Aurora _1 are used for independently receiving external data respectively, the receiving side module Rx _ top is connected with the first Aurora protocol module Aurora _0 and the second Aurora protocol module Aurora _1, the redundancy removing module Rd _ arbiter is connected with the receiving side module Rx _ top, the data caching module dma ctrl is connected with the redundancy removing module Rd _ arbiter, the data sorting and transmitting module Tx _ engine and the data parsing and receiving module Rx _ engine are both connected to the data buffering module dma _ ctrl, the data arranging and sending module Tx _ engine and the data analyzing and receiving module Rx _ engine are both connected with PCIE, the data shunt sending module Wr _ arbiter is connected to the data cache module dma _ ctrl, the transmitting side module Tx _ top is connected with the data shunt transmitting module Wr _ arbiter, the first Aurora protocol module Aurora _0 and the second Aurora protocol module Aurora _ 1.

It should be noted that, in the following embodiments, for example, the first Aurora protocol module Aurora _0, the second Aurora protocol module Aurora _1, the receiving side module Rx _ top, the redundancy removing module Rd _ arbiter, the data caching module dma _ ctrl, the data sorting transmitting module Tx _ engine, the data parsing receiving module Rx _ engine, the data branching transmitting module Wr _ arbiter, and the transmitting side module Tx _ top may be replaced by subsequent letter designations, for example, the first Aurora protocol module Aurora _0 is referred to as Aurora _0, or the Aurora _0 module, and the other modules are referred to as the second Aurora protocol module Aurora _1, the receiving side module Rx _ top, the redundancy removing module Rd _ arbiter, the data caching module dma _ ctrl, the data sorting transmitting module Tx _ engine, the data parsing receiving module Tx _ engine, the data transmitting module Wr _ arbiter, and the transmitting side module Tx _ top.

Furthermore, Rx _ top is a receiving module at the Aurora side, and the functions of Rx _ top include analyzing data, performing caching, comparison, verification and data flow rate control operations on two Aurora data paths, corresponding Tx _ top is a transmitting module at the Aurora side, verifying the two data paths, and converting the verified data into an AXI bus mode to be transmitted; the main function of the Rd _ arbiter module is to perform redundancy removing operation on the received two paths of data, control the length, channel and the like of the data of a primary request, and the corresponding Wr _ arbiter module respectively sends out the data from two independent interfaces, controls the length and the like of a primary request; the dma ctrl module will cache, slice, and initiate dma operations on the data; the Tx _ engine module will arrange the data packet to be sent into the format of the PCIE standard packet to be sent, and the corresponding Rx _ engine module will analyze the received PCIE data.

In one embodiment, as shown in fig. 2 to 4, the data cache module dma _ ctrl includes a first data segmentation module Status, a second data segmentation module Internal, a sequential cache module Read _ req, and a sort output module Order, the first data segmentation module Status is connected to the redundancy removal module Rd _ arbiter, the second data segmentation module Internal is connected to the first data segmentation module Status, the sequential cache module Read _ req, the data parsing reception module Rx _ engine, and the sequential cache module Read _ req, the sequential cache module Read _ req is connected to the data parsing reception module Rx _ engine, and the sort output module Order is connected to the data parsing reception module Rx _ engine and the redundancy removal module Rd _ arbiter.

In an embodiment, as shown in fig. 3, the data sorting and sending module Tx _ engine includes a data packing module Pkt _ gen, a data clearing module Rdclr and a data reading and sending module Tx _ trn, where the data packing module Pkt _ gen is connected to the data parsing and receiving module Rx _ engine, the data clearing module Rdclr is connected to the redundancy removing module Rd _ arbiter, the data reading and sending module Tx _ trn is connected to both the data packing module Pkt _ gen and the data clearing module Rdclr, and the data reading and sending module Tx _ trn is further connected to the PCIE.

In one embodiment, as shown in fig. 2-3, the data caching module dma ctrl includes a first data slicing module Status and a second data slicing module Internal; the first data splitting module Status is connected with the data branching sending module Wr _ arbiter and the arranging sending module Tx _ engine, and the second data splitting module Internal is connected with the first data splitting module Status and the arranging sending module Tx _ engine.

In one embodiment, as shown in fig. 4, the data sorting sending module Tx _ engine includes a data packing module Pkt _ gen, a reset data module Dma _ rst and a data reading sending module Tx _ trn, the data packing module Pkt _ gen is connected to the data parsing receiving module Rx _ engine, the reset data module Dma _ rst is connected to the redundancy removing module Rd _ arbiter, the data reading sending module Tx _ trn is connected to both the data packing module Pkt _ gen and the reset data module Dma _ rst, and the data reading sending module Tx _ trn is further connected to the PCIE.

Further, the functions of the Status module and the Internal module, Tx _ trn module in fig. 4 are equivalent to the functions of the modules in the transmission direction of fig. 3; the function of the Dma _ rst module is to initiate a reset when a 64K data transmission is completed, and the Dma _ rst module performs a buffering process on the reset request.

Further, the Pkt _ gen module packs data and forms a header and data conforming to a protocol; the Tx _ trn module controls reading of data and sends the data to the PCIE; the Read _ req module is used for caching the sequence information of the data packet; the Order module is used for sorting and outputting the received data; the Rx _ engine module is used for analyzing and caching the received data; the Rdclr module buffers the clear data signal.

In an embodiment, as shown in fig. 4, the two-way redundant data exchange system based on the Aurora protocol further includes a data transmission module Egress, and the data transmission module Egress is connected to both the data branching transmission module Wr _ arbiter and the data reading transmission module Tx _ trn. The Egress module reads data, and the read data is sent to the Tx _ trn module.

In an embodiment, as shown in fig. 3 and 4, the two-way redundant data exchange system based on the Aurora protocol further includes a Register, and the Register is connected to both the data splitting sending module Wr _ arbiter and the redundancy removing module Rd _ arbiter.

The Register is a Register module and stores some instruction information to read or write operation information; the Status module and the Internal module respectively split and slice the data twice and initiate the DMA operation.

In summary, the method and system for exchanging two-way redundant data based on the Aurora protocol of the present invention sequentially set a first Aurora protocol module Aurora _0, a second Aurora protocol module Aurora _1, a receiving side module Rx _ top, a redundancy removing module Rd _ arbiter, a data caching module dma _ ctrl, a data sorting and transmitting module Tx _ engine, a data parsing and receiving module Rx _ engine, a data shunting and transmitting module Wr _ arbiter, and a transmitting side module Tx _ top. Two independent working interfaces are used, namely the first Aurora protocol module Aurora _0 and the second Aurora protocol module Aurora _1, so that the accuracy of data in a link is improved, and external data are respectively and independently received based on the first Aurora protocol module Aurora _0 and the second Aurora protocol module Aurora _1 during data transmission.

And inputting a path of external data which is preferentially checked into the redundancy removing module Rd _ arbiter, initiating a DMA through the data of the redundancy removing module Rd _ arbiter, sequentially passing through the data cache module DMA _ ctrl and the data sorting and sending module Tx _ engine to the PICE, receiving the data returned by the PICE by the data parsing and receiving module Rx _ engine until the end of the DMA, and finally initiating a clearing signal by the redundancy removing module Rd _ arbiter, and sending the clear signal to a PC end connected with the PCIE through the PCIE based on the data clearing module Rdclr, so that the data caching is realized, the data throughput can be controlled, the data loss is not caused, the decision is performed on two paths of redundant data in the cache according to the judgment condition, the redundancy removing operation is realized, and the data stability under the high speed is improved by the transmission mode.

In an embodiment, as shown in fig. 5, the present invention further provides a dual-path redundant data exchange method based on an Aurora protocol, where the method is based on the dual-path redundant data exchange system based on the Aurora protocol, and the method includes the following steps:

step S100: respectively and independently receiving external data based on the first Aurora protocol module Aurora _0 and the second Aurora protocol module Aurora _1, and inputting one path of external data which is preferentially checked into the redundancy removing module Rd _ arbiter;

step S200: initiating one DMA by the data of the redundancy removing module Rd _ arbiter, and sequentially sending the DMA to the PICE through the data caching module DMA _ ctrl and the data sorting sending module Tx _ engine;

step S300: the data analysis receiving module Rx _ engine receives the data returned by the PICE until one DMA is finished;

step S400: and the redundancy removing module Rd _ arbiter initiates a clearing signal and sends the clear signal to a PC (personal computer) end connected with PCIE through PCIE based on the data clearing module Rdclr.

Specifically, the method further comprises:

and respectively and independently receiving external data based on the first Aurora protocol module Aurora _0 and the second Aurora protocol module Aurora _1, and generating a first timestamp when inputting one path of external data which is preferentially checked into the redundancy removing module Rd _ arbiter.

Specifically, the method further comprises: when the redundancy removing module Rd _ arbiter detects that data exists in the cache of the receiving side module Rx _ top and when the index in the Register at the moment has data, reading the index and the physical address, splitting the actual transmission length into 8K, and initiating the DMA, wherein the actual transmission length is 64 KB.

In one embodiment, as shown in fig. 2-4, external data enters the buffers of the Rx _ top module from two independent data paths, namely, Aurora _0 and Aurora _1, respectively, and when the buffers in the Rx _ top module are not processed in time, a flow control operation is triggered to control the flow rate of the data; when data are cached, the module starts to read out the data from the two caches to check the head, the tail, the data length and the crc of the data, wherein one path of data in the two paths of data is checked firstly and then transmitted to the next stage, the corresponding other path of data is discarded, and the two paths of redundant data are converted into one path of data.

In order to ensure the normal work of the link, the function of the timestamp is added, the transmission time of the link can be obtained by calculating the difference value of the timestamp, and if the time is too long, the overtime report is carried out; when data is output from this module, a first time stamp is stamped.

As shown in fig. 3, first, according to the first steps in fig. 3, when the Rd _ arbiter module detects that there is data in the cache of Rx _ top and when there is data in the index in the Register (Register) at this time, it reads the index and the physical address; secondly, splitting the actual transmission length (64 KB) into every 8K, and initiating DMA once; thirdly, Status splits the DMA of 8KB into DMA initiated every 4 KB; fourthly, the Internal initiates DMA of 4 KB; fifthly, the Pkt _ gen sends tag information used by the framing header to a Read _ req cache; sixthly, the Pkt _ gen splits 4KB according to the maximum request length of PCIE and forms a frame header which accords with the protocol to be placed into a cache for Tx _ trn to read, and the Tx _ trn _ sm reads the frame header and sends the frame header to the PCIE core; then, receiving data returned by the PCIE Read request by Rx _ engin, and sending tag sequence information of a received frame to Read _ req to determine whether a response is overtime; sending the received data to an Order module for ordering by using the eighty-degree-entry; the ninthly Order module sorts the data according to the sequence of the request frames and then sends the data to the Rx _ top module; the data in the R (R) is sent into a Rd _ arbiter, and the DMA length is counted; ⑪ Rx _ engin generates 4KB DMA done signal according to the actual receiving length and the DMA length; ⑫, repeating the steps from (II) to (⑫) all the time to complete the DMA of all the 8K data, and in the step, marking a second time stamp on the data; ⑬ initiating a clear signal after completing DMA of the data; ⑭ sending a clear signal to the PC; and finally, jumping to a waiting state to wait for the initiation of the DMA next time.

Further, as shown in fig. 2 and 4, the data in the receiving direction is in the order of the sequence numbers in fig. 4: firstly, Wr _ arbiter detects that the front end has data and has available index, and reads a physical address; ② Wr _ arbiter initiates DMA (64 KB); state splits the DMA of 64KB into one DMA every 4 KB; fourthly, the Internal initiates DMA of 4 KB; fifthly, the Pkt _ gen splits 4KB according to the frame size of PCIE and puts a frame header which conforms to a protocol into fifo for Tx _ trn to read; sixthly, ninthly, tx trn sm reading data; the method comprises the steps that (1) header and data are read by (r) tx _ trn _ sm and sent to a PCIE core, and a 4KB DMA done signal is generated according to the length of the DMA and the actual sending length; ⑪ Status repeats (c) - (c) until all 4KB DMA is completed, generating 64KB DMA done signal, in this step, stamping the data with the third time stamp. (ii) a ⑫ Wr _ arbiter detects 64KB DMA done signal, and information frames such as frame length, frame check result and the like are written into Dma _ Wrset; ⑬ Tx _ trn reads the data buffered by the Dma _ Wrset and sends the data to the PCIE core; and finally, jumping to a waiting state to wait for the initiation of the DMA next time.

And finally, sending the data into a buffer memory of Tx _ top, checking the single-path data, copying the data into two paths of same data, marking a fourth time stamp, calculating the time consumed in the link through the difference value of the time stamps, setting a threshold value in the module, discarding the data when the difference value of the time stamps exceeds the set threshold value, stopping discarding until the next frame header is detected, and judging and checking again.

In one embodiment, as shown in fig. 6, when a dma read-write collision occurs, by caching read-write requests, when a read-write request reaches half n of a cache depth 2n, which request is executed first, during execution, a cache continuously receives the requests, and assuming that the read request satisfies the cache depth n now, after executing n read requests first, it is determined whether the current write request also satisfies the depth n, if so, the n read requests are executed, and if not, the read request returns to an initial state, and it waits for which of the read or write requests satisfies the condition of the depth n first, and the process is repeated in this way.

The flow diagram of reading the BD by the scheme is shown in FIG. 7, and any data interaction between the FPGA and the PC is firstly realized by reading/writing data into a register module of the FPGA through the PC, and the FPGA carries out the next operation according to the value in the register.

Here, the concept of BD is introduced, that is, before PCIE DMA reads and writes data, a PC writes a value of BD into a register, an index label is extracted by reading the BD value of the register, a physical address in a corresponding ram is read by using the index label, the corresponding physical address is an address (buffer of the PC) where the FPGA performs DMA operation, and data transmission is performed according to the address.

In summary, the method and system for exchanging dual-path redundant data based on the Aurora protocol provided by the invention can solve the problem that in a high-speed communication system in the prior art, the data transmission certainty is reduced along with the factors such as the rise of clock rate, circuit routing and clock delay, and the like, so as to improve the accuracy of data in a link.

The preferred embodiments of the invention disclosed above are intended to be illustrative only. The preferred embodiments are not intended to be exhaustive or to limit the invention to the precise embodiments disclosed. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention. The invention is limited only by the claims and the full scope and equivalents thereof, and any modification, equivalent replacement, or improvement made within the spirit and principle of the invention should be included in the protection scope of the invention.

It will be appreciated by those skilled in the art that, in addition to implementing the system, apparatus and various modules thereof provided by the present invention in the form of pure computer readable program code, the same procedures may be implemented entirely by logically programming method steps such that the system, apparatus and various modules thereof provided by the present invention are implemented in the form of logic gates, switches, application specific integrated circuits, programmable logic controllers, embedded microcontrollers and the like. Therefore, the system, the device and the modules thereof provided by the present invention can be considered as a hardware component, and the modules included in the system, the device and the modules thereof for implementing various programs can also be considered as structures in the hardware component; modules for performing various functions may also be considered to be both software programs for performing the methods and structures within hardware components.

In addition, all or part of the steps of the method according to the above embodiments may be implemented by a program instructing related hardware, where the program is stored in a storage medium and includes several instructions to enable a single chip, a chip, or a processor (processor) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.

In addition, any combination of various different implementation manners of the embodiments of the present invention is also possible, and the embodiments of the present invention should be considered as disclosed in the embodiments of the present invention as long as the combination does not depart from the spirit of the embodiments of the present invention.