High-speed pulse acquisition system based on Ethernet optical fiber

文档序号:1921448 发布日期:2021-12-03 浏览:29次 中文

阅读说明:本技术 一种基于以太网光纤的高速脉冲采集系统 (High-speed pulse acquisition system based on Ethernet optical fiber ) 是由 吴海飞 孙欢欢 于 2021-09-14 设计创作,主要内容包括:本发明公开了一种基于以太网光纤的高速脉冲采集系统,涉及数据采集技术领域,该系统包括:模拟输入模块、外触发输入模块、FPGA模块、光纤以太网接口模块和存储模块;Trigin采集卡用于采集第一数据,第一数据经程控增益放大器PGA、ADC模块、FPGA模块及光纤以太网接口模块后传输至上位机;CH1采集卡用于采集第二数据,第二数据经外触发控制模块、FPGA模块及光纤以太网接口模块后传输至上位机。本系统支持1个模拟输入通道和一个外触发输入通道。模拟前端集成了程控增益放大器PGA,在输入1MΩ或50Ω时有多个输入档位供用户选择。适合工业现场数据采集。能够借助光纤传输和TCP/IP的优势,采集的数据支持可支持长距离、可靠地传输到上位机,抗干扰能力极强。(The invention discloses a high-speed pulse acquisition system based on Ethernet optical fiber, which relates to the technical field of data acquisition and comprises: the device comprises an analog input module, an external trigger input module, an FPGA module, an optical fiber Ethernet interface module and a storage module; the Trigin collecting card is used for collecting first data, and the first data are transmitted to the upper computer through the PGA, the ADC module, the FPGA module and the optical fiber Ethernet interface module; the CH1 acquisition card is used for acquiring second data, and the second data is transmitted to the upper computer through the external trigger control module, the FPGA module and the optical fiber Ethernet interface module. The system supports 1 analog input channel and one external trigger input channel. The analog front end is integrated with a programmable gain amplifier PGA, and when 1M omega or 50 omega is input, a plurality of input gears are provided for a user to select. The method is suitable for industrial field data acquisition. By the advantages of optical fiber transmission and TCP/IP, the collected data can support long-distance and reliable transmission to an upper computer, and the anti-interference capability is strong.)

1. A high-speed pulse acquisition system based on an Ethernet optical fiber is characterized by comprising:

the device comprises an analog input module, an external trigger input module, an FPGA module, an optical fiber Ethernet interface module and a storage module;

the storage module and the optical fiber Ethernet interface module are respectively connected with the FPGA module;

the analog input module comprises a Trigin acquisition card, a program-controlled gain amplifier PGA and an ADC module which are connected in sequence; the Trigin collecting card is used for collecting first data, and the first data are transmitted to an upper computer through the PGA, the ADC module, the FPGA module and the optical fiber Ethernet interface module;

the external trigger input module comprises a CH1 acquisition card and an external trigger control module, the CH1 acquisition card is used for acquiring second data, and the second data are transmitted to the upper computer after passing through the external trigger control module, the FPGA module and the optical fiber Ethernet interface module.

2. The high-speed pulse acquisition system based on the Ethernet optical fiber according to claim 1, wherein the analog input module sets two input impedances of 1M/50 ohm.

3. The high-speed pulse acquisition system based on ethernet fiber according to claim 1, wherein said analog input module further comprises a clock management module for providing acquisition frequency of Trigin acquisition card.

4. The high-speed pulse acquisition system based on the Ethernet optical fiber according to claim 1, further comprising a power module, wherein a power supply end of the power module is connected with the analog input module, the external trigger input module, the FPGA module, the optical fiber Ethernet interface module and the storage module.

5. The high-speed pulse acquisition system based on the Ethernet optical fiber according to claim 1, wherein the ADC module sets the function of time stamp information, and the time stamp information comprises a GPS time stamp and a user-defined time stamp.

6. An ethernet fiber-based high speed pulse harvesting system according to claim 1, further comprising an API library for users to communicate with said FPGA module using different languages and programming environments.

7. An ethernet fiber-based high-speed pulse acquisition system according to claim 1, further comprising:

a finite point single trigger acquisition module: the trigger Trigin acquisition card/CH 1 acquisition card is triggered once to start acquisition once, and acquired data is stored in the storage module;

an infinite point single trigger acquisition module: the trigger Trigin acquisition card/CH 1 acquisition card is triggered once to start acquisition once, and acquired data are buffered by the storage module and then continuously uploaded to the main memory of the upper computer;

the finite point triggers the acquisition module for multiple times: after being activated, the Trigin acquisition card/CH 1 acquisition card can receive multiple triggers, and an onboard memory can be divided into multiple sections to respectively store trigger data;

an infinite point triggers the acquisition module for multiple times: the method is used for adding an infinite receiving triggering function on the basis of an infinite point single-time triggering acquisition module, and continuously uploading data triggered each time to an upper computer main memory after segmenting.

8. An ethernet fiber-based high-speed pulse acquisition system according to claim 1, further comprising:

the annular buffer function module is used for acquiring signals before the trigger moment, and once the Trigin acquisition card meets the trigger condition, the acquired data before triggering and the data after triggering are simultaneously stored in an onboard large-capacity memory; then, the data is transmitted to an upper computer through the Ethernet; in the one-time triggering-collecting process, a user can freely set the length of the collected data before triggering and the length of the collected data after triggering, and the sum of the two lengths is the total length of the one-time collected data.

9. An ethernet fiber-based high-speed pulse acquisition system according to claim 1, further comprising:

the infinite point acquisition module comprises an FIFO memory and is used for allowing the acquired data to be buffered by the FIFO memory and then continuously transmitted to the upper computer through the Ethernet; in the FIFO memory, the system can preset the capacity of the FIFO memory and monitor the state of the FIFO memory in real time, and automatically start DMA operation to carry out data handling work; after the FIFO memory works, the length of the acquired data is allowed to be infinitely long, and the limiting condition is the memory capacity of the host or the hard disk capacity.

10. An ethernet fiber-based high-speed pulse acquisition system according to claim 1, further comprising:

triggering the acquisition module for multiple times: the device is used for dividing the storage space into N subsections and can receive continuous trigger operation; storing data acquired before and after each triggering into corresponding memory subsections, wherein the process does not need software intervention, and the Trigin acquisition card does not need to be restarted; the number of the storage space segments is limited by the set length of data collected each time and the size of on-board memory capacity.

Technical Field

The invention relates to the technical field of data acquisition, in particular to a high-speed pulse acquisition system based on an Ethernet optical fiber.

Background

Data Acquisition (DAQ) refers to the automatic acquisition of non-electrical or electrical signals from analog and digital units under test, such as sensors and other devices under test, and the transmission to an upper computer for analysis and processing. The data acquisition system is a flexible and user-defined measurement system implemented in conjunction with computer-based or other specialized test platform-based measurement software and hardware products.

The existing data acquisition system has single function and cannot meet the requirement of multi-mode data acquisition.

Disclosure of Invention

To overcome or at least partially solve the above problems, embodiments of the present invention provide a high-speed pulse acquisition system based on an ethernet fiber.

The embodiment of the invention is realized by the following steps:

the embodiment provides a high-speed pulse acquisition system based on an ethernet optical fiber, which comprises: the device comprises an analog input module, an external trigger input module, an FPGA module, an optical fiber Ethernet interface module and a storage module; the storage module and the optical fiber Ethernet interface module are respectively connected with the FPGA module; the analog input module comprises a Trigin acquisition card, a program control gain amplifier PGA and an ADC module which are connected in sequence; the Trigin collecting card is used for collecting first data, and the first data are transmitted to an upper computer through the PGA, the ADC module, the FPGA module and the optical fiber Ethernet interface module; the external trigger input module comprises a CH1 acquisition card and an external trigger control module, the CH1 acquisition card is used for acquiring second data, and the second data are transmitted to the upper computer after passing through the external trigger control module, the FPGA module and the optical fiber Ethernet interface module.

In some embodiments of the present invention, the analog input module sets two input impedances of 1M/50 ohm.

In some embodiments of the present invention, the analog input module further includes a clock management module, configured to provide an acquisition frequency of the Trigin acquisition card.

In some embodiments of the present invention, the power supply module is further included, and a power supply end of the power supply module is connected to the analog input module, the external trigger input module, the FPGA module, the fiber ethernet interface module, and the storage module.

In some embodiments of the present invention, the power module is a battery, and a power supply end of the battery is connected to the analog input module, the external trigger input module, the FPGA module, the fiber ethernet interface module, and the storage module.

In some embodiments of the present invention, the ADC module sets a function of timestamp information, where the timestamp information includes a GPS timestamp and a user-defined timestamp.

In some embodiments of the present invention, the method further comprises setting an API library, wherein the API library is used for a user to communicate with the FPGA module by using different languages and programming environments.

In some embodiments of the invention, further comprising: a finite point single trigger acquisition module: the system is used for triggering the Trigin acquisition card/CH 1 acquisition card once to start acquisition once, and the acquired data is stored in the storage module;

an infinite point single trigger acquisition module: the trigger Trigin acquisition card/CH 1 acquisition card is triggered once to start acquisition once, and acquired data are buffered by the storage module and then continuously uploaded to the main memory of the upper computer;

the finite point triggers the acquisition module for multiple times: after being activated, the Trigin acquisition card/CH 1 acquisition card can receive multiple triggers, and an onboard memory can be divided into multiple sections to respectively store trigger data;

an infinite point triggers the acquisition module for multiple times: the method is used for adding an infinite receiving triggering function on the basis of an infinite point single-time triggering acquisition module, and continuously uploading data triggered each time to an upper computer main memory after segmenting.

In some embodiments of the invention, further comprising: the annular buffer function module is used for acquiring signals before the trigger moment, and once the Trigin acquisition card meets the trigger condition, the acquired data before triggering and the data after triggering are simultaneously stored in an onboard large-capacity memory; then, the data is transmitted to an upper computer through the Ethernet; in the one-time triggering-collecting process, a user can freely set the length of the collected data before triggering and the length of the collected data after triggering, and the sum of the two lengths is the total length of the one-time collected data.

In some embodiments of the invention, further comprising: the infinite point acquisition module comprises an FIFO memory and is used for allowing the acquired data to be buffered by the FIFO memory and then continuously transmitted to the upper computer through the Ethernet; in the FIFO memory, the system can preset the capacity of the FIFO memory and monitor the state of the FIFO memory in real time, and automatically start DMA operation to carry out data handling work; after the FIFO memory works, the length of the acquired data is allowed to be infinitely long, and the limiting condition is the memory capacity of the host or the hard disk capacity.

In some embodiments of the invention, further comprising: triggering the acquisition module for multiple times: the device is used for dividing the storage space into N subsections and can receive continuous trigger operation; storing data acquired before and after each triggering into corresponding memory subsections, wherein the process does not need software intervention, and the Trigin acquisition card does not need to be restarted; the number of the storage space segments is limited by the set length of data collected each time and the size of on-board memory capacity.

The embodiment of the invention at least has the following advantages or beneficial effects:

the embodiment of the invention provides a high-speed pulse acquisition system based on an Ethernet optical fiber, which supports 1 analog input channel and one external trigger input channel. The analog front end is integrated with a programmable gain amplifier PGA, and when 1M omega or 50 omega is input, a plurality of input gears are provided for a user to select. Specifically, the system is provided with an analog input module, an external trigger input module, an FPGA module, an optical fiber Ethernet interface module and a storage module. The method is suitable for industrial field data acquisition. By the advantages of optical fiber transmission and TCP/IP, the collected data can support long-distance and reliable transmission to an upper computer, and the anti-interference capability is strong.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.

FIG. 1 is a schematic structural diagram of an embodiment of a high-speed pulse acquisition system based on an Ethernet fiber according to the present invention;

FIG. 2 is a diagram of the working status of the ring buffer module in an embodiment of the high-speed pulse acquisition system based on Ethernet fiber according to the present invention;

FIG. 3 is a diagram of the working status of the ring buffer module in an embodiment of the high-speed pulse acquisition system based on Ethernet fiber according to the present invention;

FIG. 4 is a diagram of the operating state of an infinite point acquisition module in an embodiment of a high-speed pulse acquisition system based on Ethernet fiber according to the present invention;

fig. 5 is a working state diagram of a multi-triggering acquisition module in an embodiment of a high-speed pulse acquisition system based on an ethernet fiber according to the present invention.

Icon: 1. a Trigin collecting card; 2. a programmable gain amplifier PGA; 3. an ADC module; 4. a CH1 acquisition card; 5. an external trigger control module; 6. an FPGA module; 7. a fiber optic Ethernet interface module; 8. and a storage module.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. The components of embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.

Thus, the following detailed description of the embodiments of the present invention, presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.

In the description of the embodiments of the present invention, it should be noted that, if the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings or the orientations or positional relationships that the products of the present invention are usually placed in when used, the orientations or positional relationships are only used for convenience of describing the present invention and simplifying the description, but the terms do not indicate or imply that the devices or elements indicated must have specific orientations, be constructed in specific orientations, and operate, and therefore, should not be construed as limiting the present invention.

Furthermore, the terms "horizontal", "vertical", "overhang" and the like do not require that the components be absolutely horizontal or overhang, but may be slightly inclined. For example, "horizontal" merely means that the direction is more horizontal than "vertical" and does not mean that the structure must be perfectly horizontal, but may be slightly inclined.

In the description of the embodiments of the present invention, it should be further noted that unless otherwise explicitly stated or limited, the terms "disposed," "mounted," "connected," and "connected" should be interpreted broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.

Examples

Referring to fig. 1, the present embodiment provides a high-speed pulse acquisition system based on an ethernet fiber, including: the device comprises an analog input module, an external trigger input module, an FPGA module, an optical fiber Ethernet interface module and a storage module; the storage module and the optical fiber Ethernet interface module are respectively connected with the FPGA module; the analog input module comprises a Trigin acquisition card, a program control gain amplifier PGA and an ADC module which are connected in sequence; the Trigin collecting card is used for collecting first data, and the first data are transmitted to an upper computer through the PGA, the ADC module, the FPGA module and the optical fiber Ethernet interface module; the external trigger input module comprises a CH1 acquisition card and an external trigger control module, the CH1 acquisition card is used for acquiring second data, and the second data are transmitted to the upper computer after passing through the external trigger control module, the FPGA module and the optical fiber Ethernet interface module.

The system adopts a socket communication mechanism, and the system supporting socket communication can establish normal communication with the system. Furthermore, the system supports two modes of interconnection with an upper computer through an optical fiber Ethernet interface, wherein one mode is through an optical switch and a router, and the other mode is directly connected through the optical switch. An analog input module and an external trigger input module are arranged to support 1 analog input channel and one external trigger input channel. The analog input module integrates a programmable gain amplifier PGA, and a plurality of input gears are provided for users to select when 1M omega or 50 omega is input. Specifically, the system is provided with an analog input module, an external trigger input module, an FPGA module, an optical fiber Ethernet interface module and a storage module. The method is suitable for industrial field data acquisition. By the advantages of optical fiber transmission and TCP/IP, the collected data can support long-distance and reliable transmission to an upper computer, and the anti-interference capability is strong.

In some embodiments of the present invention, the analog input module further includes a clock management module, configured to provide an acquisition frequency of the Trigin acquisition card.

The random jitter of the acquisition clock can degrade the signal-to-noise ratio of the acquisition system, and the influence of the jitter of the acquisition clock on the signal-to-noise ratio becomes more and more obvious along with the increase of the frequency of the input signal. Therefore, the system adopts an ultra-low jitter clock signal generation module to match with a high-stability and low-phase noise clock reference source to ensure the performance of the acquisition clock. The TCXO with 100MHz on board is used as the reference clock of the clock module, so that the board card can carry out independent acquisition work.

In some embodiments of the present invention, the power supply module is further included, and a power supply end of the power supply module is connected to the analog input module, the external trigger input module, the FPGA module, the fiber ethernet interface module, and the storage module.

The power module can be a battery, and a Trigin acquisition card and a CH1 acquisition card support two power supply modes of battery power supply and direct current 12V power supply, so that a customer can flexibly select the power supply mode.

In some embodiments of the present invention, the ADC module sets a function of timestamp information, where the timestamp information includes a GPS timestamp and a user-defined timestamp.

The Trigin collecting card provides a function of inputting timestamp (timestamp) information into the AD data stream, and the selectable timestamp information comprises a GPS timestamp and a user-defined timestamp (such as a counter), so that a user can conveniently record and inquire.

In some embodiments of the present invention, the method further comprises setting an API library, wherein the API library is used for a user to communicate with the FPGA module by using different languages and programming environments.

When the user uses different languages and programming environments to communicate with the system, two modes are provided, one mode is to send command frames and receive data to the device through network data packets, which is an implementation mode of underlying software, and the mode is not limited by an operating system or a programming language, and has a wide application range. The other way is to call the API library provided by us, and the user does not need to care about the format of the command frame and how to acquire the data, so that the use is convenient. This approach has the advantage of being easy to program and the procedure is relatively short.

The method for calling the API library to communicate with the product comprises the following steps:

the software package released by the system comprises an encapsulated static library ld _ api.lib, two target platforms Win32 and x64 are respectively placed under corresponding directories. Static libraries were compiled from VS2010 and were found to function normally in Win32 and x64 using VS2012 development routines.

The header of the static library, ld _ api. h, defines the prototype and parameter specification of the static library function, see table 1 below:

table 1, the header file ld _ api.h of the static library defines the prototype and parameter description of the static library function;

and continuously updating the static library, obtaining the latest version of the software package, and checking the ld _ api.h.

The user calls the API library to communicate with the system according to a certain operation flow, as shown in fig. 2:

the product has a plurality of settable parameters, and the user can call the ld _ SedParam _ i32 function for configuring the device parameters for a plurality of times. The function caches the parameters in software until the user executes the ld _ SetDaqParam function, which writes the parameters to the device's memory space. When the user executes the initialization device function ld _ SetInitCard, all the parameters start to be valid, and as long as the user does not modify the parameters or power up again, the above process does not need to be executed again.

When the system receives a start collecting command ld _ StartDaq, the equipment enters a state of waiting for starting, and once a trigger condition is reached, the equipment automatically sends the collected data to the network. The user acquires data with a specified length into a specified buffer through the ld _ GetData function. And when the device receives the ld _ StopData command, the device stops collecting the data immediately, and stops working after the transmission of the remaining data which is not transmitted is finished. As shown in fig. 2, if the user wants to loop through the acquisition procedure, the acquisition command ld _ StartDaq can be executed again to start a new acquisition process.

In the embodiment, the API library is configured, so that a user can call the API library conveniently, programming is easy, and programs are relatively short.

In some embodiments of the invention, further comprising:

a finite point single trigger acquisition module: triggering a Trigin acquisition card/CH 1 acquisition card once to start acquisition once, and storing acquired data in the storage module;

an infinite point single trigger acquisition module: triggering a Trigin acquisition card/CH 1 acquisition card once to start acquisition once, and continuously uploading acquired data to an upper computer main memory after the acquired data is buffered by a storage module;

the finite point triggers the acquisition module for multiple times: the acquisition card of the Trigin acquisition card/CH 1 acquisition card can receive multiple triggers after being activated, and an onboard memory can be divided into multiple sections to store the trigger data respectively;

an infinite point triggers the acquisition module for multiple times: on the basis of an infinite point single-time trigger acquisition module, an infinite receiving trigger function is added, and data triggered each time is segmented and then continuously uploaded to an upper computer main memory.

In this implementation, provide finite point single and trigger collection module, infinite point single and trigger collection module, finite point trigger collection module and infinite point trigger collection module many times, compare in prior art, provide multiple collection mode to satisfy different collection demands, the suitability is strong.

The system supports various acquisition modules, and can conveniently set a mode and acquire parameters by commanding a user. Different working modes are suitable for different application scenes, and the internal working process is different. The main difference between the finite point mode and the infinite point mode is that the data volume of the finite point acquisition module is limited by the onboard memory capacity. For the onboard memory, only write operation is performed when data is collected; when the data is uploaded to the memory of the PC, only read operation is carried out, so that the highest sampling rate can be supported. The product supports 4 acquisition modules of limited point single trigger, limited point multiple trigger, infinite point single trigger and infinite point multiple trigger. The user may also control the voltage swing or level trigger modes. While the internal register mode is set for convenience of software debugging. The acquisition module and the trigger mode must be set by the same command.

Referring to fig. 3, in some embodiments of the present invention, the method further includes:

the annular buffer function module is used for acquiring signals before the trigger moment, and once the Trigin acquisition card meets the trigger condition, the acquired data before triggering and the data after triggering are simultaneously stored in an onboard large-capacity memory; then, the data is transmitted to an upper computer through the Ethernet; in the one-time triggering-collecting process, a user can freely set the length of the collected data before triggering and the length of the collected data after triggering, and the sum of the two lengths is the total length of the one-time collected data.

In this embodiment, the user can freely set the length of data collected before triggering and the length of data collected after triggering, and the sum of the two lengths is the total length of data collected at one time. The user can conveniently set the length of the collected data according to actual needs.

Referring to fig. 4, in some embodiments of the present invention, the method further includes: the infinite point acquisition module comprises an FIFO memory and is used for allowing the acquired data to be buffered by the FIFO memory and then continuously transmitted to the upper computer through the Ethernet; in the FIFO memory, the system can preset the capacity of the FIFO memory and monitor the state of the FIFO memory in real time, and automatically start DMA operation to carry out data handling work; after the FIFO memory works, the length of the acquired data is allowed to be infinitely long, and the limiting condition is the memory capacity of the host or the hard disk capacity.

In the embodiment, the collected data is allowed to be buffered by the FIFO memory and then continuously transmitted to the upper computer through the Ethernet, and the transmission speed is high.

Referring to fig. 5, in some embodiments of the present invention, the method further includes: triggering the acquisition module for multiple times: the device is used for dividing the storage space into N subsections and can receive continuous trigger operation; storing data acquired before and after each triggering into corresponding memory subsections, wherein the process does not need software intervention, and the Trigin acquisition card does not need to be restarted; the number of the storage space segments is limited by the set length of data collected each time and the size of on-board memory capacity.

In the embodiment, the system automatically stores the data acquired before and after each trigger into the corresponding memory subsections, the process does not need software intervention, and the Trigin acquisition card does not need to be restarted, so that the operation of a user is facilitated.

To sum up, the high-speed pulse acquisition system based on the ethernet fiber according to the embodiments of the present invention is provided with an analog input module, an external trigger input module, an FPGA module, a fiber ethernet interface module, and a storage module. The method is suitable for industrial field data acquisition. By the advantages of optical fiber transmission and TCP/IP, the collected data can support long-distance and reliable transmission to an upper computer, and the anti-interference capability is strong. The system supports various acquisition modules, and can conveniently set a mode and acquire parameters by commanding a user. Different working modes are suitable for different application scenes, and the internal working process is different.

The above is only a preferred embodiment of the present invention, and is not intended to limit the present invention, and various modifications and changes will occur to those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

It will be evident to those skilled in the art that the present application is not limited to the details of the foregoing illustrative embodiments, and that the present application may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the application being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.

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