阅读说明：本技术 显示面板及其制造方法、电子设备 (Display panel, manufacturing method thereof and electronic equipment ) 是由 秦进 于 2021-07-27 设计创作，主要内容包括：本申请公开了一种显示面板及其制造方法、电子设备,该显示面板包括：依次叠层设置的基板、像素阵列、薄膜晶体管电路以及薄膜封装层,基板为透明基板；在一横截面上,薄膜晶体管电路的两端设有第一凸体端以及第二凸体端,第一凸体端以及第二凸体端连接基板,第一方向与依次叠层设置的方向相交或相互垂直；第一端凸体上设置有覆晶薄膜粘结区,用于在依次叠层设置的方向上粘结覆晶薄膜以及集成电路。通过上述方式,本申请能够减小黑边,并且像素阵列被至于基板与薄膜晶体管电路之间,其隔绝水氧的封装路径更长,从而提升封装可靠性。(The application discloses display panel and manufacturing method, electronic equipment thereof, this display panel includes: the pixel array, the thin film transistor circuit and the thin film packaging layer are sequentially stacked, and the substrate is a transparent substrate; on a cross section, two ends of the thin film transistor circuit are provided with a first convex body end and a second convex body end, the first convex body end and the second convex body end are connected with the substrate, and the first direction is intersected with or vertical to the direction of the sequential lamination arrangement; the first end convex body is provided with a chip on film bonding area which is used for bonding the chip on film and the integrated circuit in the direction of the sequential lamination arrangement. Through the mode, the black edge can be reduced, the pixel array is arranged between the substrate and the thin film transistor circuit, the packaging path for isolating water and oxygen is longer, and the packaging reliability is improved.)

1. A display panel, comprising:

the pixel array structure comprises a substrate, a pixel array, a thin film transistor circuit and a thin film packaging layer which are sequentially stacked, wherein the substrate is a transparent substrate;

on a cross section, two ends of the thin film transistor circuit are provided with a first convex body end and a second convex body end, the first convex body end and the second convex body end are connected with the substrate, and the first direction is intersected with or vertical to the direction of the sequential lamination arrangement;

the first end convex body is provided with a chip on film bonding area which is used for bonding the chip on film and the integrated circuit in the direction of the sequential lamination arrangement.

2. The display panel according to claim 1,

the thin film transistor circuit is also provided with a first main body part connected with the first convex body end and the second convex body end;

in the direction of the sequential lamination, the pixel array is clamped between the substrate and the first main body part;

in the first direction, the pixel array is sandwiched between the first and second bump ends.

3. The display panel according to claim 2,

the thicknesses of the first main body part, the first convex body end and the second convex body end in the direction of the sequential lamination arrangement are all equal;

the flip chip film is provided with a convex part;

a first accommodating area is formed between the plane of the first convex body end and the plane of the first main body part and used for accommodating the convex body part, so that the chip on film bonding area is bonded with the chip on film through the convex body part.

4. The display panel according to claim 3,

a third convex body end and a fourth convex body end are arranged at two ends of the thin film packaging layer;

the first accommodating area is also used for accommodating the third convex body end;

and a second accommodating area is formed between the plane of the second end of the convex body and the plane of the first main body part, and the second accommodating area is used for accommodating the fourth convex body end so as to enable two ends of the thin film transistor circuit to be connected with two ends of the thin film packaging layer.

5. The display panel according to claim 4,

the film packaging layer is also provided with a second main body part connected with the third convex body end and the fourth convex body end;

in the direction of the sequential stacking arrangement, the thickness of the convex part is larger than the sum of the thickness of the first accommodating area and the thickness of the second main body part.

6. The display panel according to claim 3,

the chip on film is also provided with a third main body part which is connected with the convex part in a bending way;

and an integrated circuit is arranged on one side of the third main body part far away from the film packaging layer.

7. The display panel according to claim 1,

the thin film transistor circuit is provided with a circuit, and the circuit is arranged on one side far away from the pixel array and close to the thin film packaging layer and is used for connecting the integrated circuit;

and a plurality of through holes are formed in the other side, close to the pixel array and far away from the thin film packaging layer, and are used for connecting and driving the pixel array.

8. A display panel is characterized in that a plurality of pixels are arranged in a matrix,

the pixel array structure comprises a substrate, a pixel array, a thin film transistor circuit and a thin film packaging layer which are sequentially stacked, wherein the substrate is a transparent substrate;

on a cross section, two ends of the thin film transistor circuit are provided with a first convex body end and a second convex body end, the first convex body end and the second convex body end are connected with the substrate, and the first direction is intersected with or vertical to the direction of the sequential lamination arrangement;

the first end convex body is provided with a bent substrate and a bent chip on film bonding area, and the inner side of the chip on film bonding area is provided with the bent thin film transistor circuit with the same radian;

the chip on film bonding area is connected with the chip on film, and an integrated circuit is arranged on one side of the chip on film away from the thin film transistor circuit.

9. A method of manufacturing a display panel, the method comprising:

providing a substrate, wherein the substrate is a substrate of the display panel;

arranging a pixel array on the substrate based on an evaporation method;

arranging a thin film transistor circuit on the pixel array, wherein two ends of the thin film transistor circuit are connected with two ends of the substrate so as to seal the pixel array;

and arranging a thin film packaging layer on the film transistor circuit.

10. An electronic device, characterized in that, the electronic device at least includes a circuit board, a memory, a middle frame and a casing, the memory is arranged on the circuit board, the casing and the middle frame enclose the circuit board, and the display panel according to any one of claims 1 to 8 is arranged on the circuit board.

Technical Field

The present disclosure relates to the field of display technologies, and in particular, to a display panel, a manufacturing method thereof, and an electronic device.

Background

The display panel, as an important component of the information industry, has played an important role in the development process of information technology, and the display panel is not supported by televisions, notebooks and mobile phones and flat panels.

In recent years, with the development of science and technology and the increasing demand, flexible display panels are becoming more popular because flexible display panels are deformable and bendable, light, thin, low in power consumption, small in size and good in waterproof performance.

Generally, when setting up display panel on the electronic equipment, other subassemblies often have the distance when enclosing and establishing display panel, and the light emitting source under the flexible display panel is bigger because of the marginal distance of self bending distance center, leads to having dark frame between display panel and the center, produces the black border to pixel array under the display panel often realizes through the encapsulation membrane apart from external distance, leads to isolated water oxygen's encapsulation route too short, thereby reduces the encapsulation reliability.

Disclosure of Invention

A first aspect of an embodiment of the present application provides a display panel, including: the pixel array, the thin film transistor circuit and the thin film packaging layer are sequentially stacked, and the substrate is a transparent substrate;

on a cross section, two ends of the thin film transistor circuit are provided with a first convex body end and a second convex body end, the first convex body end and the second convex body end are connected with the substrate, and the first direction is intersected with or vertical to the direction of the sequential lamination arrangement;

the first end convex body is provided with a chip on film bonding area which is used for bonding the chip on film and the integrated circuit in the direction of the sequential lamination arrangement.

A second aspect of embodiments of the present application provides another display panel, including: the pixel array, the thin film transistor circuit and the thin film packaging layer are sequentially stacked, and the substrate is a transparent substrate;

on a cross section, two ends of the thin film transistor circuit are provided with a first convex body end and a second convex body end, the first convex body end and the second convex body end are connected with the substrate, and the first direction is intersected with or vertical to the direction of the sequential lamination arrangement;

the first end convex body is provided with a bent substrate and a bent chip on film bonding area, and the inner side of the chip on film bonding area is provided with a bent thin film transistor circuit with the same radian;

the chip on film bonding area is connected with the chip on film, and one side of the chip on film away from the thin film transistor circuit is provided with an integrated circuit.

A third aspect of embodiments of the present application provides a manufacturing method of a display panel, including:

providing a substrate, wherein the substrate is a substrate of the display panel;

arranging a pixel array on a substrate based on an evaporation method;

arranging a thin film transistor circuit on the pixel array, wherein two ends of the thin film transistor circuit are connected with two ends of the substrate so as to seal the pixel array;

and arranging a thin film packaging layer on the film transistor circuit.

A fourth aspect of an embodiment of the present application provides an electronic device, including: the display panel at least comprises a circuit board, a memory, a middle frame and a shell, wherein the memory is arranged on the circuit board, the shell and the middle frame enclose the circuit board, and the circuit board is provided with the display panel in the first aspect and the second aspect.

The beneficial effect of this application is: the pixel array is arranged between the substrate and the thin film transistor circuit, the packaging path for isolating water and oxygen is longer, so that the packaging reliability is improved, the first end convex body is provided with the chip on film bonding area for bonding the chip on film and the integrated circuit in the direction of stacking in sequence, the distance from the pixel array to the frame is shorter than that of the bent flexible display panel, and the black edge can be reduced.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

FIG. 1 is a schematic view of a substrate in a flattened state according to a first embodiment of the present disclosure;

FIG. 2 is a schematic structural diagram illustrating a substrate being bent according to a first embodiment of the present disclosure;

FIG. 3 is a schematic flow chart of a first embodiment of the present application;

FIG. 4 is a schematic structural diagram of a second embodiment of the present application;

FIG. 5 is a schematic diagram of a specific stack structure of a second embodiment of the present application;

FIG. 6 is a flow chart illustrating a second embodiment of the present invention;

FIG. 7 is a schematic structural diagram of a third embodiment of the present application;

fig. 8 is a schematic block diagram of the hardware architecture of the electronic device of the present application.

Detailed Description

In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system structures, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.

It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

It is also to be understood that the terminology used in the description of the present application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in the specification of the present application and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

It should be further understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.

As used in this specification and the appended claims, the term "if" may be interpreted contextually as "when", "upon" or "in response to a determination" or "in response to a detection". Similarly, the phrase "if it is determined" or "if a [ described condition or event ] is detected" may be interpreted contextually to mean "upon determining" or "in response to determining" or "upon detecting [ described condition or event ]" or "in response to detecting [ described condition or event ]".

Referring to fig. 1, fig. 1 is a schematic structural diagram illustrating a substrate in a flattened state according to a first embodiment of the present application; a first embodiment of the present application provides an Organic Light-Emitting Diode (OLED) flexible panel, which includes a substrate 1, a Thin Film Transistor (TFT) Circuit 2, an Integrated Circuit (IC) 3, a pixel array 4, and a Thin Film Encapsulation layer (TFE) 5.

The substrate 1, the TFT circuit 2, the pixel array 4, and TFE5 are stacked in this order, and light emitted from the substrate 1 is directed to TFE5 to obtain the light emission direction AB. That is, the light emission direction AB may be a lamination direction in which the layers are sequentially laminated.

The pixel array 4 is formed by sequentially arranging at least three pixels of red, green and blue, and the pixel array 4 is formed, for example, in fig. 1, a lattice in a layer represented by the pixel array 4 can represent one pixel, and the three pixels of red, green and blue are sequentially and alternately arranged, so as to form the pixel array layer in fig. 1.

The substrate 1 may be a Polyimide (PI) substrate, which is an organic polymer material, has high temperature resistance and good flexibility, and is a main material of an OLED flexible screen soft board. PI has various properties, can resist high temperature, and is excellent in abrasion resistance and insulating properties.

Referring to fig. 2, fig. 2 is a schematic structural view illustrating a substrate in a bent state according to a first embodiment of the present application; the connecting part of the TFT circuit 2 in the direction crossing the direction AB and away from the IC3 is the connection region 6 of the chip on film, so as to avoid the problem that the distance of the TFE5 from the frame is larger, and the substrate 1 has the characteristic of good flexibility, the substrate 1 and the connection region 6 of the chip on film externally attached to the substrate 1 can be bent, the distance of the TFE5 from the frame can be reduced, and the black edge can be reduced.

For making the OLED flexible screen more clearly, please refer to fig. 3, fig. 3 is a schematic view of an implementation process of a first implementation of the present application, and the specific fabrication process includes the following steps:

s11: coating PI to be used as a Panel substrate;

specifically, the coating PI is made on a glass plate, so that the coating PI is convenient for defining a boundary with other substances, and the coating PI is made into a Panel substrate, wherein the glass plate only serves as a bearing and is removed at the later stage of Panel manufacturing.

S12: manufacturing a TFT circuit on the PI, namely arranging a TFT circuit 2 on the PI substrate;

s13: a pixel layer is evaporated on the TFT circuit, namely the pixel array 4 is arranged on the TFT circuit 2 in an evaporation mode;

s14: the organic pixel layer is encapsulated with TFE, i.e., the pixel array 4 is encapsulated with TFE 5;

s15: and removing the loaded glass to form a flexible panel, wherein the flexible display panel is in a flat state.

The display panel performs light emitting display from bottom to top as a whole, and specifically, the substrate 1 may be in a flat state and a bent state. When the substrate 1 is in a flat state, the TFE5, the pixel array 4, the TFT circuit 2, and the substrate 1 are sequentially stacked, the integrated circuit 3 is also disposed on the TFT circuit 2, and the TFE5 encapsulates the pixel array 4. When base plate 1 presents the flat state of exhibition, it sets up the same basically, it is no longer repeated here, and Panel Bending region (Panel Bending Area)6 makes display Panel present the state of buckling, so, can make display Panel reduce the distance between the flat state of exhibition and the frame to a certain extent, thereby reduce the black limit, nevertheless there is some lack in waterproof oxygen aspect, because there is the Bending zone in blackboard down this moment, it is big to cause down the black limit on the one hand, the existence of on the other hand Bending stress leads to the easy broken line of Bending zone, and pixel luminescence direction up is TFE, and TFE is SiN usually, SiO, organic glue layer etc. have certain blockking to light, can the lower luminous efficacy of certain degree.

For explaining the technical solution of the present application, a display panel according to a first aspect of the present application is described below by specific embodiments, please refer to fig. 4, fig. 4 is a schematic structural diagram of a second embodiment of the present application, the display panel includes a substrate 1, a pixel array 4, a thin film transistor circuit 2, and a thin film encapsulation layer 5, which are sequentially stacked; as shown in fig. 4, the direction of the sequential stacking may be a vertical direction AB.

Based on the requirement for the display panel, the substrate 1 is usually a transparent substrate, the substrate 1 may be a PI substrate or a glass substrate, and the light transmittance thereof may reach 90% or more, which may satisfy the optical requirement of the display panel.

The pixel array 4 is close to a PI substrate or a glass substrate with higher transmittance, wherein the PI substrate can be used for a flexible screen, the glass substrate can be used for a hard screen, and the efficiency of the panel for emitting light outwards can be further improved.

Wherein, looking at the section of the display panel from the side of the side, on a cross section, the two ends of the thin film transistor circuit 2 are provided with a first protrusion end 21 and a second protrusion end 22, the first protrusion end 21 and the second protrusion end 22 are connected with the substrate 1, the first direction is crossed with or vertical to the direction of the sequential lamination, if the direction of the sequential lamination can be a vertical direction AB, the first direction can be a horizontal direction.

The first end protrusion 21 is provided with a Chip On Film bonding region 61, which may be specifically disposed in the extending direction of the first end protrusion 21, for bonding a Chip On Film (COF) 7 and an integrated circuit 3 in the sequentially stacked direction.

Therefore, the pixel array 4 is arranged between the substrate 1 and the thin film transistor circuit 2, the packaging path for isolating water and oxygen is longer, the packaging reliability is improved, the flip chip bonding area 61 is arranged on the first end convex body 21 and used for bonding the flip chip 7 and the integrated circuit 3 in the direction of stacking in sequence, and the distance between the pixel array and the frame is shorter than that of a bent flexible display panel, so that the black edge can be reduced.

Further, the thin film transistor circuit 2 is further provided with a first body portion 23 connecting the first and second bump ends 21 and 22; as shown in fig. 4, the tft circuit 2 is actually a recessed member formed by connecting the first protrusion end 21, the first main body portion 23 and the second protrusion end 22, and is used for receiving the pixel array 4 or accommodating the pixel array 4.

The pixel array 4 is interposed between the substrate 1 and the first main body portion 23 in a direction in which the layers are sequentially stacked; also, in the first direction, the pixel array 4 is sandwiched between the first and second convex body ends 21 and 22.

The first protrusion end 21 and the second protrusion end 22 of the thin film transistor circuit 2 are connected to two ends of the substrate 1, so that the pixel array 4 is tightly packaged between the substrate 1 and the thin film transistor circuit 2, the thickness of the substrate 1 is greater than that of the thin film packaging layer 5, and the edge of the pixel array 4 is further sealed by the thin film transistor circuit 2, so that the packaging path for isolating water and oxygen is longer, and the packaging reliability is improved.

And a plurality of through holes are formed on the other side, close to the pixel array 4 and far away from the thin film packaging layer 5, and are used for connecting and driving the pixel array 4.

Further, referring to fig. 5, fig. 5 is a schematic diagram of a specific stacked structure of the second embodiment of the present application, in which the thicknesses of the first main body portion 23, the first protrusion end 21 and the second protrusion end 22 in the direction of sequentially stacking are all equal; the flip-chip film 7 is provided with a convex part 71; based on fig. 4, a first receiving area 101 is formed between the plane of the first protrusion end 21 and the plane of the first main body 23 of the tft circuit 2 for receiving the protrusion 71, so that the bond region 61 of the flip chip on film is bonded to the flip chip on film 7 through the protrusion 71. As shown in fig. 5, the thickness of the first receiving region 101 in the sequential stacking direction is the same as the thickness of the first protrusion end 21, so that when the thin film transistor circuit 2 is manufactured, the two ends of the thin film transistor circuit 2 are bent according to the predetermined depth by using a more mature bending process, so that the thin film transistor circuit 2 is manufactured into the first protrusion end 21 and the second protrusion end 22 connected to the first main body portion 23, thereby improving the realizability of the scheme.

Furthermore, a third protrusion end 51 and a fourth protrusion end 52 are arranged at two ends of the thin film encapsulation layer 5; the first receiving area 101 is also used for receiving the third lug end 51; since the film encapsulation layer 5 mainly serves to seal and encapsulate the thin film transistor circuit 2, when the shape of the thin film transistor circuit 2 changes, the film encapsulation layer 5 actually follows the change to meet the encapsulation requirement.

A second receiving area 102 is formed between the plane of the second protrusion end 22 and the plane of the first main body 23 of the thin film transistor circuit 2, and the second receiving area 102 is used for receiving the fourth protrusion end 52, so that two ends of the thin film transistor circuit 2 are connected to two ends of the thin film encapsulation layer 5.

In order to better encapsulate the thin film transistor circuit 2, two ends of the thin film encapsulation layer 5 are disposed at two ends of the thin film transistor circuit 2, and the main body portion of the thin film encapsulation layer 5 is disposed on the first main body portion 23 of the thin film transistor circuit 2, so as to form a further sealed space, so that the pixel array 4 and the thin film transistor circuit 2 are better isolated from water and oxygen.

Further, the thin film encapsulation layer 5 is further provided with a second body portion 53 connecting the third protrusion end 51 and the fourth protrusion end 52; that is, the thin film encapsulation layer 5 is actually composed of the third and fourth bump ends 51 and 52 and the second body portion 53 connecting the third and fourth bump ends 51 and 52.

Since the chip on film 7 simplifies the arrangement of other components by the chip on film bonding region 61 in a bonding manner, the thickness of the convex portion 71 of the chip on film 7 is greater than or equal to the sum of the thickness of the first receiving area 101 and the thickness of the second main body portion 53 in the direction of the sequential lamination arrangement.

Furthermore, in order to further reduce the lower black edge, the chip on film 7 is further provided with a third main body portion 72 connected with the convex portion 71 in a bending manner; and the circuit of the TFT circuit 2 faces downwards, the chip on film 7 can be directly adhered to the back of the display panel, the chip on film adhering region 61 is omitted, and the integrated circuit 3 is arranged on the side of the third main body part 72 far away from the film packaging layer 5. Therefore, the possibility of wire breakage can be reduced, the reliability of the display panel is improved, and the lower black edge can be further reduced.

Furthermore, the thin film transistor circuit 2 is provided with a circuit disposed on a side away from the pixel array 4 and close to the thin film encapsulation layer 5 for connecting the integrated circuit 3.

Therefore, by canceling the bending area, the lower black edge is reduced, the possibility of wire breakage is reduced, and the connection reliability is improved; in addition, the packaging path of the pixel for isolating water and oxygen is longer, the packaging reliability is better, and moreover, the pixel array 4 adopts a high-transmittance material, so that the luminous efficiency of the display panel is higher.

Specifically, first, because the display panel structure of the present application can cancel the bending region of the substrate 1, the bonding structure is directly disposed on the back of the display panel by the flip chip 7, so as to achieve the purpose of reducing the lower black edge and improving the reliability of the broken line.

Second, with respect to the first embodiment in which the Thin Film Encapsulation (TFE) is directly on top of the organic material of the pixel array 4, breakage of TFE can directly cause the pixel organic material to fail by oxidation. The PI substrate is arranged on the pixel array 4, the PI substrate is not prone to damage and failure, the TFT circuit 2 and the multilayer inorganic materials are arranged below the PI substrate, TFE5 is added, the packaging path of the pixel array 4 for isolating water and oxygen is longer, and packaging reliability is better.

Third, TFE5 is arranged on the pixel array 4 in the structure of the first embodiment, because TFE5 is a multilayer structure, the light transmission path is often complicated, and there is a large loss. The pixel array 4 of the first aspect of the present application is directly covered by the high-transmittance PI material, and the single-layer structure can achieve higher light-emitting efficiency. The luminous efficiency can be further improved with the transmittance of PI or iteration of new materials.

In order to more clearly manufacture the display panel, a third aspect of the present application provides a method for manufacturing a display panel, please refer to fig. 6, where fig. 6 is a schematic view of an implementation flow of a stacked structure according to a second embodiment of the present application, and the manufacturing flow specifically includes the following steps:

s21: coating PI to be used as a Panel substrate;

providing a substrate, wherein the substrate is a substrate of the display panel; specifically, this step is similar to step S11 in fig. 2, and is not described here again.

S22: a pixel layer is vapor-deposited on the PI, that is, a pixel array is arranged on the substrate based on a vapor deposition method, specifically, the pixel array 4 can be arranged on the PI substrate 1 in a vapor deposition manner;

s23: manufacturing a TFT circuit on a pixel layer, namely manufacturing a driving circuit TFT circuit 2 on a pixel array 4, arranging the TFT circuit 2 on the pixel array 4, and connecting two ends of the TFT circuit 2 with two ends of a substrate 1 to seal the pixel array 4;

s24: encapsulating the organic pixel layer with TFE, i.e., encapsulating the pixel array 4 with TFE encapsulation layer 5, i.e., disposing the TFE encapsulation layer 5 on the TFT circuit 2;

s25: and removing the loaded glass to form a flexible panel, wherein the flexible display panel is in a flat state.

Referring to fig. 7, fig. 7 is a schematic structural diagram of a second embodiment of the present disclosure, and the display panel includes a substrate 1, a pixel array 4, a thin film transistor circuit 2, and a thin film encapsulation layer 5, which are sequentially stacked.

Based on the requirement for the display panel, the substrate 1 is usually a transparent substrate, the substrate 1 may be a PI substrate or a glass substrate, and the light transmittance thereof may reach 90% or more, which may satisfy the optical requirement of the display panel.

The pixel array 4 is close to a PI substrate or a glass substrate with higher transmittance, wherein the PI substrate can be used for a flexible screen, the glass substrate can be used for a hard screen, and the efficiency of the panel for emitting light outwards can be further improved.

When the cross section of the display panel is viewed from the side of the side surface, on a cross section, the two ends of the thin film transistor circuit 2 are provided with a first protrusion end 21 and a second protrusion end 22, the first protrusion end 21 and the second protrusion end 22 are connected with the substrate 1, the first direction is intersected with or vertical to the direction of the sequential lamination, and if the direction of the sequential lamination is the vertical direction AB, the first direction can be the horizontal direction.

The first convex body end 21 is provided with a bent substrate 1 and a bent chip on film bonding area 62, and the inner side of the chip on film bonding area 62 is provided with a bent thin film transistor circuit 2 with the same radian; because the thickness of the substrate 1 is greater than that of the thin film transistor circuit 2, the bent thin film transistor circuit 2 with the same radian is arranged at the inner side of the bent flip chip film bonding area 62, so that the thin film transistor circuit 2 can be arranged at the inner side of the substrate 1 for bending, and compared with the situation that the thin film transistor circuit 2 is arranged at the outer side of the substrate 1 for bending, the wire breaking possibility of the thin film transistor circuit 2 can be obviously reduced.

The COF bonding area 62 is connected to the COF 7, and the integrated circuit 3 is disposed on the side of the COF 7 away from the TFT circuit 2. Specifically, the folded bonding region 62 of the chip on film is provided with the chip on film 7 in an inward extending direction, so that the lower black edge can be reduced to a certain extent.

Therefore, the pixel array 4 is arranged between the substrate 1 and the thin film transistor circuit 2, the packaging path for isolating water and oxygen is longer, the packaging reliability is improved, the bent thin film transistor circuit 2 with the same radian is arranged on the inner side of the bent flip chip film bonding area 62, and compared with the mode that the thin film transistor circuit 2 is arranged on the outer side of the substrate 1 and then bent, the wire breakage possibility of the thin film transistor circuit 2 can be obviously reduced, and the black edge can be reduced.

The fourth aspect of the present application further provides an electronic device, where the electronic device at least includes a circuit board, a memory, a middle frame, and a casing, the memory is disposed on the circuit board, the casing and the middle frame enclose the circuit board, and the circuit board is provided with a display panel as in the first aspect and the second aspect of the present application.

Specifically, referring to fig. 8, fig. 8 is a schematic block diagram of a hardware architecture of an electronic device according to the present application, where the electronic device 700 may be an industrial computer, a tablet computer, a mobile phone, a notebook computer, and the like, and the mobile phone is taken as an example in the embodiment.

The electronic device 700 may include a Radio Frequency (RF) circuit 710, a memory 720, an input unit 730, a display unit 740, a sensor 750, an audio circuit 760, a wifi (wireless fidelity) module 770, a processor 780, a power supply 790, and the like. The RF circuit 710, the memory 720, the input unit 730, the display unit 740, the sensor 750, the audio circuit 760 and the WiFi module 770 are respectively connected to the processor 780; the power supply 790 is used to supply power to the entire electronic device 700.

Specifically, the RF circuit 710 is used for transmitting and receiving signals; the memory 720 is used for storing data instruction information; the input unit 730 is used for inputting information, and may specifically include a touch panel 731 and other input devices 732 such as operation keys; the display unit 740 may include a display panel; the sensor 750 includes an infrared sensor, a laser sensor, etc. for detecting a user approach signal, a distance signal, etc.; a speaker 761 and a microphone (or microphone) 762 are connected to the processor 780 through the audio circuit 760 for emitting and receiving sound signals; the WiFi module 770 is used for receiving and transmitting WiFi signals, and the processor 780 is used for processing data information of the handset.

The above description is only a part of the embodiments of the present application, and not intended to limit the scope of the present application, and all equivalent devices or equivalent processes performed by the content of the present application and the attached drawings, or directly or indirectly applied to other related technical fields, are also included in the scope of the present application.